ST AN1009 Application note

AN1009

APPLICATION NOTE

“Negative Undershoot” NVRAM Data Corruption

Miniaturisation in microelectronics has led, inevitably, to the inadvertent appearance of parasitic devices. Adjacent conducting paths end up being separated by a gap that is so narrow that it ceases to isolate them properly from each other. Parasitic tunnelling devices, bipolar transistors, and thyristors end up being formed, with each one causing its own distinctive misbehaviour.

The occurrence of parasitic SCRs (silicon controlled rectifiers) causes the well-studied problem of latchup. The occurrence of parasitic bipolar transistors, such as the one shown in Figure 1, is normally less serious, but leads to a particular type of problem in battery-powered circuits. It is this problem that is addressed in this document.

The problem manifests itself in battery-powered memory as data corruption: the unintentional flipping from 1 to 0, or from 0 to 1, of bits of data in the memory array. It is caused when a negative pulse is inadvertently applied to the emitter of an inadvertently formed parasitic bipolar transistor, causing it to go into conduction mode, and to connect two otherwise isolated signal lines.

ANATOMY OF A PARASITIC BIPOLAR TRANSISTOR

Figure 1 shows the cross section of a CMOS gate, with one MOSFET formed directly in the N-type substrate, and the other in a P-well. Under certain conditions, the P-well can start to behave as the base region of a parasitic bipolar NPN transistor, with the N-type substrate as its collector region, and the N+ diffusion contact of the MOSFET as its emitter region.

Figure 1. Cross-Section of an NPN Parasitic Bipolar Transistor

			PAD					SUBSTRATE
VCC		(NEGATIVE PULSE)				VSS		VCC

	GATE			GATE
N+	P+	P+	N+	N+	P+	N+

GROUNDED

P-WELL

GROUNDED P-WELL

INTERNAL POWER

N-SUBSTRATE

AI02522

December 1998

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AN1009 - APPLICATION NOTE

The P-well is held at ground, so the parasitic NPN transistor should never turn on. If, though, a negative pulse is applied to the pad, and hence to the emitter of the parasitic NPN transistor, the transistor would be put into its conducting mode. Once the pad is taken to -Vbe, the parasitic bipolar transistor turns on, and pulls current from the substrate.

When the memory device is being powered by the external power source, the effect of this extra parasitic current will be negligible, and will be compensated for by the external power source. When the memory device is being powered from the internal battery, though, the battery is unable to compensate for the extra current, and so the supply voltage will fall. As soon as the supply voltage falls below a critical value, SRAM cells in the memory array will cease to hold their stored data reliably.

The parasitic bipolar transistor starts to turn on when the pad is taken to about -0.6 V. In battery mode, the impact on the substrate will start to be felt once the current drain through the bipolar transistor is approximately -0.6 mA. The substrate will be pulled to approximately 1.0 V once the current through the bipolar transistor reaches -1.5 mA. As the magnitude of the negative current increases, it directly reduces the level of internal VCC (the substrate voltage). A current drain of approximately -2.0 mA will bring internal VCC to ground, thus leaving the SRAM array completely unpowered.

Figure 2. Substrate VCC versus Negative Undershoots

AI02521	400ns

4V

500mV

Substrate VCC

-1.2 volts for 100ns

-1.2 volts for 500ns

not	-1.2 volts for 1μs
trig'd
M
C1
-1V	Negative Undershoot
-420ns	3.85μs

Figure 2 superimposes three pairs of curves: three negative undershoot pulses of 100, 500 and 1000 ns duration; and the corresponding effects that are felt by the VCC substrate voltage.

Thus, we see that the effect on the substrate voltage is proportional to the duration of the negative undershoot pulse. It is also proportional to its magnitude (its amplitude). It is also proportional to the number of pins that receive the negative undershoot pulse (the example, above, is the effect of just one pin on the chip going negative).

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