ST ACST2 User Manual

ACST2
Overvoltage protected AC switch
Features
Triac with overvoltage crowbar technology
High noise immunity: static dV/dt > 500 V/µs
ACST210-8FP, in the TO-220FPAB package,
Benefits
Enables equipment to meet IEC 61000-4-5
High off-state reliability with planar technology
Needs no external overvoltage protection
Reduces component count
Interfaces directly with the micro-controller
High immunity against fast transients
described in IEC 61000-4-4 standards
Applications
AC on/off static switching in appliances and
industrial control systems
Driving low power highly inductive loads like
solenoid, pump, fan, and micro-motor
OUT
G
OUT
COM
TO-220FPAB
ACST210-8FP
ACST210-8B

Figure 1. Functional diagram

OUT
G
COM

Table 1. Device summary

G
COM
DPAK
Description
Symbol Value Unit
I
The ACST2 series belongs to the ACS™/ACST power switch family built with A.S.D.
®
(application
specific discrete) technology. This high
T(RMS)
V
DRM/VRRM
I
GT
performance device is suited to home appliances or industrial systems and drives loads up to 2 A.
This ACST2 switch embeds a Triac structure with a high voltage clamping device to absorb the inductive turn-off energy and withstand line transients such as those described in the IEC 61000-4-5 standards. The component needs a low gate current to be activated (I and still shows a high electrical noise immunity complying with IEC standards such as IEC 61000-4-4 (fast transient burst test).
July 2010 Doc ID 13304 Rev 3 1/13
< 10 mA)
GT
TM: ACS is a trademark of STMicroelectronics ®: A.S.D. is a registered trademark of STMicroelectronics
2A
800 V
10 mA
www.st.com
13
Characteristics ACST2

1 Characteristics

Table 2. Absolute maximum ratings (limiting values)

Symbol Parameter Value Unit
I
T(RMS)
I
TSM
dI/dt
V
PP
P
G(AV)
P
I
GM
T
V
INS(RMS)
1. According to test described in IEC 61000-4-5 standard and Figure 18
Table 3. Electrical characteristics (Tj = 25 °C, unless otherwise specified)
On-state rms current (full sine wave)
DPAK T
Non repetitive surge peak on-state current (full cycle sine wave, TJ initial = 25 °C)
²
²
tI
I
t Value for fusing tp = 10 ms 0.5 A²s
Critical rate of rise of on-state current
= 2 x IGT, tr = 100 ns
I
G
(1)
Non repetitive line peak mains voltage
F = 60 Hz t = 16.7 ms 8.4 A
F = 50 Hz t = 20 ms 8.0
F = 120 Hz Tj = 125 °C 50 A/µs
(1)
Average gate power dissipation Tj = 125 °C 0.1 W
Peak gate power dissipation (tp = 20 µs) Tj = 125 °C 10 W
GM
Peak gate current (tp = 20 µs) Tj = 125 °C 1.6 A
Storage junction temperature range
stg
T
Operating junction temperature range
j
T
Maximum lead soldering temperature during 10 s (at 3 mm from plastic case) 260 °C
l
Insulation rms voltage T0-220FPAB 1500 V
TO-220FPAB T
= 105 °C
c
= 110 °C
c
2
Tj = 25 °C 2 kV
-40 to +150
-40 to +125
A
°C
Symbol Test conditions Quadrant Value Unit
(1)
V
I
GT
V
I
V
GT
GD
(2)
H
= 12 V, RL = 33 Ω I - II - III MAX 10 mA
OUT
V
= 12 V, RL = 33 Ω I - II - III MAX 1.1 V
OUT
V
= V
OUT
I
= 100 mA MAX 10 mA
OUT
, RL = 3.3 kΩ,Tj = 125 °C I - II - III MIN 0.2 V
DRM
I - III MAX 25
I
L
dV/dt
(dI/dt)c
V
CL
1. Minimum IGT is guaranteed at 5% of IGT max
2. For both polarities of OUT pin referenced to COM pin
IG = 1.2 x I
(2)
V
OUT
(2)
(dV/dt)c = 15 V/µs, Tj = 125 °C MIN 0.5 A/ms
GT
= 67% V
II MAX 35
gate open, Tj = 125 °C MIN 500 V/µs
DRM
ICL = 0.1 mA, tp = 1 ms, Tj = 25 °C MIN 850 V
2/13 Doc ID 13304 Rev 3
mA
ACST2 Characteristics
(A)

Table 4. Static electrical characteristics

Symbol Test conditions Value Unit
(1)
V
V
R
I I
TM
TO
D
DRM
RRM
I
= 2.8 A, tp = 500 µs Tj = 25 °C MAX 2 V
TM
(1)
Threshold voltage Tj = 125 °C MAX 0.9 V
(1)
Dynamic resistance Tj = 125 °C MAX 250 mΩ
V
OUT
= V
DRM
/ V
RRM
Tj = 25 °C
MAX
= 125 °C 0.5 mA
T
j
10 µA
1. For both polarities of OUT pin referenced to COM pin

Table 5. Thermal resistances

Symbol Parameter Value Unit
DPAK 4.5
R
th(j-c)
Junction to case (AC)
TO-220FPAB 7
TO-220FPAB 60
R
th(j-a)
1. SCU = copper surface under tab
Figure 2. Maximum power dissipation versus
P(W)
2.8
α=180 °
2.4
2.0
1.6
1.2
0.8
0.4
0.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Junction to ambient
on-state rms current (full cycle)
180°
I
(A)
T(RMS)
(1)
S
= 0.5 cm
CU
²
DPAK 70
Figure 3. On-state rms current versus case
temperature
I
T(RMS)
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
α=180 °
0.2
0.0
0 25 50 75 100 125
TC(°C)
TO-220FPAB
DPAK
°C/W
Doc ID 13304 Rev 3 3/13
Characteristics ACST2
Figure 4. On-state rms current versus
ambient temperature
I
(A)
T(RMS)
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0 25 50 75 100 125
T
(°C)
amb
α=180 °
Printed circuit board FR4
Natural convection
=0.5 cm²
S
CU
Figure 6. Relative variation of thermal
impedance versus pulse duration DPAK
K=[Zth/Rth]
1.0E+00
Z
th(j-c)
Z
1.0E-01
1.0E-02
1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03
th(j-a)
tP(s)
DPAK
Figure 8. Relative variation of static dV/dt
versus junction temperature
dV/dt [ Tj]/dV/dt[Tj=125 °C]
100
10
1
25 50 75 100 125
Tj(°C)
V
=540 V
OUT
Figure 5. Relative variation of thermal
impedance versus pulse duration TO-220FPAB
K=[Zth/Rth]
1.00
Z
th(j-c)
Z
0.10
0.01
1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03
th(j-a)
tP(s)
TO-220FPAB
Figure 7. Relative variation of gate trigger,
holding and latching current versus junction temperature
IGT,IH,IL[TJ]/IGT,IH,IL[Tj=25 °C]
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
I
GT
IL& I
H
Tj(°C)
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
Typical values
Figure 9. Relative variation of critical rate of
decrease of main current versus reapplied dV/dt (typical values)
(dI/dt)c[(dV/dt)c] / Specified (dI/dt)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.1 1.0 10.0 100.0
c
(dV/dt)c(V/µs)
V
=300 V
OUT
4/13 Doc ID 13304 Rev 3
Loading...
+ 9 hidden pages