ST A7985A User Manual

2 A step-down switching regulator for automotive applications

Features

■ 2 A DC output current

■ Qualified following AEC-Q100 requirements

(see PPAP for more details)

■ 4.5 V to 38 V input voltage

■ Output voltage adjustable from 0.6 V

■ 250 kHz switching frequency, programmable

up to 1 MHz

■ Internal soft-start and enable

■ Low dropout operation: 100% duty cycle

■ Voltage feed-forward

■ Zero load current operation

■ Overcurrent and thermal protection

■ HSOP8 package

Applications

■ Dedicated to automotive applications

■ Automotive LED driving

A7985A

Datasheet − preliminary data

HSOP8 exposed pad

Description

The A7985A is a step-down switching regulator with a 2.5 A (minimum) current limited embedded power MOSFET, so it is able to deliver up to 2 A current to the load depending on the application conditions.

The input voltage can range from 4.5 V to 38 V, while the output voltage can be set starting from

0.6 V to V

Requiring a minimum set of external components, the device includes an internal 250 kHz switching frequency oscillator that can be externally adjusted up to 1 MHz.

The HSOP package with exposed pad allows the reduction of R

down to 40 °C/W.

thJA

Figure 1. Application circuit

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April 2012 Doc ID 023128 Rev 1 1/45

This is preliminar y information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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Contents A7985A

Contents

1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.1 Oscillator and synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.2 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5.3 Error amplifier and compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.4 Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.5 Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.6 Hysteretic thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

6 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6.1 Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6.2 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6.3 Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

6.4 Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6.4.1 Type III compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

6.4.2 Type II compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6.5 Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6.6 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

6.7 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

7 Application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

7.1 Positive buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

7.2 Inverting buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

2/45 Doc ID 023128 Rev 1

A7985A Contents

8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

9 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Doc ID 023128 Rev 1 3/45

List of tables A7985A

List of tables

Table 1. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Uncompensated error amplifier characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 6. Input MLCC capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 7. Inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Table 8. Output capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Table 9. Component list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 10. HSOP8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Table 11. Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

4/45 Doc ID 023128 Rev 1

A7985A List of figures

List of figures

Figure 1. Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 4. Oscillator circuit block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 5. Sawtooth: voltage and frequency feed-forward; external synchronization . . . . . . . . . . . . . 12

Figure 6. Oscillator frequency versus the FSW pin resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 7. Soft-start scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 8. Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 9. The error amplifier, the PWM modulator and the LC output filter . . . . . . . . . . . . . . . . . . . . 21

Figure 10. Type III compensation network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 11. Open loop gain: module Bode diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 12. Open loop gain Bode diagram with ceramic output capacitor . . . . . . . . . . . . . . . . . . . . . . 25

Figure 13. Type II compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 14. Open loop gain: module Bode diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 15. Open loop gain Bode diagram with electrolytic/tantalum output capacitor . . . . . . . . . . . . . 29

Figure 16. Switching losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 17. Layout example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 18. Demonstration board application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 19. PCB layout: A7985A (component side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 20. PCB layout: A7985A (bottom side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 21. PCB layout: A7985A (front side). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 22. Junction temperature vs. output current @ V Figure 23. Junction temperature vs. output current @ V Figure 24. Junction temperature vs. output current @ V Figure 25. Efficiency vs. output current @ V Figure 26. Efficiency vs. output current@ V Figure 27. Efficiency vs. output current@ V

= 1.8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

= 5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

= 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 28. Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 29. Line regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 30. Load transient: from 0.4 A to 2 A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 31. Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 32. Short-circuit behavior @ VIN=12 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 33. Short-circuit behavior @ VIN=24 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 34. Positive buck-boost regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 35. Maximum output current according to max. DC switch current (2.0 A): VO=12 V . . . . . . . 38

Figure 36. Inverting buck-boost regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 37. Maximum output current according to switch max. peak current (2.0 A): VO=-5 V . . . . . . 40

Figure 38. Package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

= 24 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

= 12 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

= 5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Doc ID 023128 Rev 1 5/45

Pin settings A7985A

1 Pin settings

1.1 Pin connection

Figure 2. Pin connection (top view)

1.2 Pin description

Table 1. Pin description

N. Type Description

1 OUT Regulator output

Master/slave synchronization. When it is left floating, a signal with a phase shift of half a period in respect to the power turn-on is present at the pin. When connected to an external signal at a frequency higher than

2 SYNCH

3EN

4 COMP Error amplifier output to be used for loop frequency compensation

5FB

6FSW

7 GND Ground

the internal one, the device is synchronized by the external signal, with zero phase shift.

Connecting together the SYNCH pins of two devices, the one with the higher frequency works as master and the other as slave; so the two power turn-ons have a phase shift of half a period.

A logical signal (active high) enables the device. With EN higher than

1.2 V the device is ON and with EN lower than 0.63 V the device is OFF.

Feedback input. Connecting the output voltage directly to this pin the output voltage is regulated at 0.6 V. To have higher regulated voltages an external resistor divider is required from Vout to the FB pin.

The switching frequency can be increased connecting an external resistor from the FSW pin and ground. If this pin is left floating the device works at its free-running frequency of 250 KHz.

Unregulated DC input voltage

6/45 Doc ID 023128 Rev 1

A7985A Maximum ratings

2 Maximum ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

Vcc Input voltage 45

OUT Output DC voltage -0.3 to V

FSW, COMP, SYNCH Analog pin -0.3 to 4

EN Enable pin -0.3 to V

FB Feedback voltage -0.3 to 1.5

TOT

stg

3 Thermal data

Table 3. Thermal data

Symbol Parameter Value Unit

thJA

1. Package mounted on demonstration board.

Maximum thermal resistance junction-ambient

Power dissipation

< 60 °C

at T

HSOP 2 W

Junction temperature range -40 to 150 °C

Storage temperature range -55 to 150 °C

(1)

HSOP8 40 °C/W

Doc ID 023128 Rev 1 7/45

Electrical characteristics A7985A

4 Electrical characteristics

TJ=-40 °C to 125 °C, VCC=12 V, unless otherwise specified.

Table 4. Electrical characteristics

Values

Symbol Parameter Test condition

Min. Typ. Max.

Unit

CCON

CCHYS

DSON

LIM

Operating input voltage range

4.5 38

Tur n - on VCC threshold 4.5

VCC UVLO hysteresis 0.1 0.4

MOSFET ONresistance

Maximum limiting current

2.5 3.5 A

200 400 mΩ

Oscillator

Switching frequency 210 250 275 kHz

FSW pin voltage 1.254 V

FSW

D Duty cycle 0 100 %

ADJ

Adjustable switching frequency

= 33 kΩ 1000 kHz

FSW

Dynamic characteristics

Feedback voltage 4.5 V < V

< 38 V 0.582 0.6 0.618 V

DC characteristics

QST-BY

Quiescent current Duty cycle = 0, V

Total standby quiescent current

= 0.8 V 2.4 mA

20 30 µA

Enable

Device OFF level 0.3

EN threshold voltage

Device ON level 1.2

EN current EN = V

Soft-start

FSW pin floating 7.3 8.2 9.8

Soft-start duration

F R

FSW

=1 MHz,

= 33 kΩ

Error amplifier

8/45 Doc ID 023128 Rev 1

7.5 10 µA

A7985A Electrical characteristics

Table 4. Electrical characteristics (continued)

Values

Symbol Parameter Test condition

Min. Typ. Max.

Unit

O SOURCE

O SINK

High level output voltage

Low level output voltage V

Source COMP pin V

Sink COMP pin V

Open loop voltage gain

Synchronization function

S_IN,HI

S_IN,LO

S_IN_PW

SYNCH,LO

S_OUT,HI

S_OUT_PW

High input voltage 2 3.3

Low input voltage 1

Input pulse width

Slave sink current V

Master output amplitude I

Output pulse width SYNCH floating 110 ns

Protection

Thermal shutdown 150

SHDN

Hysteresis 30

< 0.6 V 3

> 0.6 V 0.1

= 0.5 V, V

= 0.7 V, V

(1)

S_IN,HI

SYNCH

SOURCE

= 3 V, V

= 2 V, V

= 2.9 V 0.7 1 mA

= 4.5 mA 2 V

= 1 V 19 mA

COMP

= 0.75 V 30 mA

COMP

100 dB

= 0 V 100

S_IN,LO

= 1 V 300

S_IN,LO

°C

1. Guaranteed by design.

Doc ID 023128 Rev 1 9/45

Functional description A7985A

5 Functional description

The A7985A is based on a “voltage mode”, constant frequency control. The output voltage

is sensed by the feedback pin (FB) compared to an internal reference (0.6 V) providing

OUT

an error signal that, compared to a fixed frequency sawtooth, controls the ON and OFF time of the power switch.

The main internal blocks are shown in the block diagram in Figure 3. They are:

● A fully integrated oscillator that provides sawtooth to modulate the duty cycle and the

synchronization signal. Its switching frequency can be adjusted by an external resistor. The voltage and frequency feed-forward are implemented

● Soft-start circuitry to limit inrush current during the startup phase

● Voltage mode error amplifier

● Pulse width modulator and the relative logic circuitry necessary to drive the internal

power switch

● High-side driver for embedded P-channel power MOSFET switch

● Peak current limit sensing block, to handle overload and short-circuit conditions

● A voltage regulator and internal reference. It supplies internal circuitry and provides a

fixed internal reference

● A voltage monitor circuitry (UVLO) that checks the input and internal voltages

● A thermal shutdown block, to prevent thermal run-away.

Figure 3. Block diagram

TRIMMING UVLO

TRIMMING UVLOUVLO

COMP

0.6V

SOFT-

START

REGULATOR

BANDGAP

1.254V 3.3V

THERMAL

SHUTDOWN

E/A

OSCILLATOR

FSW

PWM

GND

PEAK

CURRENT

LIMIT

SRQ

SYNCH

PHASE SHIFT

SYNCH

DRIVER

VCC

OUT

10/45 Doc ID 023128 Rev 1

A7985A Functional description

5.1 Oscillator and synchronization

Figure 4 shows the block diagram of the oscillator circuit. The internal oscillator provides a

constant frequency clock. Its frequency depends on the resistor externally connected to the FSW pin. If the FSW pin is left floating, the frequency is 250 kHz; it can be increased as shown in Figure 6 by an external resistor connected to ground.

To improve the line transient performance, keeping the PWM gain constant versus the input voltage, the voltage feed-forward is implemented by changing the slope of the sawtooth according to the input voltage change (see Figure 5.a).

The slope of the sawtooth also changes if the oscillator frequency is increased by the external resistor. In this way, a frequency feed-forward is implemented (Figure 5.b) in order to keep the PWM gain constant versus the switching frequency (see Section 6.4 for PWM gain expression).

On the SYNCH pin the synchronization signal is generated. This signal has a phase shift of 180° with respect to the clock. This delay is useful when two devices are synchronized connecting the SYNCH pin together. When SYNCH pins are connected, the device with the higher oscillator frequency works as master, so the slave device switches at the frequency of the master but with a delay of half a period. This minimizes the RMS current flowing through the input capacitor (see the L5988D datasheet).

Figure 4. Oscillator circuit block diagram

Clock

ClockClock

FSW

The device can be synchronized to work at a higher frequency feeding an external clock signal. The synchronization changes the sawtooth amplitude, changing the PWM gain (Figure 5.c). This change must be taken into account when the loop stability is studied. To minimize the change of the PWM gain, the free-running frequency should be set (with a resistor on the FSW pin) only slightly lower than the external clock frequency. This preadjusting of the frequency changes the sawtooth slope in order to render negligible the truncation of sawtooth, due to the external synchronization.

Clock

Generator

Synchronization

Ramp

Generator

SYNCH

Sawtooth

Doc ID 023128 Rev 1 11/45

Functional description A7985A

Figure 5. Sawtooth: voltage and frequency feed-forward; external synchronization

Figure 6. Oscillator frequency versus the FSW pin resistor

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12/45 Doc ID 023128 Rev 1

;K/HMS=

A7985A Functional description

where:

⋅–=

desired switching frequency.

FSW

250 103⋅–

28.5 109⋅

--------------------------------------------- 3.23 10

5.2 Soft-start

Soft-start is essential to assure the correct and safe startup of the step-down converter. It avoids inrush current surge and makes the output voltage increase monothonically.

The soft-start is performed by a staircase ramp on the non-inverting input (V

) of the error

REF

amplifier. So the output voltage slew rate is:

Equation 1

VREF

⎛⎞

------- -+

⋅=

⎝⎠

where SR

OUT

is the slew rate of the non-inverting input, while R1and R2 is the resistor

VREF

divider to regulate the output voltage (see Figure 7). The soft-start staircase consists of 64 steps of 9.5 mV each, from 0 V to 0.6 V. The time base of one step is of 32 clock cycles. So the soft-start time and then the output voltage slew rate depend on the switching frequency.

Figure 7. Soft-start scheme

Soft-start time results:

Equation 2

TIME

32 64⋅

--------------------=

Fsw

For example, with a switching frequency of 250 kHz, the SS

Doc ID 023128 Rev 1 13/45

TIME

is 8 ms.

Functional description A7985A

5.3 Error amplifier and compensation

The error amplifier (E/A) provides the error signal to be compared with the sawtooth to perform the pulse width modulation. Its non-inverting input is internally connected to a 0.6 V voltage reference, while its inverting input (FB) and output (COMP) are externally available for feedback and frequency compensation. In this device the error amplifier is a voltage mode operational amplifier, so with high DC gain and low output impedance.

The uncompensated error amplifier characteristics are shown in Ta bl e 5 .

Table 5. Uncompensated error amplifier characteristics

Parameter Value

Low frequency gain 100 dB

GBWP 4.5 MHz

Slew rate 7 V/µs

Output voltage swing 0 to 3.3 V

Maximum source/sink current 17 mA/25 mA

In continuous conduction mode (CCM), the transfer function of the power section has two poles due to the LC filter and one zero due to the ESR of the output capacitor. Different kinds of compensation networks can be used depending on the ESR value of the output capacitor. In case the zero introduced by the output capacitor helps to compensate the double pole of the LC filter, a Type II compensation network can be used. Otherwise, a Type III compensation network must be used (see Section 6.4 for details of the compensation network selection).

The methodology to compensate the loop is to introduce zeroes to obtain a safe phase margin.

5.4 Overcurrent protection

The A7985A implements the overcurrent protection sensing current flowing through the power MOSFET. Due to the noise created by the switching activity of the power MOSFET, the current sensing is disabled during the initial phase of the conduction time. This avoids an erroneous detection of a fault condition. This interval is generally known as “masking time” or “blanking time”. The masking time is about 200 ns.

If the overcurrent limit is reached, the power MOSFET is turned off, implementing the pulseby-pulse overcurrent protection. Under an overcurrent condition, the device can skip turn-on pulses in order to keep the output current constant and equal to the current limit. If, at the end of the “masking time”, the current is higher than the overcurrent threshold, the power MOSFET is turned off and one pulse is skipped. If, at the following switching-on, when the “masking time” ends, the current is still higher than the overcurrent threshold, the device skips two pulses. This mechanism is repeated and the device can skip up to seven pulses. While, if at the end of the “masking time” the current is lower than the over current threshold, the number of skipped cycles is decreased by one unit (see Figure 8).

So the overcurrent/short-circuit protection acts by switching off the power MOSFET and reducing the switching frequency down to one eighth of the default switching frequency, in order to keep constant the output current around the current limit.

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