ST A5972D User Manual

Up to 1.5 A step down switching regulator

Features

■ Qualified following the AEC-Q100

requirements (see PPAP for more details)

■ 1.5A DC output current

■ Operating input voltage from 4 V to 36 V

■ 3.3 V / (±2%) reference voltage

■ Output voltage adjustable from 1.235 V to V

■

Low dropout operation: 100% duty cycle

■ 250 kHz Internally fixed frequency

■ Voltage feedforward

■ Zero load current operation

■ Internal current limiting

■ Inhibit for zero current consumption

■ Protection against feedback disconnection

■ Thermal shutdown

Application

■ Dedicated to automotive applications

Figure 1. Application schematic

A5972D

for automotive applications

SO8

Description

The A5972D is a step down monolithic power switching regulator with a minimum switch current limit of 1.8 A so it is able to deliver up to 1.5 A DC current to the load depending on the application conditions. The output voltage can be set from

1.235 V to V

The device uses an internal p-channel DMOS transistor (with a typical R switching element to minimize the size of the external components.

An internal oscillator fixes the switching frequency at 250 kHz. Having a minimum input voltage of 4 V only it fits the automotive applications requiring the device operation even in cold crank conditions. Pulse by pulse current limit with the internal frequency modulation offers an effective constant current short circuit protection.

of 250 mΩ) as

DS(on)

November 2009 Doc ID 13956 Rev 5 1/37

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Contents A5972D

Contents

1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Datasheet parameters over the temperature range . . . . . . . . . . . . . . . . 7

5 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.1 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.2 Voltages monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.3 Current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.4 Error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.5 PWM comparator and power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.6 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

6 Additional features and protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6.1 Feedback disconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6.2 Output overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6.3 Zero load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

7 Closing the loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

7.1 Error amplifier and compensation network . . . . . . . . . . . . . . . . . . . . . . . . 14

7.2 LC filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7.3 PWM comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

8 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

8.1 Component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

8.2 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

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A5972D Contents

8.3 Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

8.4 Short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

8.5 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

8.6 Positive buck-boost regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

8.7 Negative buck-boost regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

8.8 Compensation network with MLCC at the output . . . . . . . . . . . . . . . . . . . 30

9 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

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Pin settings A5972D

1 Pin settings

1.1 Pin connection

Figure 2. Pin connection (top view)

1.2 Pin description

Table 1. Pin description

N Pin Description

1 OUT Regulator output.

2,3,6,7 GND Ground.

4 COMP E/A output for frequency compensation.

Feedback input. Connecting directly to this pin results in an output

5FB

8 VCC Unregulated DC input voltage.

voltage of 1.23 V. An external resistive divider is required for higher output voltages.

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A5972D Electrical data

2 Electrical data

2.1 Maximum ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

, V

TOT

STG

Input voltage 40 V

OUT pin DC voltage OUT pin peak voltage at Δt = 0.1 μs

Maximum output current int. limit.

Analog pins 4 V

Power dissipation at T

Operating junction temperature range -40 to 150 °C

Storage temperature range -55 to 150 °C

2.2 Thermal data

Table 3. Thermal data

Symbol Parameter Value Unit

thJA

1. Package mounted on evaluation board

Maximum thermal resistance junction-ambient 65

-1 to 40

-5 to 40

≤ 70 °C 1.2 W

(1)

V V

°C/W

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Electrical characteristics A5972D

3 Electrical characteristics

TJ = -40 °C to 125 °C, VCC = 12 V, unless otherwise specified.

Table 4. Electrical characteristics

Symbol Parameter Test condition Min Typ Max Unit

DS(on)

Operating input voltage range

Mosfet on resistance 0.250 0.5 Ω

Maximum limiting

current

(1)

Switching frequency 212 250 280 kHz

Duty cycle 0 100 %

Dynamic characteristics (see test circuit)

η Efficiency V

Voltage feedback 4.4 V < V

= 5 V, V

DC characteristics

qop

Total operating quiescent current

Quiescent current Duty cycle = 0; VFB= 1.5 V 2.5 mA

Error amplifier

High level output voltage

Low level output

voltage

436V

= 5 V 1.8 2.5 3

= 5 V, TJ = 25 °C 2 2.5 3

< 36 V, 1.198 1.235 1.272 V

= 12 V 90 %

35mA

= 1 V 3.5 V

= 1.5 V 0.4 V

= 1.9 V;

o source

o sink

Source output current

Sink output current

b Source bias current 2.5 4 μA

DC open loop gain R

gm Transconductance

1. With TJ = 85 °C, I

= 2 A, assured by design, characterization and statistical correlation.

lim_min

COMP

= 1 V

= 1.9 V;

COMP

= 1.5 V

L=5065dB

= -0.1 mA to 0.1 mA;

COMP

= 1.9 V

COMP

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190 300 μA

11.5 mA

2.3 mS

A5972D Datasheet parameters over the temperature range

4 Datasheet parameters over the temperature range

The 100% of the population in the production flow is tested at three different ambient temperatures (-40 °C; +25 °C, +125 °C) to guarantee the datasheet parameters inside the junction temperature range (-40 °C; +125 °C).

The device operation is so guaranteed when the junction temperature is inside the (-40 °C; +150 °C) temperature range. The designer can estimate the silicon temperature increase respect to the ambient temperature evaluating the internal power losses generated during the device operation (please refer to the Chapter 2.2).

However the embedded thermal protection disables the switching activity to protect the device in case the junction temperature reaches the T temperature.

All the datasheet parameters can be guaranteed to a maximum junction temperature of +125 °C to avoid triggering the thermal shutdown protection during the testing phase because of self heating.

SHTDWN

(+150 °C±10 °C)

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Functional description A5972D

5 Functional description

The main internal blocks are shown in the device block diagram in Figure 3. They are:

● A voltage monitor circuit which checks the input and the internal voltages.

● A fully integrated sawtooth oscillator with a frequency of 250 kHz ± 15%, including also

the voltage feed forward function and an input/output synchronization pin.

● Two embedded current limitation circuits which control the current that flows through

the power switch. The pulse-by-pulse current limit forces the power switch OFF cycle by cycle if the current reaches an internal threshold, while the frequency shifter reduces the switching frequency in order to significantly reduce the duty cycle.

● A transconductance error amplifier.

● A pulse width modulator (PWM) comparator and the relative logic circuitry necessary to

drive the internal power.

● A high side driver for the internal P-MOS switch.

● A circuit to implement the thermal protection function.

Figure 3. Block diagram

5.1 Power supply

The internal regulator circuit (shown in Figure 4) consists of a start-up circuit, an internal voltage pre-regulator, the Bandgap voltage reference and the Bias block that provides current to all the blocks. The Starter supplies the start-up currents to the entire device when the input voltage goes high and the device is enabled (inhibit pin connected to ground). The pre-regulator block supplies the Bandgap cell with a pre-regulated voltage V very low supply voltage noise sensitivity.

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that has a

REG

A5972D Functional description

5.2 Voltages monitor

An internal block continuously senses the Vcc, V their thresholds, the regulator begins operating. There is also a hysteresis on the V (UVLO).

Figure 4. Internal circuit

5.3 Current protection

The A5972D features two types of current limit protection: pulse-by-pulse and frequency foldback.

The schematic of the current limitation circuitry for the pulse-by-pulse protection is shown in

Figure 5. The output power PDMOS transistor is split into two parallel PDMOS transistors.

The smallest one includes a resistor in series, R R switched off until the next falling edge of the internal clock pulse. Due to this reduction of the ON time, the output voltage decreases. Since the minimum switch ON time necessary to sense the current in order to avoid a false overcurrent signal is too short to obtain a sufficiently low duty cycle at 250 kHz (see Chapter 8.4), the output current in strong overcurrent or short circuit conditions could be not properly limited. For this reason the switching frequency is also reduced, thus keeping the inductor current under its maximum threshold. The frequency shifter (Figure 5) functions based on the feedback voltage. As the feedback voltage decreases (due to the reduced duty cycle), the switching frequency decreases also.

and if it reaches the threshold, the mirror becomes unbalanced and the PDMOS is

SENSE

and Vbg. If the voltages go higher than

ref

. The current is sensed through

SENSE

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Functional description A5972D

Figure 5. Current limitation circuitry

5.4 Error amplifier

The voltage error amplifier is the core of the loop regulation. It is a transconductance operational amplifier whose non inverting input is connected to the internal voltage reference (1.235 V), while the inverting input (FB) is connected to the external divider or directly to the output voltage. The output (COMP) is connected to the external compensation network. The uncompensated error amplifier has the following characteristics:

Table 5. Uncompensated error amplifier characteristics

Description Values

Transconductance 2300 µS

Low frequency gain 65 dB

Minimum sink/source voltage 1500 µA/300 µA

Output voltage swing 0.4 V/3.65 V

Input bias current 2.5 µA

The error amplifier output is compared to the oscillator sawtooth to perform PWM control.

5.5 PWM comparator and power stage

This block compares the oscillator sawtooth and the error amplifier output signals to generate the PWM signal for the driving stage.

The power stage is a highly critical block, as it functions to guarantee a correct turn ON and turn OFF of the PDMOS. The turn ON of the power element, or more accurately, the rise time of the current at turn ON, is a very critical parameter. At a first approach, it appears that the faster the rise time, the lower the turn ON losses.

However, there is a limit introduced by the recovery time of the recirculation diode.

In fact, when the current of the power element is equal to the inductor current, the diode turns OFF and the drain of the power is able to go high. But during its recovery time, the

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A5972D Functional description

diode can be considered a high value capacitor and this produces a very high peak current, responsible for numerous problems:

● Spikes on the device supply voltage that cause oscillations (and thus noise) due to the

board parasites.

● Turn ON overcurrent leads to a decrease in the efficiency and system reliability.

● Major EMI problems.

● Shorter freewheeling diode life.

The fall time of the current during turn OFF is also critical, as it produces voltage spikes (due to the parasites elements of the board) that increase the voltage drop across the PDMOS.

In order to minimize these problems, a new driving circuit topology has been used and the block diagram is shown in Figure 6. The basic idea is to change the current levels used to turn the power switch ON and OFF, based on the PDMOS and the gate clamp status.

This circuitry allows the power switch to be turned OFF and ON quickly and addresses the freewheeling diode recovery time problem. The gate clamp is necessary to ensure that V of the internal switch does not go higher than V

max. The ON/OFF Control block protects

against any cross conduction between the supply line and ground.

Figure 6. Driving circuitry

5.6 Thermal shutdown

The shutdown block generates a signal that turns OFF the power stage if the temperature of the chip goes higher than a fixed internal threshold (150±10 °C). The sensing element of the chip is very close to the PDMOS area, ensuring fast and accurate temperature detection. A hysteresis of approximately 20 °C keeps the device from turning ON and OFF continuously.

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Additional features and protection A5972D

6 Additional features and protection

6.1 Feedback disconnection

If the feedback is disconnected, the duty cycle increases towards the maximum allowed value, bringing the output voltage close to the input supply. This condition could destroy the load.

To avoid this hazardous condition, the device is turned OFF if the feedback pin is left floating.

6.2 Output overvoltage protection

Overvoltage protection, or OVP, is achieved by using an internal comparator connected to the feedback, which turns OFF the power stage when the OVP threshold is reached. This threshold is typically 30% higher than the feedback voltage.

When a voltage divider is required to adjust the output voltage (Figure 13), the OVP intervention will be set at:

Equation 1

Where R R

is between the feedback pin and ground.

is the resistor connected between the output voltage and the feedback pin, and

6.3 Zero load

Due to the fact that the internal power is a PDMOS, no boostrap capacitor is required and so the device works properly even with no load at the output. In this case it works in burst mode, with a random burst repetition rate.

OVP

R1R2+

--------------------

1.3

• V

•=

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