ST 74VHCT574A User Manual

74VHCT574A

OCTAL D-TYP E FLIP FLOP

WITH 3 STATE OUTPUTS NON INVERTING

■ HIGH SPEED:

f

= 180 MHz (TYP.) at VCC = 5V

MAX

■ LOW POWER DISSIPATION:

I

= 4 µA (MAX.) at TA=25°C

CC

■ COMPATIBLE WITH TTL OUTPUTS:

V

= 2V (MIN.), V

IH

■ POWER DOWN PROTECTION ON INPUTS

= 0.8V (MAX)

IL

& OUTPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE:

|I

| = IOL = 8 mA (MIN)

OH

■ BALANCED PROPAGATION DELAYS:

t

≅ t

PLH

PHL

■ OPERATING VOLTAGE RANGE :

V

(OPR) = 4.5V to 5.5V

CC

■ PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 574

■ IMPROVED LATCH-UP IMMUNITY

■ LOW NOISE: V

= 0.9V (MAX.)

OLP

DESCRIPTION

The 74VHCT574A is an advanced high-speed
CMOS OCT AL D- TYP E FL I P FL O P wi th 3 S TAT E
OUTPUTS NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C

2

MOS technology.
These 8 bit D-Type flip-flop is controlled by a clock
input (CK) and an output enable input (OE

).
On the positive transition of the clock, the Q
outputs will be set to the logic states that were
setup at the D inputs.

Figure 1: Pi n C onnect ion And I E C Logic Sym bols

TSSOPSOP

Table 1: Order Codes

PACKAGE T & R

SOP 74VHCT574AMTR

TSSOP 74VHCT574ATTR

When the (OE

) input is low, the 8 outputs will be in
a normal logic state (high or low logic level) and
when (OE

) is high, the out puts will be in a hi gh
impedance state.
The Output control does not affect the internal
operation of flip flop; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used t o interf ace 5V to 3V s ince al l
inputs are equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static disc harge, giving
them 2KV ESD immunity and transient excess
voltage.

Rev. 4

1/13December 2004

74VHCT574A

Figure 2: Input Equivalent Circuit Table 2: Pin Description

PIN N° SYMBOL NAME AND FUNCTION

1OE

2, 3, 4, 5, 6,

7, 8, 9

12, 13, 14,
15, 16, 17,

18, 19

1 1 CK Clock Input (LOW-to-HIGH

10 GND Ground (0V)
20 V

Table 3: Truth Ta ble

INPUTS OUTPUT

D0 to D7 Data Inputs

Q0 to Q7 3-State Outputs

CC

3-State Output Enable
Input (Active LOW)

Edge Triggered)

Positive Supply Voltage

OE

HXXZ

L X NO CHANGE
LLL
LHH

X : Don’t Care
Z : High Impedance

Figure 3: Logic Diagram

CK D Q

2/13

74VHCT574A

Table 4: Absolute Maximum Ratings

Symbol Parameter Value Unit

V

V
V
V

I

I

OK

I

or I

I

CC

T

T

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied

1) Output in OFF State

2) High or Low State

Table 5: Recommended Operating Conditions

Symbol Parameter Value Unit

V

V

V
V
T

dt/dv

Supply Voltage

CC

DC Input Voltage

I

DC Output Voltage (see note 1)

O

DC Output Voltage (see note 2) -0.5 to VCC + 0.5

O

DC Input Diode Current

IK

DC Output Diode Current
DC Output Current

O

DC VCC or Ground Current

GND

Storage Temperature

stg

Lead Temperature (10 sec)

L

Supply Voltage

CC

Input Voltage

I

Output Voltage (see note 1)

O

Output Voltage (see note 2) 0 to V

O

Operating Temperature

op

Input Rise and Fall Time (see note 3) (V

= 5.0 ± 0.5V)

CC

-0.5 to +7.0 V

-0.5 to +7.0 V

-0.5 to +7.0 V

- 20 mA

± 20 mA
± 25 mA
± 50 mA

-65 to +150 °C
300 °C

4.5 to 5.5 V
0 to 5.5 V
0 to 5.5 V

CC

-55 to 125 °C
0 to 20 ns/V

V

V

1) Output in OFF State

2) High or Low State

3) V

from 0.8V to 2V

IN

3/13

74VHCT574A

Table 6: DC Specifications

Symbol Parameter

V

V

V

+I

I

High Level Input

IH

Voltage
Low Level Input

V

IL

Voltage
High Level Output

OH

Voltage
Low Level Output

OL

Voltage

I

High Impedance

OZ

Output Leakage
Current

Input Leakage

I

I

Current
Quiescent Supply

I

CC

Current
Additional Worst

CC

Case Supply
Current

Output Leakage

OPD

Current

Test Condition Value

= 25°C

T

V

CC

(V)

4.5 to

5.5

A

Min. Typ. Max. Min. Max. Min. Max.

222V

4.5 to

5.5

4.5

4.5

4.5

4.5

4.5 to

5.5

0 to

5.5

5.5

I

O

=-8 mA

I

O

=50 µA

I

O

=8 mA

I

O

= VIH or V

V

I

VO = 0V to 5.5V

= 5.5V or GND

V

I

= VCC or GND

V

I

4.4 4.5 4.4 4.4

3.94 3.8 3.7

0.0 0.1 0.1 0.1

IL

±0.25 ± 2.5 ± 2.5 µA

=-50 µA

One Input at 3.4V,
other input at V

5.5

CC

or GND

= 5.5V

0

V

OUT

-40 to 85°C -55 to 125°C

Unit

0.8 0.8 0.8 V

V

0.36 0.44 0.55

V

± 0.1 ± 1.0 ± 1.0 µA

44040µA

1.35 1.5 1.5 mA

0.5 5.0 5.0 µA

Table 7: AC Electrical Characteristics (Input t

Test Condition Value

Symbol Parameter

t

Propagation Delay

PLH

t
t

t
t

t
f

t

OSLH

t

OSHL

(*) Voltage range is 5.0V ± 0.5V
Note 1: Parameter guaranteed by design. t

Time CK to Q

PHL

Output Enable

PZL

Time

PZH

Output Disable

PLZ

Time

PHZ

Maximum Clock

MAX

Frequency
Output to Output

Skew time (note 1)

V

(V)

5.0

5.0

5.0

5.0

5.0

5.0

5.0

5.0

C

CC

L

(pF)

(*)

15 5.5 8.6 1.0 10.0 1.0 10.0

(*)

50 7.0 10.6 1.0 12.0 1.0 12.0

(*)

15

(*)

(*)

(*)
(*)

(*)

soLH

= |t

RL = 1K

50 6.0 11.0 1.0 12.5 1.0 12.5
50 RL = 1KΩ 7.0 10.1 1.0 11.5 1.0 11.5 ns
15 90 140 80 80

50 85 130
50 1.5 1.5 1.5 ns

- t

pLHm

pLHn

= tf = 3ns)

r

Min. Typ. Max. Min. Max. Min. Max.

Ω

|, t

= |t

soHL

pHLm

= 25°C

T

A

-40 to 85°C -55 to 125°C

5.0 9.0 1.0 10.5 1.0 10.5

- t

|

pHLn

Unit

ns

ns

MHz

4/13