ST 74VHC594 User Manual

74VHC594

8 BIT SHIFT REGISTER WITH OUTPUT REGISTER

■HIGH SPEED: tPD = 4.2ns (TYP.) at VCC = 5V

■LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C

■HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)

■POWER DOWN PROTECTION ON INPUTS

■SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN)

■BALANCED PROPAGATION DELAYS: tPLH tPHL

■OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V

■PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 594

SOP TSSOP

Table 1: Order Codes

PACKAGE	T & R
SOP	M74VHC594RMTR
TSSOP	M74VHC594TTR

■IMPROVED LATCH-UP IMMUNITY

■LOW NOISE: VOLP = 0.8V (MAX.)

DESCRIPTION

The 74VHC594 is an high speed CMOS 8-BIT SHIFT REGISTERS fabricated with sub-micron silicon gate C2MOS technology.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clear (SCLR, RCLR) are provided for both the shift register and the storage register.

A serial (QH’) output is provided for cascading purposes. Both the shift register and storage register use positive-edge triggered clocks. If the clocks are connected together, the shift register state will always be one clock pulse ahead of the storage register.

Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

All inputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

Figure 1: Pin Connection And IEC Logic Symbols

November 2004	Rev. 5
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74VHC594

Figure 2: Input Equivalent Circuit	Table 2: Pin Description
	PIN N°	SYMBOL	NAME AND FUNCTION
	1, 2, 3, 4, 5,	QA to QH	Data Outputs
	6, 7, 15
	9	QH’	Serial Data Output
	10	SCLR	Shift Register Clear Input
	11	SCK	Shift Register Clock Input
	13	RCLR	Storage Register Clear
			Input
	14	SI	Serial Data Input
	12	RCK	Storage Register Clock
			Input
	8	GND	Ground (0V)
	16	VCC	Positive Supply Voltage

Table 3: Truth Table

INPUTS

OUTPUTS

SI

SCK

SCLR

RCK

RCLR

X

X

L

X

X

SHIFT REGISTER IS CLEAR

FIRST STAGE OF SHIFT REGISTER GOES LOW

L

H

X

X

OTHER STAGES STORE THE DATA OF PREVI-

OUS STAGE, RESPECTIVELY

FIRST STAGE OF SHIFT REGISTER GOES HIGH

H

H

X

X

OTHER STAGES STORE THE DATA OF PREVI-

OUS STAGE, RESPECTIVELY

L

H

X

X

SHIFT REGISTER STATE IS NOT CHANGED

X

X

X

X

L

STORAGE REGISTER IS CLEARED

X

X

X

H

SHIFT REGISTER DATA IS STORED IN THE

STORAGE REGISTER

X

X

X

H

STORAGE REGISTER STATE IS NOT CHANGED

X: Don’t Care

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74VHC594

Figure 3: Logic Diagram

This logic diagram has not be used to estimate propagation delays

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74VHC594

Figure 4: Timing Chart

Table 4: Absolute Maximum Ratings

Symbol	Parameter	Value		Unit
VCC	Supply Voltage	-0.5 to +7.0		V
VI	DC Input Voltage	-0.5 to +7.0		V
VO	DC Output Voltage	-0.5 to VCC + 0.5		V
IIK	DC Input Diode Current	- 20		mA
IOK	DC Output Diode Current	±	20	mA
IO	DC Output Current	±	25	mA
ICC or IGND	DC VCC or Ground Current	±	50	mA
Tstg	Storage Temperature	-65 to +150		°C
TL	Lead Temperature (10 sec)	300		°C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

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74VHC594

Table 5: Recommended Operating Conditions

Symbol

Parameter

Value

Unit

VCC

Supply Voltage

2 to 5.5

V

VI

Input Voltage

0 to 5.5

V

VO

Output Voltage

0 to VCC

V

Top

Operating Temperature

-55 to 125

°C

dt/dv

Input Rise and Fall Time (note 1) (VCC = 3.3 ±

0.3V)

0 to 100

ns/V

(VCC = 5.0

± 0.5V)

0 to 20

1) VI from 30% to 70% of VCC

Table 6: DC Specifications

Test Condition

Value

Symbol

Parameter

VCC

TA = 25°C

-40 to 85°C

-55 to 125°C

Unit

(V)

Min.

Typ.

Max.

Min.

Max.

Min.

Max.

VIH

High Level Input

2.0

1.5

1.5

1.5

Voltage

3.0 to

0.7VCC

0.7VCC

0.7VCC

V

5.5

VIL

Low Level Input

2.0

0.5

0.5

0.5

Voltage

3.0 to

0.3VCC

0.3VCC

0.3VCC

V

5.5

VOH

High Level Output

2.0

IO=-50 A

1.9

2.0

1.9

1.9

Voltage

3.0

IO=-50 A

2.9

3.0

2.9

2.9

4.5

IO=-50 A

4.4

4.5

4.4

4.4

V

3.0

IO=-4 mA

2.58

2.48

2.4

4.5

IO=-8 mA

3.94

3.8

3.7

VOL

Low Level Output

2.0

IO=50 A

0.0

0.1

0.1

0.1

Voltage

3.0

IO=50 A

0.0

0.1

0.1

0.1

4.5

IO=50 A

0.0

0.1

0.1

0.1

V

3.0

IO=4 mA

0.36

0.44

0.55

4.5

IO=8 mA

0.36

0.44

0.55

II

Input Leakage

0 to

VI = 5.5V or GND

±

0.1

±

1

±

1

A

Current

5.5

Ioff

Power Off Leakage

0

VI = 0 to 5V

±

0.1

±

5

±

5

A

Current

ICC

Quiescent Supply

5.5

VI = VCC or GND

4

40

40

A

Current

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