74VHC08
QUAD 2-INPUT AND GATE
■HIGH SPEED: tPD = 4.3 ns (TYP.) at VCC = 5V
■LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA=25°C
■HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)
■POWER DOWN PROTECTION ON INPUTS
■SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN)
■BALANCED PROPAGATION DELAYS: tPLH tPHL
■OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V
■PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 08
■IMPROVED LATCH-UP IMMUNITY
■LOW NOISE: VOLP = 0.8V (MAX.)
DESCRIPTION
The 74VHC08 is an advanced high-speed CMOS QUAD 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
The internal circuit is composed of 2 stages including buffer output, which provides high noise immunity and stable output.
SOP TSSOP
PACKAGE |
T & R |
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SOP |
74VHC08MTR |
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TSSOP |
74VHC08TTR |
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Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
November 2004 |
Rev. 5 |
1/11 |
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74VHC08
Figure 2: Input Equivalent Circuit |
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Table 2: Pin Description |
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PIN N° |
SYMBOL |
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NAME AND FUNCTION |
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1, 4, 9, 12 |
1A to 4A |
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Data Inputs |
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2, 5, 10, 13 |
1B to 4B |
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Data Inputs |
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3, 6, 8, 11 |
1Y to 4Y |
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Data Outputs |
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7 |
GND |
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Ground (0V) |
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14 |
VCC |
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Positive Supply Voltage |
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Table 3: Truth Table |
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A |
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B |
Y |
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L |
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L |
L |
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L |
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H |
L |
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H |
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L |
L |
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H |
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H |
H |
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Symbol |
Parameter |
Value |
Unit |
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VCC |
Supply Voltage |
-0.5 to +7.0 |
V |
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VI |
DC Input Voltage |
-0.5 to +7.0 |
V |
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VO |
DC Output Voltage |
-0.5 to VCC + 0.5 |
V |
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IIK |
DC Input Diode Current |
- 20 |
mA |
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IOK |
DC Output Diode Current |
± |
20 |
mA |
IO |
DC Output Current |
± |
25 |
mA |
ICC or IGND |
DC VCC or Ground Current |
± |
50 |
mA |
Tstg |
Storage Temperature |
-65 to +150 |
°C |
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TL |
Lead Temperature (10 sec) |
300 |
°C |
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied
Symbol |
Parameter |
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Value |
Unit |
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VCC |
Supply Voltage |
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2 to 5.5 |
V |
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VI |
Input Voltage |
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0 to 5.5 |
V |
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VO |
Output Voltage |
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0 to VCC |
V |
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Top |
Operating Temperature |
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-55 to 125 |
°C |
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dt/dv |
Input Rise and Fall Time (note 1) (VCC = 3.3 ± |
0.3V) |
0 to 100 |
ns/V |
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(VCC = 5.0 ± |
0.5V) |
0 to 20 |
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1) VIN from 30% to 70% of VCC
2/11
74VHC08
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Test Condition |
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Value |
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Symbol |
Parameter |
VCC |
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TA = 25°C |
-40 to 85°C |
-55 to 125°C |
Unit |
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(V) |
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Min. |
Typ. |
Max. |
Min. |
Max. |
Min. |
Max. |
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VIH |
High Level Input |
2.0 |
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1.5 |
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1.5 |
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1.5 |
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Voltage |
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3.0 to |
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0.7VCC |
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0.7VCC |
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0.7VCC |
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V |
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5.5 |
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VIL |
Low Level Input |
2.0 |
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0.5 |
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0.5 |
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0.5 |
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Voltage |
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3.0 to |
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0.3VCC |
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0.3VCC |
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0.3VCC |
V |
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5.5 |
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VOH |
High Level Output |
2.0 |
IO=-50 A |
1.9 |
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2.0 |
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1.9 |
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1.9 |
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Voltage |
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3.0 |
IO=-50 A |
2.9 |
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3.0 |
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2.9 |
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2.9 |
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4.5 |
IO=-50 A |
4.4 |
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4.5 |
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4.4 |
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4.4 |
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V |
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3.0 |
IO=-4 mA |
2.58 |
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2.48 |
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2.4 |
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4.5 |
IO=-8 mA |
3.94 |
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3.8 |
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3.7 |
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VOL |
Low Level Output |
2.0 |
IO=50 A |
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0.0 |
0.1 |
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0.1 |
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0.1 |
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Voltage |
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3.0 |
IO=50 A |
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0.0 |
0.1 |
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0.1 |
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0.1 |
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4.5 |
IO=50 A |
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0.0 |
0.1 |
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0.1 |
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0.1 |
V |
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3.0 |
IO=4 mA |
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0.36 |
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0.44 |
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0.55 |
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4.5 |
IO=8 mA |
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0.36 |
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0.44 |
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0.55 |
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II |
Input Leakage |
0 to |
VI = 5.5V or GND |
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± 0.1 |
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± 1 |
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± 1 |
A |
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Current |
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5.5 |
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ICC |
Quiescent Supply |
5.5 |
VI = VCC or GND |
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2 |
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20 |
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20 |
A |
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Current |
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Table 7: AC Electrical Characteristics (Input tr = tf = 3ns) |
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Test Condition |
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Value |
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Symbol |
Parameter |
VCC |
CL |
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TA = 25°C |
-40 to 85°C |
-55 to 125°C |
Unit |
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(V) |
(pF) |
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Min. |
Typ. |
Max. |
Min. |
Max. |
Min. |
Max. |
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tPLH |
Propagation Delay |
3.3(*) |
15 |
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6.2 |
8.8 |
1.0 |
10.5 |
1.0 |
10.5 |
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tPHL |
Time |
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3.3(*) |
50 |
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8.7 |
12.3 |
1.0 |
14.0 |
1.0 |
14.0 |
ns |
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5.0(**) |
15 |
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4.3 |
5.9 |
1.0 |
7.0 |
1.0 |
7.0 |
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5.0(**) |
50 |
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5.8 |
7.9 |
1.0 |
9.0 |
1.0 |
9.0 |
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(*) Voltage range is 3.3V ± |
0.3V |
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(**) Voltage range is 5.0V ± |
0.5V |
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3/11
74VHC08
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Test Condition |
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Value |
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Symbol |
Parameter |
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TA = 25°C |
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-40 to 85°C |
-55 to 125°C |
Unit |
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Min. |
Typ. |
Max. |
Min. |
Max. |
Min. |
Max. |
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CIN |
Input Capacitance |
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6 |
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10 |
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10 |
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10 |
pF |
CPD |
Power Dissipation |
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15 |
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pF |
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Capacitance |
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(note 1) |
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1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate)
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Test Condition |
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Value |
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Symbol |
Parameter |
VCC |
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TA = 25°C |
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-40 to 85°C |
-55 to 125°C |
Unit |
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(V) |
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Min. |
Typ. |
Max. |
Min. |
Max. |
Min. |
Max. |
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VOLP |
Dynamic Low |
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0.3 |
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0.8 |
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Voltage Quiet |
5.0 |
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V |
VOLV |
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-0.8 |
-0.3 |
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Output (note 1, 2) |
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VIHD |
Dynamic High |
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CL = 50 pF |
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Voltage Input |
5.0 |
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3.5 |
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V |
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(note 1, 3) |
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VILD |
Dynamic Low |
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Voltage Input |
5.0 |
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1.5 |
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V |
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(note 1, 3) |
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1)Worst case package.
2)Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND.
3)Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.
CL = 15/50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω )
4/11