74V2T241
74V2T241
DUAL BUS BUFFER NON INVERTED (3-STATE)
■HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V
■LOW POWER DISSIPATION: ICC = 1μA(MAX.) at TA = 25°C
■POWER DOWN PROTECTION ON INPUTS AND OUTPUTS
■COMPATIBLE WITH TTL LEVEL: VIH=2.0V(MIN), VIL=0.8V(MAX)
■SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN) at VCC = 4.5V
■BALANCED PROPAGATION DELAYS: tPLH tPHL
■OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V
■IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2T241 is an advanced high-speed CMOS DUAL BUS BUFFER NON INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
It has one active-high and one active-low output enable. Power down protection is provided on all
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SOT23-8L |
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ORDER CODES |
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PACKAGE |
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T & R |
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SOT23-8L |
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74V2T241STR |
inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V systems and it is ideal for portable applications like personal digital assistant, camcorder and all battery-powered equipment.
All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003 |
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74V2T241
INPUT EQUIVALENT CIRCUIT |
PIN DESCRIPTION |
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PIN N° |
SYMBOL |
NAME AND FUNCTION |
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1, 7 |
1G, 2G |
Output Enable Inputs |
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2, 5 |
1A, 2A |
Data Inputs |
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3, 6 |
2Y, 1Y |
Data Outputs |
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4 |
GND |
Ground (0V) |
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8 |
VCC |
Positive Supply Voltage |
TRUTH TABLE |
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1G |
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2G |
A |
Y |
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L |
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H |
L |
L |
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L |
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H |
H |
H |
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H |
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L |
X |
Z |
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X: "H" or "L" |
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Z: High Impedance |
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ABSOLUTE MAXIMUM RATINGS
Symbol |
Parameter |
Value |
Unit |
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VCC |
Supply Voltage |
-0.5 to +7.0 |
V |
VI |
DC Input Voltage |
-0.5 to +7.0 |
V |
VO |
DC Output Voltage (see note 1) |
-0.5 to +7.0 |
V |
VO |
DC Output Voltage (see note 2) |
-0.5 to VCC + 0.5 |
V |
IIK |
DC Input Diode Current |
− 20 |
mA |
IOK |
DC Output Diode Current |
− 20 |
mA |
IO |
DC Output Current |
± 25 |
mA |
ICC or IGND |
DC VCC or Ground Current |
± 50 |
mA |
Tstg |
Storage Temperature |
-65 to +150 |
°C |
TL |
Lead Temperature (10 sec) |
260 |
°C |
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
1)VCC=0V or nG=VCC(Output in High Impedance state)
2)High or Low State
RECOMMENDED OPERATING CONDITIONS
Symbol |
Parameter |
Value |
Unit |
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VCC |
Supply Voltage |
4.5 to 5.5 |
V |
VI |
Input Voltage |
0 to 5.5 |
V |
VO |
Output Voltage (see note 1) |
0 to 5.5 |
V |
VO |
Output Voltage (see note 2) |
0 to VCC |
V |
Top |
Operating Temperature |
-55 to 125 |
°C |
dt/dv |
Input Rise and Fall Time (note 3) (VCC = 5.0 ± 0.5V) |
0 to 20 |
ns/V |
1)VCC=0V or Output in High Impedance state
2)High or Low State
3)VIN from 0.8 to 2.0V
2/8
74V2T241
DC SPECIFICATIONS
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Test Condition |
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Value |
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Symbol |
Parameter |
VCC |
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TA = 25°C |
-40 to 85°C |
-55 to 125°C |
Unit |
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(V) |
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Min. |
Typ. |
Max. |
Min. |
Max. |
Min. |
Max. |
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VIH |
High Level Input |
4.5 to |
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0.8 |
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0.8 |
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0.8 |
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V |
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Voltage |
5.5 |
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VIL |
Low Level Input |
4.5 to |
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2.0 |
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2.0 |
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2.0 |
V |
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Voltage |
5.5 |
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VOH |
High Level Output |
4.5 |
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IO=-50 μA |
4.4 |
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4.5 |
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4.4 |
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4.4 |
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V |
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Voltage |
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4.5 |
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IO=-8 mA |
3.94 |
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3.8 |
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3.7 |
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VOL |
Low Level Output |
4.5 |
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IO=50 μA |
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0.0 |
0.1 |
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0.1 |
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0.1 |
V |
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Voltage |
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4.5 |
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IO=8 mA |
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0.36 |
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0.44 |
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0.44 |
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IOZ |
High Impedance |
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VI = VIH or VIL |
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±0.25 |
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± 2.5 |
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± 2.5 |
μA |
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Output Leakage |
5.5 |
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VO = 5.5 or GND |
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Current |
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II |
Input Leakage |
0 to |
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VI = 5.5V or GND |
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± 0.1 |
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± 1 |
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± 1 |
μA |
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Current |
5.5 |
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IOPD |
Power down Output |
0 |
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VO = 5.5 |
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0.5 |
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5 |
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10 |
μA |
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Leakage Current |
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ICC |
Quiescent Supply |
5.5 |
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VI = VCC or GND |
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1 |
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10 |
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10 |
μA |
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Current |
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AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)
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Test Condition |
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Value |
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Symbol |
Parameter |
VCC |
CL |
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TA = 25°C |
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-40 to 85°C |
-55 to 125°C |
Unit |
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(V) |
(pF) |
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Min. |
Typ. |
Max. |
Min. |
Max. |
Min. |
Max. |
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tPLH |
Propagation Delay |
5.0(**) |
15 |
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3.8 |
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5.5 |
1.0 |
6.5 |
1.0 |
7.5 |
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tPHL |
Time |
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ns |
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5.0(**) |
50 |
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4.3 |
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6.5 |
1.0 |
7.5 |
1.0 |
8.5 |
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tPLZ |
Output Disable |
5.0(**) |
15 |
RL = 1 KΩ |
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3.6 |
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5.0 |
1.0 |
6.0 |
1.0 |
7.0 |
ns |
tPHZ |
Time |
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5.0(**) |
50 |
RL = 1 KΩ |
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5.1 |
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7.0 |
1.0 |
8.0 |
1.0 |
9.0 |
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tPZL |
Output Enable |
5.0(**) |
15 |
RL = 1 KΩ |
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3.7 |
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5.9 |
1.0 |
7.0 |
1.0 |
8.0 |
ns |
tPZH |
Time |
5.0(**) |
50 |
RL = 1 KΩ |
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4.1 |
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6.5 |
1.0 |
7.5 |
1.0 |
8.5 |
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(**) Voltage |
range is 5.0V ± 0.5V |
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CAPACITIVE CHARACTERISTICS |
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Test Condition |
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Value |
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Symbol |
Parameter |
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TA = 25°C |
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-40 to 85°C |
-55 to 125°C |
Unit |
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Min. |
Typ. |
Max. |
Min. |
Max. |
Min. |
Max. |
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CIN |
Input Capacitance |
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4 |
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10 |
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10 |
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10 |
pF |
COUT |
Output |
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6 |
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pF |
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Capacitance |
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CPD |
Power Dissipation |
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Capacitance |
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14 |
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pF |
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1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2
3/8