ST 74V1T79 User Manual
74V1T79
74V1T79
SINGLE POSITIVE EDGE TRIGGERED
D-TYPE FLIP-FLOP
■HIGH SPEED:
fMAX = 180MHz (TYP.) at VCC = 5V tCK-Q = 3.9ns (TYP.) at VCC = 5V
■LOW POWER DISSIPATION: ICC = 1 A(MAX.) at TA=25°C
■COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX)
■POWER DOWN PROTECTION ON INPUTS
■SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V
■BALANCED PROPAGATION DELAYS: tPLH tPHL
■OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V
■IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V1T79 is an advanced high-speed CMOS SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is designed to operate from 4.5V to 5.5V, making this device ideal for portable applications.
This D-Type flip-flop is controlled by a clock input (CK). On the positive transition of the clock, the Q output will be set to the logic state that was setup at the D input.
SOT23-5L SOT323-5L
ORDER CODES
PACKAGE |
T & R |
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SOT23-5L |
74V1T79STR |
SOT323-5L |
74V1T79CTR |
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Following the hold time interval, data at the D input can be changed without affecting the level at the output. Power down protection is provided on inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V systems.
It’s available in the commercial and extended temperature range.
All inputs and output are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2004 |
1/9 |
74V1T79
INPUT EQUIVALENT CIRCUIT |
PIN DESCRIPTION |
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PIN N° |
SYMBOL |
NAME AND FUNCTION |
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1 |
D |
Data Input |
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2 |
CK |
Clock Input (Positive |
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Edge) |
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4 |
Q |
Flip-Flop Output |
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3 |
GND |
Ground (0V) |
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5 |
VCC |
Positive Supply Voltage |
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TRUTH TABLE |
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D |
CK |
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Q |
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L |
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L |
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H |
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H |
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L |
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Qn |
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H |
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Qn |
ABSOLUTE MAXIMUM RATINGS |
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Symbol |
Parameter |
Value |
Unit |
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VCC |
Supply Voltage |
-0.5 to +7.0 |
V |
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VI |
DC Input Voltage |
-0.5 to +7.0 |
V |
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VO |
DC Output Voltage |
-0.5 to VCC + 0.5 |
V |
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IIK |
DC Input Diode Current |
- 20 |
mA |
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IOK |
DC Output Diode Current |
± |
20 |
mA |
IO |
DC Output Current |
± |
25 |
mA |
ICC or IGND |
DC VCC or Ground Current |
± |
50 |
mA |
Tstg |
Storage Temperature |
-65 to +150 |
°C |
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TL |
Lead Temperature (10 sec) |
300 |
°C |
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Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied
RECOMMENDED OPERATING CONDITIONS
Symbol |
Parameter |
Value |
Unit |
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VCC |
Supply Voltage |
4.5 to 5.5 |
V |
VI |
Input Voltage |
0 to 5.5 |
V |
VO |
Output Voltage |
0 to VCC |
V |
Top |
Operating Temperature |
-55 to 125 |
°C |
dt/dv |
Input Rise and Fall Time (note 1) (VCC = 5.0 ± 0.5V) |
0 to 20 |
ns/V |
1) VIN from 0.8V to 2V
2/9
74V1T79
DC SPECIFICATIONS
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Test Condition |
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Value |
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Symbol |
Parameter |
VCC |
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TA = 25°C |
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-40 to 85°C |
-55 to 125°C |
Unit |
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(V) |
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Min. |
Typ. |
Max. |
Min. |
Max. |
Min. |
Max. |
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VIH |
High Level Input |
4.5 to |
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2 |
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2 |
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2 |
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V |
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Voltage |
5.5 |
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VIL |
Low Level Input |
4.5 to |
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0.8 |
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0.8 |
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0.8 |
V |
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Voltage |
5.5 |
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VOH |
High Level Output |
4.5 |
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IO=-50 A |
4.4 |
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4.5 |
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4.4 |
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4.4 |
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V |
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Voltage |
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4.5 |
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IO=-8 mA |
3.94 |
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3.8 |
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3.7 |
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VOL |
Low Level Output |
4.5 |
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IO=50 A |
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0.0 |
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0.1 |
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0.1 |
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0.1 |
V |
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Voltage |
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4.5 |
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IO=8 mA |
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0.36 |
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0.44 |
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0.55 |
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II |
Input Leakage |
0 to |
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VI = 5.5V or GND |
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± |
0.1 |
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± 1.0 |
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± 1.0 |
A |
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Current |
5.5 |
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ICC |
Quiescent Supply |
5.5 |
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VI = VCC or GND |
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1 |
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10 |
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20 |
A |
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Current |
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+ICC |
Additional Worst |
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One Input at 3.4V, |
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1.35 |
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1.5 |
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1.5 |
mA |
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Case Supply |
5.5 |
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other input at VCC |
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Current |
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or GND |
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AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)
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Test Condition |
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Value |
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Symbol |
Parameter |
VCC |
CL |
TA = 25°C |
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-40 to 85°C |
-55 to 125°C |
Unit |
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(V) |
(pF) |
Min. Typ. Max. Min. Max. Min. Max. |
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tPLH tPHL |
Propagation Delay |
5.0 (*) |
15 |
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3.9 |
5.5 |
1.0 |
6.5 |
1.0 |
7.5 |
ns |
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Time CK to Q |
5.0 (*) |
50 |
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4.5 |
6.5 |
1.0 |
7.5 |
1.0 |
8.5 |
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tW |
CK Pulse Width, |
5.0 (*) |
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3.0 |
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3.0 |
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3.0 |
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ns |
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HIGH or LOW |
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ts |
Setup Time D to |
5.0 (*) |
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2.0 |
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2.0 |
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2.0 |
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ns |
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CK, HIGH or LOW |
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th |
Hold Time D to CK, |
5.0 (*) |
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1.0 |
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1.0 |
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1.0 |
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ns |
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HIGH or LOW |
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fMAX |
Maximum Clock |
5.0 (*) |
50 |
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120 180 |
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120 |
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120 |
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MHz |
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Frequency |
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(*) Voltage range is 5.0V ± 0.5V
CAPACITIVE CHARACTERISTICS
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Test Condition |
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Value |
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Symbol |
Parameter |
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TA = 25°C |
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-40 to 85°C |
-55 to 125°C |
Unit |
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Min. |
Typ. |
Max. |
Min. |
Max. |
Min. |
Max. |
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CIN |
Input Capacitance |
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4 |
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10 |
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10 |
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10 |
pF |
CPD |
Power Dissipation |
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8 |
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pF |
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Capacitance |
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(note 1) |
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1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
3/9
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