The 74LX1G07 is a low voltage CMOS single
buffer/driver (open drain) fabricated with submicron silicon gate and double-layer metal wiring
2
C
MOS technology.
The internal circuit composed of 2 stages
including buffer output, provides high noise
immunity and stable output.
Power down protection is provided on input and 0
to 7 V can be accepted on input with no regards
to the supply voltage. This device can be used to
interface 5to3V.
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 4.Absolute maximum ratings
SymbolParameterValueUnit
V
V
V
V
I
I
OK
I
I
CC
I
GND
T
T
Supply voltage-0.5 to +7.0V
CC
DC input voltage-0.5 to +7.0V
I
DC output voltage (VCC= 0 V)-0.5 to +7.0V
O
DC output voltage (high or low state)-0.5 to VCC + 0.5V
O
DC input diode current- 50mA
IK
DC output diode current- 50mA
DC output current± 50mA
O
DC supply current per supply pin± 100mA
DC ground current per supply pin± 100mA
Storage temperature-65 to +150°C
stg
Lead temperature (10 sec)300°C
L
5/20
Maximum rating74LX1G07
2.1 Recommended operating conditions
Table 5.Recommended operating conditions
SymbolParameterValueUnit
V
V
V
I
I
I
I
I
T
Supply voltage1.65 to 5.5V
CC
V
Input voltage0 to 5.5V
I
Output voltage (VCC= 0 V)0 to 5.5V
O
Output voltage (high or low state)0 to V
O
High or low level output current (VCC= 4.5 to 5.5 V)+ 32mA
OL
High or low level output current (VCC= 3.0 to 3.6 V)+24mA
OL
High or low level output current (VCC= 2.7 to 3.0 V)+12mA
OL
High or low level output current (VCC= 2.3 to 2.7 V)+8mA
OL
High or low level output current (VCC= 1.65 to 2.3 V)+4mA
OL
Operating temperature-40 to 85°C
op
CC
V
dt/dvInput rise and fall time0 to 10ns/V
6/20
74LX1G07Electrical characteristics
3 Electrical characteristics
Table 6.DC specifications
Test conditionValue
SymbolParameter
V
V
V
High level input
IH
voltage
Low level input
IL
voltage
Low level output
OL
voltage
High impedance
I
OZ
output leakage
current
Input leakage
I
I
current
I
I
CC
Power off leakage
off
current
Quiescent supply
current
V
CC
(V)
1.65 − 1.950.65 V
3.0 − 5.50.7 V
1.65 − 1.950.35 V
3.0 −5.50.3 V
− 4.5I
1.65
1.65I
2.3I
3.0
4.5I
= 100 μA0.1
O
= 4 mA0.45
O
=8mA0.3
O
I
=16mA0.4
O
=24mA0.55
I
O
=32mA0.55
O
-40 to 85 °C
MinMax
CC
CC
CC
CC
CC
CC
3.6VI= 5.5 V±10μA
− 5.5V
1.65
0V
1.65
− 5.5V
3.6
=0−5.5 V±5μA
I
or VO=5.5V10μA
I
or GND10
I=VCC
or VO= 3.6 to
V
I
5.5 V
±10
Unit
V2.3 −2.70.7 V
V2.3 −2.70.3 V
V
μA
7/20
Electrical characteristics74LX1G07
Table 7.AC electrical characteristics
Test conditionsValue
SymbolParameter
V
CC
(V)
1.65
− 1.953010002.01.88.3
2.3
− 2.7305002.01.25.5
t
PLZ
Propagation delay
time
2.7505002.515
3.0 − 3.6505002.50.84.2
− 5.5505002.50.53.5
4.5
− 1.953010002.01.88.3
1.65
2.3
− 2.7305002.01.25.5
t
PZL
Propagation delay
time
2.7505002.515
3.0 − 3.6505002.50.84.2
−5.5505002.50.53.5
4.5
Table 8.Capacitive characteristics
SymbolParameter
V
C
L
(pF)
R
(Ω)
t
= t
1
s
(ns)
-40 to 85 °C
r
MinMax
Test conditionsValue
CC
(V)
T
MinTypMax
=25 °C
A
Unit
ns
ns
Unit
C
C
C
Input capacitance3.3VIN=0 or V
IN
Output capacitance3.3VIN=0 or V
OUT
1.8
Power dissipation
PD
capacitance
(1)
=10MHz
f
IN
CC
CC
2.5pF
4pF
8
3.38
1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the
operating current consumption without load. (Refer to test circuit). Average operating current can be
obtained by the following equation: I
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
Figure 5.SOT23-5L package outline
.
Table 10.SOT23-5L mechanical data
millimetersmils
Symbol
Typ Min Max Typ Min Max
A 0.901.4535.457.1
A1 0.000.100.03.9
A2 0.901.3035.451.2
b0.350.5013.719.7
C0.090.203.57.8
D2.803.00110.2118.1
E1.501.7559.068.8
e0.9537.4
H2.603.00102.3118.1
L0.100.603.923.6
10/20
7049676C
74LX1G07Package mechanical data
Figure 6.SOT323-5L package outline
Table 11.SOT323-5L mechanical data
millimetersmils
Symbol
Typ Min Max Typ Min Max
A 0.801.1031.543.3
A1 0.000.100.03.9
A2 0.801.0031.539.4
b0.150.305.911.8
C0.100.183.97.1
D1.802.2070.986.6
E1.802.2070.994.5
E11.151.3545.353.1
e0.6525.6
e11.351.2
L0.100.303.911.8
11/20
Package mechanical data74LX1G07
Figure 7.Flip-chip 4 package outline
12/20
74LX1G07Package mechanical data
Table 12.Flip-chip 4 mechanical data
millimeters
Symbol
Min Typ Max
A0.5350.580.625
A10.180.2050.23
A20.3550.3750.395
b0.2150.2550.295
D0.840.870.9
D10.5
E0.840.870.9
E10.5
SD0.25
SE0.25
f0.1750.1850.195
ccc0.080
13/20
Package mechanical data74LX1G07
Figure 8.Flip-chip 4 recommended footprint
14/20
74LX1G07Package mechanical data
Figure 9.SOT23-xL tape and reel
Table 13.SOT23-xL tape and reel mechanical data
millimetersinches
Symbol
Typ Min Max Typ Min Max
A1807.086
C12.813.013.20.5040.5120.519
D20.20.795
N602.362
T14.40.567
Ao3.133.233.330.1230.1270.131
Bo3.073.173.270.1200.1240.128
Ko1.271.371.470.0500.0540.058
Po3.94.04.10.1530.1570.161
P3.94.04.10.1530.1570.161
15/20
Package mechanical data74LX1G07
Figure 10. SOT323-xL tape and reel
1. Drawing not to scale.
Table 14.SOT323-xL tape and reel mechanical data
millimetersinches
Symbol
Typ Min Max Typ Min Max
A 1751801856.8897.0867.283
C12.81313.20.5040.5120.519
D20.20.795
N59.56060.52.362
T14.40.567
Ao2.250.088
Bo2.70.106
Ko1.20.047
Po3.944.10.1530.1570.161
P3.844.20.1490.1570.165
16/20
74LX1G07Package mechanical data
Figure 11. Flip-chip 4 reel information - back side
Figure 12. Flip-chip 4 reel information - front side
17/20
Package mechanical data74LX1G07
Figure 13. Flip-chip 4 carrier tape information
Figure 14. Flip-chip 4 tape orientation
- Top view of package
- Ballsunderneath
- Pin A1 marked from target spec
Tape and reel
A1
direction of flow
18/20
74LX1G07Revision history
5 Revision history
Table 15.Document revision history
DateRevisionChanges
04-Sept-20044Document change.
03-May-20065Data reel updating.
17-Jan-20086
29-Jan-20087
21-Feb-20088
23-Apr-20089Modified: Table 12 on page 13 and Figure 13 on page 18.
Document restructured and converted to new ST template.
Added 74LX1G07BJR and related package information.
Flip-Chip 4 replaced with Flip-chip 4 and updated Ta bl e 1 2 o n
page 13.
Replaced Flip-Chip 4 package name with Flip-chip 4, latch-up and
ESD performance among the specifications in the cover page and
updated Table 6 on page 7, Table 8 on page 8, and Table 12 on
page 13, replaced Figure 13 on page 18 and Figure 14 on page 18
19/20
74LX1G07
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