ST 74LVXU04 User Manual

74LVXU04
LOW VOLTAGE CMOS HEX INVERTER (SINGLE STAGE)
WITH 5V TOLERANT INPUTS
HIGH SPEED:
t
= 5.0ns (TYP.) at V
PD
5V TOLERANT INPUTS
I
= 2 µA (MAX.) at TA=25°C
CC
LOW NOISE:
V
= 0.3V (TYP.) at VCC = 3.3V
OLP
SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 4mA (MIN)
OH
BALANCED PROPAGATION DELAYS:
t
t
PLH
PHL
OPERATING VOLTAGE RANGE:
V
(OPR) = 2V to 3.6V (1.2V Data Retention)
CC
PIN AND FUNCTION COMPATIBLE WITH
CC
= 3.3V
74 SERIES 04
IMPROVED LATCH-UP IMMUN ITY
POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVXU04 is a low voltage CMOS HEX INVERTER (SINGLE STAGE) fabricated with sub-micron silicon gate and double-layer metal wiring C
2
MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications.
TSSOPSOP

Table 1: Order Codes

PACKAGE T & R
SOP 74LVXU04MTR
TSSOP 74LVXU04TTR
As the internal circuit is composed of a single stage inverter, it can be used in analog application such as crystal oscillator. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V system. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static disc harge, giving them 2KV ESD immunity and transient excess voltage.

Figure 1: Pin Connection An d I E C Logic Symbols

Rev. 4
1/11August 2004
74LVXU04

Figure 2: Input Equivalent Circuit Table 2: Pin Description

PIN N° SYMBOL NAME AND FUNCTION
1, 3, 5, 9, 1 1,
13
2, 4, 6, 8, 10,
12
7 GND Ground (0V)
14

Table 3: Truth Table

Table 4: Absolute Maximum Ratings

Symbol Parameter Value Unit
V
V
V
I
I
OK
I
or I
I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L

Table 5: Recommended Operating Conditions

1A to 6A Data Inputs
1Y to 6Y Data Outputs
V
CC
Positive Supply Voltage
AY
LH
HL
-0.5 to +7.0 V
-0.5 to +7.0 V V
- 20 mA
± 20 mA ± 25 mA ± 50 mA
-65 to +150 °C
300 °C
Symbol Parameter Value Unit
V
V V T
dt/dv
1) Truth T abl e guarante ed: 1.2V to 3.6V from 0.8V to 2.0V
2) V
IN
Supply Voltage (note 1)
CC
Input Voltage
I
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time (note 2) (V
= 3.3V)
CC
2 to 3.6 V 0 to 5.5 V
CC
-55 to 125 °C 0 to 100 ns/V
2/11
V

Table 6: DC Specifications

Symbol Parameter
V
V
V
High Level Input
IH
Voltage
V
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
Input Leakage
I
I
Current
I
Quiescent Supply
CC
Current
3.0 to
3.0 to
74LVXU04
Test Condition Value
= 25°C
T
V
CC
(V)
A
Min. Typ. Max. Min. Max. Min. Max.
2.0 1.7 1.7 1.7
0.8
3.6
V
CC
2.0 0.3 0.3 0.3
3.6 =-50 µA
2.0
3.0
2.0
3.0
3.6
3.6
I
O
=-50 µA
I
O
I
=-4 mA
O
IO=50 µA
=50 µA
I
O
=4 mA
I
O
= 5V or GND
V
I
= VCC or GND
V
I
1.9 2.0 1.9 1.9
2.9 3.0 2.9 2.9
2.58 2.48 2.4
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
-40 to 85°C -55 to 125°C
0.2
V
CC
V
0.8
CC
V
0.2
CC
0.8
V
CC
0.2
V
0.36 0.44 0.55
± 0.1 ± 1 ± 1 µA
22020µA
Unit
V
V
CC
V3.0
V3.0

Table 7: Dynamic Switching Characteristics

Test Condition Value
= 25°C
Symbol Parameter
V
CC
(V)
V V
V
Dynamic Low
OLP
Voltage Quiet
OLV
Output (note 1, 2) Dynamic High
IHD
Voltage Input (note
3.3
3.3 2 = 50 pF
C
L
1, 3)
V
Dynamic Low
ILD
Voltage Input (note
3.3 0.8
1, 3)
1) Worst case package.
2) Max number of outp ut s defined as (n). Data inp ut s are driven 0V to 3.3V, (n-1) outputs switc hi ng and one out put at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V (V
), f=1MHz.
IHD
T
A
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
0.3 0.5
-0.5 -0.3
ILD
Unit
V
), 0V to thresho l d
3/11
74LVXU04

Table 8: AC Electrical Characteristics (Input tr = tf = 3ns)

Test Condition Value
= 25°C
Symbol Parameter
t
PLH tPHL
t
OSLH
t
OSHL
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch­ing in the sa m e di rection, ei ther HIGH or LOW
2) Param eter guaran teed by design (*) Voltage range is 3.3V ±
Propagation Delay Time
Output To Output Skew Time (note1,
2)
0.3V
V
C
CC
(V)
L
(pF)
2.7 15 6.5 10.4 1.0 13.7 1.0 13.7
2.7 50 8.5 13.0 1.0 15.2 1.0 15.2
(*)
3.3
3.3
15 5.0 8.9 1.0 10.5 1.0 10.5
(*)
50 7.5 11.4 1.0 13.0 1.0 13.0
2.7 50 0.5 1.0 1.5 1.5
(*)
3.3
50
T
A
Min. Typ. Max. Min. Max. Min. Max.
0.5 1.0 1.5 1.5

Table 9: Capacitive Characteristics

Test Condition Value
= 25°C
Symbol Parameter
C
C
Input Capacitance
IN
Power Dissipation
PD
Capacitance (note 1)
V
CC
(V)
3.3 5 10 10 10 pF
3.3 9 pF
T
A
Min. Typ. Max. Min. Max. Min. Max.
-40 to 85°C -55 to 125°C
-40 to 85°C -55 to 125°C
Unit
ns
ns
Unit
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= CPD x VCC x fIN + ICC/6 (per gate)
CC(opr)

Figure 3: Test Circuit

CL =15/50pF or equivalent (i ncludes jig an d probe capac i tance) R
= Z
of pulse generator (typically 50Ω)
T
OUT
4/11
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