ST 74LVX257 User Manual

74LVX257

LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER (3-STATE) WITH 5V TOLERANT INPUTS

■HIGH SPEED:

tPD=5.8ns (TYP.) at VCC = 3.3V

■5V TOLERANT INPUTS

■POWER-DOWN PROTECTION ON INPUTS

■INPUT VOLTAGE LEVEL:

VIL = 0.8V, VIH = 2V at VCC =3V

■LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C

■LOW NOISE:

VOLP = 0.3V (TYP.) at VCC =3.3V

■SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) at VCC =3V

■BALANCED PROPAGATION DELAYS: tPLH tPHL

■OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 3.6V (1.2V Data Retention)

■PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 257

■IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74LVX257 is a low voltage CMOS QUAD 2 CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications.

It is composed of four independent 2-channel multiplexers with common SELECT and ENABLE (OE) INPUT. The 74LVX257 is a non-inverting

SOP TSSOP

Table 1: Order Codes

PACKAGE	T & R
SOP	74LVX257MTR
TSSOP	74LVX257TTR

multiplexer. When the ENABLE INPUT is held "High", all outputs become in high impedance state. If SELECT INPUT is held "Low", "A" data is selected, when SELECT INPUT is "High", "B" data is chosen.

Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage.

This device can be used to interface 5V to 3V. It combines high speed performance with the true CMOS low power consumption.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

Figure 1: Pin Connection And IEC Logic Symbols

August 2004	Rev. 3
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74LVX257

Figure 2: Input Equivalent Circuit	Table 2: Pin Description
	PIN N°	SYMBOL	NAME AND FUNCTION
	1	SELECT	Common Data Select
			Inputs
	2, 5, 11, 14	1A to 4A	Data Inputs From Source
			A
	3, 6, 10, 13	1B to 4B	Data Inputs From Source
			B
	4, 7, 9, 12	1Y to 4Y	3 State Multiplexer
			Outputs
	15	OE	3 State Output Enable
			Inputs (Active LOW)
	8	GND	Ground (0V)
	16	VCC	Positive Supply Voltage

Table 3: Truth Table

				INPUTS			OUTPUT
	OE		SELECT		A	B	Y
	H		X		X	X	Z
	L		L		L	X	L
	L		L		H	X	H
	L		H		X	L	L
	L		H		X	H	H

X :Don‘t Care

Z : High Impedance

Figure 3: Logic Diagram

This logic diagram has not be used to estimate propagation delays

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				74LVX257
Table 4: Absolute Maximum Ratings
Symbol	Parameter	Value			Unit
VCC	Supply Voltage	-0.5 to +7.0			V
VI	DC Input Voltage	-0.5 to +7.0			V
VO	DC Output Voltage	-0.5 to VCC + 0.5			V
IIK	DC Input Diode Current	- 20			mA
IOK	DC Output Diode Current	±	20		mA
IO	DC Output Current	±	25		mA
ICC or IGND	DC VCC or Ground Current	±	50		mA
Tstg	Storage Temperature	-65 to +150			°C
TL	Lead Temperature (10 sec)	300			°C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

Table 5: Recommended Operating Conditions

Symbol	Parameter	Value	Unit
VCC	Supply Voltage (note 1)	2 to 3.6	V
VI	Input Voltage	0 to 5.5	V
VO	Output Voltage	0 to VCC	V
Top	Operating Temperature	-55 to 125	°C
dt/dv	Input Rise and Fall Time (note 2) (VCC = 3V)	0 to 100	ns/V

1)Truth Table guaranteed: 1.2V to 3.6V

2)VIN from 0.8V to 2.0V

Table 6: DC Specifications

			Test Condition							Value
Symbol	Parameter	VCC				TA = 25°C				-40 to 85°C			-55 to 125°C			Unit
		(V)			Min.		Typ.	Max.		Min.	Max.		Min.	Max.
VIH	High Level Input	2.0			1.5					1.5			1.5
	Voltage	3.0			2.0					2.0			2.0			V
		3.6			2.4					2.4			2.4
VIL	Low Level Input	2.0							0.5		0.5			0.5
	Voltage	3.0							0.8		0.8			0.8		V
		3.6							0.8		0.8			0.8
VOH	High Level Output	2.0		IO=-50 A	1.9		2.0			1.9			1.9
	Voltage
		3.0		IO=-50 A	2.9		3.0			2.9			2.9			V
		3.0		IO=-4 mA	2.58					2.48			2.4
VOL	Low Level Output	2.0		IO=50 A			0.0		0.1		0.1			0.1
	Voltage
		3.0		IO=50 A			0.0		0.1		0.1			0.1		V
		3.0		IO=4 mA				0.36			0.44			0.55
IOZ	High Impedance	3.6		VI = VIH or VIL				±	0.25		±	2.5		±	5	A
	Output Leakage			VO = VCC or GND
	Current
II	Input Leakage	3.6		VI = 5.5V or GND				±	0.1		±	1		±	1	A
	Current
ICC	Quiescent Supply	3.6		VI = VCC or GND					4		40			40		A
	Current
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74LVX257

Table 7: Dynamic Switching Characteristics

Test Condition

Value

Symbol

Parameter

VCC

TA = 25°C

-40 to 85°C

-55 to 125°C

Unit

(V)

Min.

Typ.

Max.

Min.

Max.

Min.

Max.

VOLP

Dynamic Low

0.3

0.5

Voltage Quiet

3.3

VOLV

-0.5

-0.3

Output (note 1, 2)

VIHD

Dynamic High

CL = 50 pF

Voltage Input

3.3

2.0

V

(note 1, 3)

VILD

Dynamic Low

Voltage Input

3.3

0.8

(note 1, 3)

1)Worst case package.

2)Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.

3)Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.

Table 8: AC Electrical Characteristics (Input tr = tf = 3ns)

			Test Condition							Value
Symbol	Parameter	VCC		CL		TA = 25°C				-40 to 85°C		-55 to 125°C		Unit
		(V)		(pF)		Min.	Typ.	Max.		Min.	Max.	Min.	Max.
tPLH	Propagation Delay	2.7		15			7.0		13.0	1.0	15.4	1.0	16.4
tPHL	Time	2.7		50			9.5		18.0	1.0	20.3	1.0	21.3
	A, B, to Y													ns
		3.3(*)		15			5.8		9.3	1.0	11.0	1.0	12.0
		3.3(*)		50			8.3		12.8	1.0	14.5	1.0	15.5
tPLH	Propagation Delay	2.7		15			8.5		15.4	1.0	18.2	1.0	20.0
tPHL	Time	2.7		50			10.5		20.3	1.0	23.1	1.0	24.5
	SELECT to Y													ns
		3.3(*)		15			7.0		11.0	1.0	13.0	1.0	14.0
		3.3(*)		50			9.5		14.5	1.0	16.5	1.0	18.0
tPZL	Output Enable	2.7		15			8.0		14.7	1.0	17.5	1.0	18.5
tPZH	Time	2.7		50			10.5		19.6	1.0	22.4	1.0	24.0	ns
		3.3(*)		15			6.7		10.5	1.0	12.5	1.0	13.5
		3.3(*)		50			9.2		14.0	1.0	16.0	1.0	17.0
tPLZ	Output Disable	2.7		50			9.5		16.8	1.0	18.9	1.0	20.0	ns
tPHZ	Time	3.3(*)		50			8.6		12.0	1.0	13.5	1.0	15.0
tOSLH	Output to Output	2.7		50			0.5		1.0		1.5		1.5
	Skew Time (note													ns
tOSHL		3.3(*)		50			0.5		1.0		1.5		1.5
	1,2)

1)Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW

2)Parameter guaranteed by design

(*) Voltage range is 3.3V ± 0.3V

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