ST 74LVX245 User Manual

74LVX245

LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER (3-STATE) WITH 5V TOLERANT INPUTS

■HIGH SPEED:

tPD=4.7ns (TYP.) at VCC = 3.3V

■5V TOLERANT INPUTS

■POWER-DOWN PROTECTION ON INPUTS

■INPUT VOLTAGE LEVEL:

VIL = 0.8V, VIH = 2V at VCC =3V

■LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C

■LOW NOISE:

VOLP = 0.5V (TYP.) at VCC =3.3V

■SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) at VCC =3V

■BALANCED PROPAGATION DELAYS: tPLH tPHL

■OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 3.6V (1.2V Data Retention)

■PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245

■IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74LVX245 is a low voltage CMOS OCTAL BUS BUFFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications.

This IC is intended for two-way asynchronous communication between data busses; the direction of data transmission is determined by

Figure 1: Pin Connection And IEC Logic Symbols

SOP TSSOP

Table 1: Order Codes

PACKAGE	T & R
SOP	74LVX245MTR
TSSOP	74LVX245TTR

DIR input. The enable input G can be used to disable the device so that the busses are effectively isolated.

Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage.

This device can be used to interface 5V to 3V. It combines high speed performance with the true CMOS low power consumption.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

All floating bus terminals during High Z state must be held HIGH or LOW.

August 2004	Rev. 5
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74LVX245

Figure 2: Input Equivalent Circuit	Table 2: Pin Description
	PIN N°	SYMBOL	NAME AND FUNCTION
	1	DIR	Directional Control
	2, 3, 4, 5, 6,	A1 to A8	Data Inputs/Outputs
	7, 8, 9
	18, 17, 16,	B1 to B8	Data Inputs/Outputs
	15, 14, 13,
	12, 11
	19	G	Output Enable Input
	10	GND	Ground (0V)
	20	VCC	Positive Supply Voltage

Table 3: Truth Table

			INPUTS			FUNCTION		OUTPUT
	G			DIR	A BUS		B BUS
	L			L	OUTPUT		INPUT	A = B
	L			H	INPUT		OUTPUT	B = A
	H			X	Z		Z	Z
X :Don‘t Care
Z : High Impedance
Table 4: Absolute Maximum Ratings

Symbol	Parameter	Value		Unit
VCC	Supply Voltage	-0.5 to +7.0		V
VI	DC Input Voltage	-0.5 to +7.0		V
VO	DC Output Voltage	-0.5 to VCC + 0.5		V
IIK	DC Input Diode Current	- 20		mA
IOK	DC Output Diode Current	±	20	mA
IO	DC Output Current	±	25	mA
ICC or IGND	DC VCC or Ground Current	±	50	mA
Tstg	Storage Temperature	-65 to +150		°C
TL	Lead Temperature (10 sec)	300		°C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

Table 5: Recommended Operating Conditions

Symbol	Parameter	Value	Unit
VCC	Supply Voltage (note 1)	2 to 3.6	V
VI	Input Voltage	0 to 5.5	V
VO	Output Voltage	0 to VCC	V
Top	Operating Temperature	-55 to 125	°C
dt/dv	Input Rise and Fall Time (note 2) (VCC = 3V)	0 to 100	ns/V

1)Truth Table guaranteed: 1.2V to 3.6V

2)VIN from 0.8V to 2.0V

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74LVX245

Table 6: DC Specifications

			Test Condition							Value
Symbol	Parameter	VCC				TA = 25°C				-40 to 85°C			-55 to 125°C			Unit
		(V)			Min.		Typ.	Max.		Min.	Max.		Min.	Max.
VIH	High Level Input	2.0			1.5					1.5			1.5
	Voltage	3.0			2.0					2.0			2.0			V
		3.6			2.4					2.4			2.4
VIL	Low Level Input	2.0							0.5		0.5			0.5
	Voltage	3.0							0.8		0.8			0.8		V
		3.6							0.8		0.8			0.8
VOH	High Level Output	2.0		IO=-50 A	1.9		2.0			1.9			1.9
	Voltage
		3.0		IO=-50 A	2.9		3.0			2.9			2.9			V
		3.0		IO=-4 mA	2.58					2.48			2.4
VOL	Low Level Output	2.0		IO=50 A			0.0		0.1		0.1			0.1
	Voltage
		3.0		IO=50 A			0.0		0.1		0.1			0.1		V
		3.0		IO=4 mA				0.36			0.44			0.55
IOZ	High Impedance	3.6		VI = VIH or VIL				±	0.25		±	2.5		±	5	A
	Output Leakage			VO = VCC or GND
	Current
II	Input Leakage	3.6		VI = 5V or GND				±	0.1		±	1		±	1	A
	Current
ICC	Quiescent Supply	3.6		VI = VCC or GND					4		40			40		A
	Current
Table 7: Dynamic Switching Characteristics
			Test Condition							Value
Symbol	Parameter	VCC				TA = 25°C				-40 to 85°C			-55 to 125°C			Unit
		(V)			Min.		Typ.	Max.		Min.	Max.		Min.	Max.
VOLP	Dynamic Low						0.5		0.8
	Voltage Quiet	3.3
VOLV					-0.8		-0.5
	Output (note 1, 2)
VIHD	Dynamic High			CL = 50 pF
	Voltage Input	3.3			2.0											V
	(note 1, 3)
VILD	Dynamic Low
	Voltage Input	3.3							0.8
	(note 1, 3)

1)Worst case package.

2)Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.

3)Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.

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74LVX245

Table 8: AC Electrical Characteristics (Input tr = tf = 3ns)

			Test Condition							Value
Symbol	Parameter	VCC		CL		TA = 25°C				-40 to 85°C		-55 to 125°C		Unit
		(V)		(pF)		Min.	Typ.	Max.		Min.	Max.	Min.	Max.
tPLH	Propagation Delay	2.7		15			6.1		11.4	1.0	13.5	1.0	15.0
tPHL	Time	2.7		50			8.6		14.9	1.0	17.0	1.0	18.0	ns
		3.3(*)		15			4.5		7.1	1.0	8.5	1.0	9.5
		3.3(*)		50			7.2		10.6	1.0	12.0	1.0	13.0
tPZL	Output Enable	2.7		15			7.1		13.8	1.0	16.5	1.0	17.5
tPZH	Time	2.7		50			9.6		17.3	1.0	20.0	1.0	21.0	ns
		3.3(*)		15			5.5		8.8	1.0	10.5	1.0	12.
		3.3(*)		50			8.0		12.3	1.0	14.0	1.0	15.0
tPLZ	Output Disable	2.7		50			11.6		16.0	1.0	19.0	1.0	20.5	ns
tPHZ	Time	3.3(*)		50			9.7		11.4	1.0	13.0	1.0	14.5
tOSLH	Output to Output	2.7		50			0.5		1.0		1.5		1.5
	Skew Time (note													ns
tOSHL		3.3(*)		50			0.5		1.0		1.5		1.5
	1,2)

1)Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW

2)Parameter guaranteed by design

(*) Voltage range is 3.3V ± 0.3V

Table 9: Capacitive Characteristics

Test Condition

Value

Symbol

Parameter

VCC

TA = 25°C

-40 to 85°C

-55 to 125°C

Unit

(V)

Min.

Typ.

Max.

Min.

Max.

Min.

Max.

CIN

Input Capacitance

3.3

5

10

10

pF

Ci/o

Input/Output

3.3

10

15

15

pF

Capacitance

CPD

Power Dissipation

fIN = 10MHz

32

pF

Capacitance

3.3

(note 1)

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit)

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