ST 74LVX244 User Manual
74LVX244
LOW VOLTAGE CMOS OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (NON INVERTED)
■ HIGH SPEED:
t
=4.5ns (TY P.) at VCC = 3.3V
PD
■ 5V TOLERANT INPUTS
■ POWER-DOWN PROTECTION ON INPUTS
■ INPUT VOLTAGE LEVEL:
V
= 0.8V, VIH = 2V at VCC =3V
IL
■ LOW POWER DISSIPATION:
I
= 4 µA (MAX.) at TA=25°C
CC
■ LOW NOISE:
V
= 0.5V (TYP.) at VCC =3.3V
OLP
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 4 mA (MIN) at VCC =3V
OH
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
PHL
■ OPERATING VOLTAGE RANGE:
V
(OPR) = 2V to 3.6V (1.2V Data Retention)
CC
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 244
■ IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LVX244 is a low voltage CMOS OCTAL
BUS BUFFER (3-STATE) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
TSSOPSOP
Table 1: Order Codes
PACKAGE T & R
SOP 74LVX244MTR
TSSOP 74LVX244TTR
G
output enable governs four BUS BUFFERs
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static disc harge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin C onnection And IEC Logic Symbol s
Rev. 4
1/12August 2004
74LVX244
Figure 2: Input Equivalent Circuit Table 2: Pin Description
PIN N° SYMBOL NAME AND FUNCTION
11G
2, 4, 6, 8 1A1 to 1A4 Data Inputs
9, 7, 5, 3 2Y1 to 2Y4 Data Outputs
11, 13, 15, 172A1 to 2A4 Data Inputs
Output Enable Input
18, 16, 14, 121Y1
19 2G
to 1Y4 Data Outputs
Output Enable Input
10 GND Ground (0V)
20 V
CC
Positive Supply Voltage
Table 3: Truth Table
INPUTS OUTPUT
G
An Yn
LLL
LHH
HXZ
X :Don‘t Care
Z : High Impedance
Table 4: Absolute Maximum Ratings
Symbol Parameter Value Unit
V
V
V
I
I
OK
I
or I
I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
-0.5 to +7.0 V
-0.5 to +7.0 V
V
- 20 mA
± 20 mA
± 25 mA
± 50 mA
-65 to +150 °C
300 °C
Table 5: Recommended Operating Conditions
Symbol Parameter Value Unit
V
V
V
T
dt/dv
1) Truth T abl e guarante ed: 1.2V to 3.6V
2) V
from 0.8V to 2.0V
IN
Supply Voltage (note 1)
CC
Input Voltage
I
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time (note 2) (V
CC
= 3V)
2 to 3.6 V
0 to 5.5 V
CC
-55 to 125 °C
0 to 100 ns/V
2/12
V
Table 6: DC Specifications
Symbol Parameter
V
V
V
High Level Input
IH
Voltage
V
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
High Impedance
I
OZ
Output Leakage
Current
I
Input Leakage
I
Current
I
Quiescent Supply
CC
Current
74LVX244
Test Condition Value
= 25°C
T
V
CC
(V)
A
Min. Typ. Max. Min. Max. Min. Max.
2.0 1.5 1.5 1.5
2.0 2.0 2.0
3.6
2.4 2.4 2.4
2.0 0.5 0.5 0.5
3.6 0.8 0.8 0.8
=-50 µA
2.0
3.0
2.0
3.0
3.6
3.6
3.6
V
VO = VCC or GND
= 5.5V or GND
V
I
V
I
I
O
=-50 µA
I
O
=-4 mA
I
O
IO=50 µA
I
=50 µA
O
=4 mA
I
O
= VIH or V
I
= VCC or GND
1.9 2.0 1.9 1.9
2.9 3.0 2.9 2.9
2.58 2.48 2.4
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
IL
±0.25 ± 2.5 ± 2.5 µA
-40 to 85°C -55 to 125°C
0.36 0.44 0.55
± 0.1 ± 1 ± 1 µA
44040µA
Unit
V3.0
V3.0 0.8 0.8 0.8
V3.0
V3.0
Table 7: Dynamic Switching Characteristics
Test Condition Value
= 25°C
Symbol Parameter
V
V
Dynamic Low
OLP
Voltage Quiet
OLV
Output (note 1, 2)
V
CC
(V)
3.3
T
A
Min. Typ. Max. Min. Max. Min. Max.
0.5 0.8
-0.8 -0.5
Dynamic High
V
IHD
Voltage Input
3.3 2.0
= 50 pF
C
L
(note 1, 3)
Dynamic Low
V
ILD
Voltage Input
3.3 0.8
(note 1, 3)
1) Worst case package.
2) Max number of outp ut s defined as (n). Data inp ut s are driven 0V to 3.3V, (n-1) outputs switc hi ng and one out put at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V
), f=1MHz.
(V
IHD
-40 to 85°C -55 to 125°C
ILD
Unit
V
), 0V to thresho l d
3/12
74LVX244
Table 8: AC Electrical Characteristics (Input tr = tf = 3ns)
Test Condition Value
= 25°C
Symbol Parameter
t
Propagation Delay
PLH
t
t
t
t
t
t
OSLH
t
OSHL
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the sa m e di rection, ei ther HIGH or LOW
2) Param eter guaran teed by design
(*) Voltage range is 3.3V ±
Time
PHL
Output Enable
PZL
Time
PZH
Output Disable
PLZ
Time
PHZ
Output to Output
Skew Time (note
1,2)
0.3V
V
C
CC
(V)
L
(pF)
2.7 15 6.1 11.4 1.0 13.5 1.0 15.0
2.7 50 8.6 14.9 1.0 17.0 1.0 18.0
(*)
3.3
3.3
15 4.5 7.1 1.0 8.5 1.0 9.5
(*)
50 7.2 10.6 1.0 12.0 1.0 13.0
2.7 15 7.1 13.8 1.0 16.5 1.0 17.5
2.7 50 9.6 17.3 1.0 20.0 1.0 21.0
(*)
3.3
3.3
15 5.5 8.8 1.0 10.5 1.0 12.
(*)
50 8.0 12.3 1.0 14.0 1.0 15.0
2.7 50 11.6 16.0 1.0 19.0 1.0 20.5
(*)
3.3
50 9.7 11.4 1.0 13.0 1.0 14.5
2.7 50 0.5 1.0 1.5 1.5
(*)
3.3
50 0.5 1.0 1.5 1.5
T
A
Min. Typ. Max. Min. Max. Min. Max.
Table 9: Capacitive Characteristics
-40 to 85°C -55 to 125°C
Unit
ns
ns
ns
ns
Test Condition Value
= 25°C
Symbol Parameter
C
C
C
Input Capacitance
IN
Output
OUT
Capacitance
Power Dissipation
PD
Capacitance
V
CC
(V)
3.3 4 10 10 10 pF
3.3 6 pF
= 10MHz
3.3
f
IN
T
A
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
19 pF
Unit
(note 1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= CPD x VCC x fIN + ICC/8 (per c ircuit )
CC(opr)
4/12
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