ST 74LVX132 User Manual

74LVX132

LOW VOLTAGE CMOS QUAD 2-INPUT SCHMITT NAND GATE WITH 5V TOLERANT INPUTS

■HIGH SPEED:

tPD = 5.9ns (TYP.) at VCC = 3.3V

■5V TOLERANT INPUTS

■LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA=25°C

■TYPICAL HYSTERESIS: 0.7V at VCC = 3.3V

■LOW NOISE:

VOLP = 0.3V (TYP.) at VCC = 3.3V

■SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

■BALANCED PROPAGATION DELAYS: tPLH tPHL

■OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 3.6V (1.2V Data Retention)

■PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 132

■IMPROVED LATCH-UP IMMUNITY

■POWER DOWN PROTECTION ON INPUTS

DESCRIPTION

The 74LVX132 is a low voltage CMOS QUAD 2-INPUT SCHMITT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage.

SOP TSSOP

Table 1: Order Codes

PACKAGE	T & R
SOP	74LVX132MTR
TSSOP	74LVX132TTR

This device can be used to interface 5V to 3V system. It combines high speed performance with the true CMOS low power consumption.

Pin configuration and function are the same as those of the 74LVX00 but the 74LVX132 has hysteresis.

This together with its schmitt trigger function allows it to be used on line receivers with slow rise/fall input signals.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

Figure 1: Pin Connection And IEC Logic Symbols

August 2004	Rev. 3
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74LVX132

Figure 2: Input Equivalent Circuit

Table 2: Pin Description

PIN N°

SYMBOL

NAME AND FUNCTION

1, 4, 9, 12

1A to 4A

Data Inputs

2, 5, 10, 13

1B to 4B

Data Inputs

3, 6, 8, 11

1Y to 4Y

Data Outputs

7

GND

Ground (0V)

14

VCC

Positive Supply Voltage

Table 3: Truth Table
A		B	Y
L		L	H
L		H	H
H		L	H
H		H	L

Table 4: Absolute Maximum Ratings

Symbol	Parameter	Value		Unit
VCC	Supply Voltage	-0.5 to +7.0		V
VI	DC Input Voltage	-0.5 to +7.0		V
VO	DC Output Voltage	-0.5 to VCC + 0.5		V
IIK	DC Input Diode Current	- 20		mA
IOK	DC Output Diode Current	±	20	mA
IO	DC Output Current	±	25	mA
ICC or IGND	DC VCC or Ground Current	±	50	mA
Tstg	Storage Temperature	-65 to +150		°C
TL	Lead Temperature (10 sec)	300		°C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.

Table 5: Recommended Operating Conditions

Symbol	Parameter	Value	Unit
VCC	Supply Voltage (note 1)	2 to 3.6	V
VI	Input Voltage	0 to 5.5	V
VO	Output Voltage	0 to VCC	V
Top	Operating Temperature	-55 to 125	°C

1) Truth Table guaranteed: 1.2V to 3.6V

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74LVX132

Table 6: DC Specifications

			Test Condition							Value
Symbol	Parameter	VCC				TA = 25°C				-40 to 85°C		-55 to 125°C		Unit
		(V)			Min.		Typ.	Max.		Min.	Max.	Min.	Max.
Vt+	High Level Input	3.0							2.2		2.2		2.2	V
	Threshold
Vt-	Low Level Input	3.0			0.9						0.9		0.9	V
	Threshold
VH	Hysteresis Voltage	3.0			0.3				1.2	0.3	1.2	0.3	1.2	V
VOH	High Level Output	2.0		IO=-50 A	1.9		2.0			1.9		1.9
	Voltage
		3.0		IO=-50 A	2.9		3.0			2.9		2.9		V
		3.0		IO=-4 mA	2.58					2.48		2.4
VOL	Low Level Output	2.0		IO=50 A			0.0		0.1		0.1		0.1
	Voltage
		3.0		IO=50 A			0.0		0.1		0.1		0.1	V
		3.0		IO=4 mA				0.36			0.44		0.55
II	Input Leakage	3.6		VI = 5V or GND				±	0.1		± 1		± 1	A
	Current
ICC	Quiescent Supply	3.6		VI = VCC or GND					2		20		20	A
	Current
Table 7: Dynamic Switching Characteristics
			Test Condition							Value
Symbol	Parameter	VCC				TA = 25°C				-40 to 85°C		-55 to 125°C		Unit
		(V)			Min.		Typ.	Max.		Min.	Max.	Min.	Max.
VOLP	Dynamic Low						0.3		0.5
	Voltage Quiet	3.3
VOLV					-0.5		-0.3
	Output (note 1, 2)
VIHD	Dynamic High	3.3		CL = 50 pF	2.2									V
	Voltage Input (note
	1, 3)
VILD	Dynamic Low	3.3							0.9
	Voltage Input (note
	1, 3)

1)Worst case package.

2)Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.

3)Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.

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74LVX132

Table 8: AC Electrical Characteristics (Input tr = tf = 3ns)

			Test Condition							Value
Symbol	Parameter	VCC		CL		TA = 25°C				-40 to 85°C		-55 to 125°C		Unit
		(V)		(pF)		Min.	Typ.	Max.		Min.	Max.	Min.	Max.
tPLH tPHL	Propagation Delay	2.7		15			7.5		10.5	1.0	12.0	1.0	12.0
	Time	2.7		50			8.3		12.0	1.0	13.5	1.0	13.5	ns
		3.3(*)		15			5.9		8.0	1.0	9.0	1.0	9.0
		3.3(*)		50			6.5		9.0	1.0	10.0	1.0	10.0
tOSLH	Output To Output	2.7		50			0.5		1.0		1.5		1.5
tOSHL	Skew Time (note1,	3.3(*)		50			0.5		1.0		1.5		1.5	ns
	2)

1)Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW

2)Parameter guaranteed by design

(*) Voltage range is 3.3V ± 0.3V

Table 9: Capacitive Characteristics

Test Condition

Value

Symbol

Parameter

VCC

TA = 25°C

-40 to 85°C

-55 to 125°C

Unit

(V)

Min.

Typ.

Max.

Min.

Max.

Min.

Max.

CIN

Input Capacitance

3.3

6

10

10

10

pF

CPD

Power Dissipation

3.3

16

pF

Capacitance

(note 1)

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate)

Figure 3: Test Circuit

CL =15/50pF or equivalent (includes jig and probe capacitance)

RT = ZOUT of pulse generator (typically 50Ω )

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