■5V TOLERANT INPUTS
■HIGH SPEED: tPD = 6.8ns (MAX.) at VCC = 3V
■POWER DOWN PROTECTION ON INPUTS AND OUTPUTS
■SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V
■PCI BUS LEVELS GUARANTEED AT 24 mA
■BALANCED PROPAGATION DELAYS: tPLH tPHL
■OPERATING VOLTAGE RANGE:
VCC(OPR) = 1.65V to 3.6V (1.2V Data Retention)
■PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 373
■LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17)
■ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015); MM > 200V
DESCRIPTION
The 74LVC373A is a low voltage CMOS OCTAL D-TYPE LATCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications.
These 8 bit D-Type latch are controlled by a latch enable input (LE) and an output enable input (OE). While the LE inputs is held at a high level, the Q
PIN CONNECTION AND IEC LOGIC SYMBOLS
74LVC373A
OCTAL D-TYPE LATCH HIGH PERFORMANCE
SOP |
|
TSSOP |
ORDER CODES |
|
|
PACKAGE |
TUBE |
T & R |
SOP |
74LVC373AM |
74LVC373AMTR |
TSSOP |
|
74LVC373ATTR |
outputs will follow the data input precisely or inversely. When the LE is taken low, the Q outputs will be latched precisely or inversely at the logic level of D input data. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state.
This device is designed to interface directly High Speed CMOS systems with TTL and NMOS components.
It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption.
All inputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
February 2002 |
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74LVC373A
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No |
SYMBOL |
NAME AND FUNCTION |
1 |
OE |
Asynchronous Master |
|
|
Reset (Active LOW) |
2, 5, 6, 9, 12, |
Q0 to Q7 |
3-State Outputs |
15, 16,19 |
|
|
3, 4, 7, 8, 13, |
D0 to D7 |
Data Inputs |
14, 17, 18 |
|
|
11 |
LE |
Latch Enable Input |
10 |
GND |
Ground (0V) |
20 |
VCC |
Positive Supply Voltage |
TRUTH TABLE
|
INPUTS |
|
OUTPUT |
|
OE |
LE |
D |
Q |
|
H |
X |
X |
Z |
|
L |
L |
X |
NO |
|
CHANGE |
||||
|
|
|
||
L |
H |
L |
L |
|
L |
H |
H |
H |
|
X : Don't Care |
|
|
|
|
Z :High Impedance |
|
|
|
ABSOLUTE MAXIMUM RATINGS
Symbol |
Parameter |
Value |
Unit |
VCC |
Supply Voltage |
-0.5 to +7.0 |
V |
VI |
DC Input Voltage |
-0.5 to +7.0 |
V |
VO |
DC Output Voltage (VCC = 0V) |
-0.5 to +7.0 |
V |
VO |
DC Output Voltage (High or Low State) (note 1) |
-0.5 to VCC + 0.5 |
V |
IIK |
DC Input Diode Current |
- 50 |
mA |
IOK |
DC Output Diode Current (note 2) |
- 50 |
mA |
IO |
DC Output Current |
± 50 |
mA |
ICC or IGND |
DC VCC or Ground Current per Supply Pin |
± 100 |
mA |
Tstg |
Storage Temperature |
-65 to +150 |
°C |
TL |
Lead Temperature (10 sec) |
300 |
°C |
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied
1)IO absolute maximum rating must be observed
2)VO < GND
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|
|
|
74LVC373A |
RECOMMENDED OPERATING CONDITIONS |
|
|
|
Symbol |
Parameter |
Value |
Unit |
VCC |
Supply Voltage (note 1) |
1.65 to 3.6 |
V |
VI |
Input Voltage |
0 to 5.5 |
V |
VO |
Output Voltage (VCC = 0V) |
0 to 5.5 |
V |
VO |
Output Voltage (High or Low State) |
0 to VCC |
V |
IOH, IOL |
High or Low Level Output Current (VCC = 3.0 to 3.6V) |
± 24 |
mA |
IOH, IOL |
High or Low Level Output Current (VCC = 2.7 to 3.0V) |
± 12 |
mA |
IOH, IOL |
High or Low Level Output Current (VCC = 2.3 to 2.7V) |
± 8 |
mA |
IOH, IOL |
High or Low Level Output Current (VCC = 1.65 to 2.3V) |
± 4 |
mA |
Top |
Operating Temperature |
-55 to 125 |
°C |
dt/dv |
Input Rise and Fall Time (note 2) |
0 to 10 |
ns/V |
1)Truth Table guaranteed: 1.2V to 3.6V
2)VIN from 0.8V to 2V at VCC = 3.0V
DC SPECIFICATIONS
Symbol |
Parameter |
VIH |
High Level Input |
|
Voltage |
VIL |
Low Level Input |
|
Voltage |
VOH |
High Level Output |
|
Voltage |
VOL |
Low Level Output |
|
Voltage |
II |
Input Leakage |
|
Current |
Ioff |
Power Off Leakage |
|
Current |
IOZ |
High Impedance |
|
Output Leakage |
|
Current |
ICC |
Quiescent Supply |
|
Current |
ICC |
ICC incr. per Input |
|
Test Condition |
|
Value |
|
|
||
VCC |
|
-40 to 85 °C |
-55 to 125 °C |
Unit |
|||
|
|
|
|
|
|
||
(V) |
|
|
Min. |
Max. |
Min. |
Max. |
|
|
|
|
|
||||
1.65 to |
1.95 |
|
0.65VCC |
|
0.65VCC |
|
|
2.3 to |
2.7 |
|
1.7 |
|
1.7 |
|
V |
2.7 to |
3.6 |
|
2 |
|
2 |
|
|
1.65 to |
1.95 |
|
|
0.35VCC |
|
0.35VCC |
|
2.3 to |
2.7 |
|
|
0.7 |
|
0.7 |
V |
2.7 to |
3.6 |
|
|
0.8 |
|
0.8 |
|
1.65 to 3.6 |
IO=-100 μA |
VCC-0.2 |
|
VCC-0.2 |
|
|
|
1.65 |
IO=-4 mA |
1.2 |
|
1.2 |
|
|
|
2.3 |
|
IO=-8 mA |
1.7 |
|
1.7 |
|
V |
2.7 |
|
IO=-12 mA |
2.2 |
|
2.2 |
|
|
|
|
|
|
||||
3.0 |
|
IO=-18 mA |
2.4 |
|
2.4 |
|
|
3.0 |
|
IO=-24 mA |
2.2 |
|
2.2 |
|
|
1.65 to 3.6 |
IO=100 μA |
|
0.2 |
|
0.2 |
|
|
1.65 |
IO=4 mA |
|
0.45 |
|
0.45 |
|
|
2.3 |
|
IO=8 mA |
|
0.7 |
|
0.7 |
V |
2.7 |
|
IO=12 mA |
|
0.4 |
|
0.4 |
|
3.0 |
|
IO=24 mA |
|
0.55 |
|
0.55 |
|
3.6 |
|
VI = 0 to 5.5V |
|
± 5 |
|
± 5 |
μA |
0 |
|
VI or VO = 5.5V |
|
10 |
|
10 |
μA |
3.6 |
|
VI = VIH orVIL |
|
± 10 |
|
± 10 |
μA |
|
|
VO = 0 to 5.5V |
|
|
|
|
|
|
|
VI = VCC or GND |
|
10 |
|
10 |
|
3.6 |
|
VI or VO = 3.6 to |
|
± 10 |
|
± 10 |
μA |
|
|
5.5V |
|
|
|
||
|
|
|
|
|
|
|
|
2.7 to |
3.6 |
VIH = VCC-0.6V |
|
500 |
|
500 |
μA |
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