ST 74LVC161284 User Manual

74LVC161284

LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER

■HIGH SPEED: tPD = 9ns (MAX.) at VCC = 3V

■LOW POWER DISSIPATION: ICC=20μA (MAX) at VCC=3.6V TA=85°C

■TTL COMPATIBLE INPUTS VIH=2V (MIN) VIL=0.8(MAX)

■OPERATING VOLTAGE RANGE: VCC(OPR) = 3.0V to 3.6V

■A PORT HAVE STANDARD 4mA TOTEM POLE OUTPUT

■B PORT HIGH DRIVE SOURCE/SINK CAPABILITY OF 14mA

■SUPPORT IEEE STD 1284-I (LEVEL 1 TYPE) AND IEEE STD 1284-II (LEVEL 2 TYPE) FOR BIDIRECTIONAL PARALLEL COMMUNICATIONS BETWEEN PERSONAL COMPUTER ANT PRINTING PERIPHERALS

■TRANSLATION CAPABILITY ALLOW OUTPUTS ON CABLE SIDE TO INTERFACE WITH 5V SIGNAL

■PULL-UP RESISTOR INTEGRATED ON ALL OPEN-DRAIN OUTPUT ELIMINATE THE NEED FOR DISCRETE RESISTOR

■REPLACE THE FUNCTION OF TWO 74LVC1284 DEVICES

DESCRIPTION

The 74LVC161284 contains eight high speed non inverting bidirectional buffers and eleven control/ status non-inverting buffers with open drain outputs fabricated in silicon gate C2MOS technology. It’s intended to provide a standard signaling method for a bi-direction parallel peripheral in an Extended Capabilities Port Mode (ECP). The HD (Active HIGH) input pin enables the Cable port to switch from Open Drain to a high drive totem pole output, capable of sourcing 14mA on all thirteen buffer and 84mA on PERI LOGIC OUTPUT buffer. The DIR input determines the direction of data flow on the bidirectional buffers. DIR (Active HIGH) enables data flow from A port to B port. DIR (Active LOW) enables data flow from B port to A port. It is available in the commercial temperature range.

May 2003

TSSOP

ORDER CODES

PACKAGE	TUBE	T & R
TSSOP		74LVC161284TTR

PIN CONNECTION

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74LVC161284

LOGIC DIAGRAM

NOTE A: The PMOS transistors prevent backdriving current from the signal pins to VCC/CABLE when VCC/CABLE is open or at GND. The PMOS transistor is turned off when the associated driver is in the low state.

NOTE B: The PMOS transistor prevents backdriving current from the signal pins to VCC/CABLE when VCC/CABLE is open or at GND.

PIN DESCRIPTION

PIN No	SYMBOL	NAME AND FUNCTION
1	HD	High Drive Enable Input
2, 3, 4, 5, 6	A9 to A13	Side A Input
8, 9, 11, 12, 13, 14, 16, 17	A1 to A8	Side A Input or Output
19	PLI	Peripheral Logic Input
20, 21, 22, 23	A14 to A17	Side A Output
24	HLO	Host Logic Output
25	HLI	Host Logic Input
29, 28, 27, 26	C14 to C17	Side Cable Output
30	PLO	Peripheral Logic Output
41, 40, 38, 37, 36, 35, 33, 32	B1 to B8	Side Cable Input or Output
47, 46, 45, 44, 43	Y9 to Y13	Side Cable Output
48	DIR	Direction Control Input
10, 15, 34, 39	GND	Ground (0V)
7, 18	VCC	Positive Supply Voltage
31, 42	VCC/CABLE	Cable Power Supply

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								74LVC161284
TRUTH TABLE
	INPUT				OUTPUT			OUTPUT
	DIR		HD
	L		L		B1-B8 Data to A1-A8			Y9-Y13 and PLO Open
								Drain
					A9-A13 Data to Y9-Y13
								Y9-Y13 and PLO Totem
	L		H		C14-C17 Data to C14-C17
								Pole
	H		L		A1-A8 Data to B1-B8			B1-B8 Y9-Y13 and PLO
								Open Drain
					A9-A13 Data to Y9-Y13
								B1-B8 Y9-Y13 and PLO
	H		H		C14-C17 Data to C14-C17
								Totem Pole
ABSOLUTE MAXIMUM RATINGS
Symbol			Parameter					Value	Unit
VCC	Supply Voltage							-0.5 to +4.6	V
VCCcable	Cable Supply Voltage (must be ³ VCC)							-0.5 to +7.0	V
VIA	DC Input Voltage A1-A13, PLIN, DIR, HDIN						-0.5 to +VCC + 0.5		V
VIB	DC Input Voltage B1-B8, C14-C17, HLIN							-0.5 to +5.5	V
VIBp	DC Input Voltage B1-B8, C14-C17, HLIN (40ns transient)							-2 to +7	V
VOA	DC Output Voltage A1-A8, A14-A17, HLIN						-0.5 to +VCC + 0.5		V
VOB	DC Output Voltage B1-B8, Y9-Y13, PLIN							-0.5 to +5.5	V
VOBp	DC Output Voltage B1-B8, Y9-Y13, PLIN (40ns transient)							-2 to +7	V
IIK	DC Input Diode Current DIR, HD A9-A13, PLIN C14-C17							- 20	mA
IOK	DC Output Diode Current			A1-A8, A14-A17, HLIN				± 50	mA
				B1-B8, Y9-Y13, PLIN				- 50
IO	DC Output Current			A1-A8, HLIN				± 25	mA
				B1-B8, Y9-Y13				± 50
				PLO = LOW				84
				PLO = HIGH				-50
ICC or IGND	DC VCC or Ground Current per Supply Pin							± 200	mA
Tstg	Storage Temperature							-65 to +150	°C
TL	Lead Temperature (10 sec)							300	°C

Absolute Maximum Rating are those value beyond which damage to the device may occur. Functional operation under these condition is not implied

RECOMMENDED OPERATING CONDITIONS

Symbol	Parameter	Value	Unit
VCC	Supply Voltage	3.0 to 3.6	V
VCCcable	Cable Supply Voltage	3.0 to 5.5	V
VI	Input Voltage	0 to VCC	V
VO	Open Drain Output Voltage	0 to 5.5	V
Top	Operating Temperature	-40 to 85	°C

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74LVC161284

DC SPECIFICATIONS

					Test Condition				Value
Symbol		Parameter		VCC	VCCcable				-40 to 85 °C		Unit
				(V)	(V)				Min.	Max.
VIH	High Level		An, Bn, PLIN, DIR, HD						2
	Input Voltage
			Cn						2.3		V
				3.0	3.0
			HLIN						2.6
				to	to
VIL	Low Level		An, Bn, PLIN, DIR, HD							0.8
				3.6	5.5
	Input Voltage
			Cn							0.8	V
			HLIN							1.6
VOH	High Level		An, HL	3.0	3.0			IO=-50μA	2.8
	Output Voltage
				3.0	3.0			IO=-4mA	2.4
			Bn, Yn	3.0	3.0			IO=-14mA	2.0		V
			Bn, Yn	3.0	4.5			IO=-14mA	2.23
			PL	3.15	3.15			IO=-500μA	3.1
VOL	Low Level		An, HL	3.0	3.0			IO=50μA		0.2
	Output Voltage
				3.0	3.0			IO=4mA		0.4
			Bn, Yn	3.0	3.0			IO=14mA		0.8	V
			Bn, Yn	3.0	4.5			IO=14mA		0.77
			PL	3.0	3.0			IO=84mA		0.95
			PL	3.0	4.5			IO=84mA		0.90
II	Input Current		Cn	3.6	3.6			VI = VCC		50	μA
				3.6	3.6	VI=GND (Pull-up res)				-3.5	mA
			All input except B or C	3.6	5.0	VI = VCC or GND				± 1	μA
ICC	Quiescent Supply Current			3.6	5.0		VI = VCC IO=0			0.8	mA
						VI=GND (12xPull-up)				45
IOZ	High		Bn	3.6	5.0			VO = VCC		20	μA
	Impedance
				3.6	3.6	VO=GND (Pull-up res)				-3.5	mA
	Output
			A1-A8	3.6	5.0	VO = VCC or GND				± 20	μA
	Leakage
	Current
			Open Drain Y Output	3.6	3.6	VO=GND (Pull-up res)				-3.5	mA
IOFF	Power Off		B, Y output (to GND)	0	5.0	VI or VO = 0 to 7V				100	μA
	Leakage
			B, Y output (to VCC)	0	5.0	V	I	or V = 0 to 7V		10	μA
	Current
								O
Vhys	Input		An, Bn, PLIN, DIR, HD	3.3	5.0				0.4
	Hysteresis
			Cn	3.3	5.0				0.8		V
			HLIN	3.3	5.0				0.2
ZO	Output		B1-B8, Y9-Y13	3.3	5.0			VB = VOH	30	55	Ω
	Impedance
RP	Pull-up		B1-B8, Y9-Y13,	3.3	5.0			VB = VOH	1150	1650	Ω
	Resistance		C14-C17

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