74LCX16245
Low voltage CMOS 16-bit bus transceiver (3-state) with 5V tolerant inputs and outputs
Features
■5V tolerant inputs and outputs
■High speed:
–tPD = 4.5ns (Max) at VCC = 3V
■Power down protection on inputs and outputs
■Symmetrical output impedance:
–|IOH| = IOL = 24mA (Min) at VCC = 3V
■PCI bus levels guaranteed at 24mA
■Balanced propagation delays:
–tPLH tPHL
■Operating voltage range:
–VCC (Opr) = 2.0V to 3.6V
■Pin and function compatible with 74 series 16245
■Latch-up performance exceeds 500mA (JESD 17)
■ESD performance:
–HBM > 2000V
(MIL STD 883 method 3015); MM > 200V
Order codes
TSSOP48
Description
The 74LCX16245 is a low voltage CMOS 16 bit bus transceiver (3-state) fabricated with submicron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs.
This IC is intended for two-way asynchronous communication between data buses; the direction of data transmission is determined by DIR input.
The two enable inputs nG can be used to disable the device so that the buses are effectively isolated.
It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
All floating bus terminals during High Z State must be held HIGH or LOW.
Part number |
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Packaging |
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74LCX16245TTR |
TSSOP48 |
Tape and reel |
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February 2007 |
Rev 7 |
1/15 |
www.st.com
Contents |
74LCX16245 |
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Contents
1 |
Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . |
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2 |
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
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2.1 |
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
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2.2 |
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
3 |
Logic states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
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3.1 |
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
4 |
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.1 |
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6 |
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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7 |
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8 |
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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9 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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74LCX16245 |
Logic symbols and I/O equivalent circuit |
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Pin settings |
74LCX16245 |
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74LCX16245 Logic states
2.2 |
Pin description |
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Table 1. Pin description |
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Pin N° |
Symbol |
Name and function |
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1 |
1DIR |
Directional control |
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2, 3, 5, 6, |
1B1 to 1B8 |
Data inputs/outputs |
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8, 9, 11, 12 |
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13, 14, 16, 17, |
2B1 to 2B8 |
Data inputs/outputs |
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19, 20, 22, 23 |
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24 |
2DIR |
Directional control |
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25 |
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Output enable input |
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2G |
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36, 35, 33, 32, |
2A1 to 2A8 |
Data inputs/outputs |
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30, 29, 27, 26 |
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47, 46, 44, 43, |
1A1 to 1A8 |
Data inputs/outputs |
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41, 40, 38, 38 |
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48 |
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Output enable input |
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1G |
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4, 10, 15, 21, |
GND |
Ground (0V) |
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28, 34, 39, 45 |
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7, 18, 31, 42 |
VCC |
Positive supply voltage |
Table 2. Truth table
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Inputs |
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Function |
Output |
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DIR |
A BUS |
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B BUS |
Yn |
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G |
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L |
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L |
Output |
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Input |
A = B |
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L |
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H |
Input |
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Output |
B = A |
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H |
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X |
Z |
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Z |
Z |
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Note: |
X : Do not care |
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Z : High impedance |
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