ST 74LCX139 User Manual

ST 74LCX139 User Manual

74LCX139

74LCX139

LOW VOLTAGE CMOS

DUAL 2 TO 4 DECODER/DEMULTIPLEXER

5V TOLERANT INPUTS

HIGH SPEED:

tPD = 6.2ns (MAX.) at VCC = 3V

POWER DOWN PROTECTION ON INPUTS AND OUTPUTS

SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

PCI BUS LEVELS GUARANTEED AT 24 mA

BALANCED PROPAGATION DELAYS: tPLH tPHL

OPERATING VOLTAGE RANGE:

VCC(OPR) = 2.0V to 3.6V (1.5V Data Retention)

PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 139

LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17)

ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015); MM > 200V

DESCRIPTION

The 74LCX139 is a low voltage CMOS DUAL 2 TO 4 LINE DECODER/DEMULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs.

SOP TSSOP

Table 1: Order Codes

PACKAGE

T & R

 

 

SOP

74LCX139MTR

 

 

TSSOP

74LCX139TTR

 

 

The active low enable input can be used for gating or as a data input for demultiplexing applications. While the enable input is held high, all four outputs are high independently of the other inputs.

It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

Figure 1: Pin Connection And IEC Logic Symbols

September 2004

Rev. 3

1/12

 

 

74LCX139

Figure 2: Input And Output Equivalent Circuit

Table 2: Pin Description

 

 

 

PIN N°

 

 

 

SYMBOL

 

 

 

 

 

NAME AND FUNCTION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1, 15

 

 

 

 

1G,

2G

 

 

 

 

Enable Inputs

 

 

 

 

 

2, 3

 

 

 

 

1A, 1B

 

 

 

 

Address Inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4, 5, 6, 7

 

 

 

1Y0 to 1Y3

 

 

 

 

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12, 11, 10, 9

 

 

 

2Y0

to 2Y3

 

 

 

 

Outputs

 

 

 

 

 

14, 13

 

 

 

 

2A, 2B

 

 

 

 

Address Inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

 

 

 

GND

 

 

 

 

Ground (0V)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

16

 

 

 

 

VCC

 

 

 

 

Positive Supply Voltage

 

 

Table 3: Truth Table

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

INPUTS

 

 

 

 

 

 

 

 

 

 

 

 

 

OUTPUTS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ENABLE

 

 

SELECT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

G

 

B

 

 

A

 

 

 

Y0

 

 

Y1

 

 

 

Y2

 

Y3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

 

X

 

 

X

 

 

 

H

 

 

H

 

 

 

H

 

H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

L

 

 

L

 

 

 

L

 

 

H

 

 

 

H

 

H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

L

 

 

H

 

 

 

H

 

 

L

 

 

 

H

 

H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

H

 

 

L

 

 

 

H

 

 

H

 

 

 

L

 

H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

H

 

 

H

 

 

 

H

 

 

H

 

 

 

H

 

L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X : Don’t Care

2/12

74LCX139

Figure 3: Logic Diagram

This logic diagram has not be used to estimate propagation delays

Table 4: Absolute Maximum Ratings

Symbol

Parameter

Value

Unit

 

 

 

 

VCC

Supply Voltage

-0.5 to +7.0

V

VI

DC Input Voltage

-0.5 to +7.0

V

VO

DC Output Voltage (VCC = 0V)

-0.5 to +7.0

V

VO

DC Output Voltage (High or Low State) (note 1)

-0.5 to VCC + 0.5

V

IIK

DC Input Diode Current

- 50

mA

IOK

DC Output Diode Current (note 2)

- 50

mA

IO

DC Output Current

±

50

mA

ICC

DC Supply Current per Supply Pin

±

100

mA

IGND

DC Ground Current per Supply Pin

±

100

mA

Tstg

Storage Temperature

-65 to +150

°C

TL

Lead Temperature (10 sec)

300

°C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

1)IO absolute maximum rating must be observed

2)VO < GND

Table 5: Recommended Operating Conditions

Symbol

Parameter

Value

Unit

 

 

 

 

VCC

Supply Voltage (note 1)

2.0 to 3.6

V

VI

Input Voltage

0 to 5.5

V

VO

Output Voltage (VCC = 0V)

0 to 5.5

V

VO

Output Voltage (High or Low State)

0 to VCC

V

IOH, IOL

High or Low Level Output Current (VCC = 3.0 to 3.6V)

±

24

mA

IOH, IOL

High or Low Level Output Current (VCC = 2.7V)

±

12

mA

Top

Operating Temperature

-55 to 125

°C

dt/dv

Input Rise and Fall Time (note 2)

0 to 10

ns/V

 

 

 

 

 

1)Truth Table guaranteed: 1.5V to 3.6V

2)VIN from 0.8V to 2V at VCC = 3.0V

3/12

74LCX139

Table 6: DC Specifications

 

 

Test Condition

 

Value

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

VCC

 

-40 to 85 °C

-55 to 125 °C

Unit

 

 

 

 

 

 

 

 

 

 

(V)

 

Min.

Max.

Min.

Max.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

High Level Input

 

 

2.0

 

2.0

 

V

 

Voltage

2.7 to 3.6

 

 

 

 

 

 

VIL

Low Level Input

 

 

0.8

 

0.8

V

 

 

 

 

 

Voltage

 

 

 

 

 

 

 

VOH

High Level Output

2.7 to 3.6

IO=-100 µ A

VCC-0.2

 

VCC-0.2

 

 

 

Voltage

 

 

 

 

 

 

 

 

2.7

IO=-12 mA

2.2

 

2.2

 

V

 

 

 

 

 

 

3.0

IO=-18 mA

2.4

 

2.4

 

 

 

 

 

 

 

 

IO=-24 mA

2.2

 

2.2

 

 

 

 

 

 

 

 

VOL

Low Level Output

2.7 to 3.6

IO=100 µ A

 

0.2

 

0.2

 

 

Voltage

 

 

 

 

 

 

 

 

2.7

IO=12 mA

 

0.4

 

0.4

V

 

 

 

 

 

 

3.0

IO=16 mA

 

0.4

 

0.4

 

 

 

 

 

 

 

IO=24 mA

 

0.55

 

0.55

 

 

 

 

 

 

 

II

Input Leakage

2.7 to 3.6

VI = 0 to 5.5V

 

± 5

 

± 5

µ A

 

Current

 

 

 

 

 

 

 

 

 

 

Ioff

Power Off Leakage

0

VI or VO = 5.5V

 

10

 

10

µ A

 

Current

 

 

 

 

 

 

 

 

 

 

ICC

Quiescent Supply

2.7 to 3.6

VI = VCC or GND

 

10

 

10

µ A

 

Current

 

 

 

 

 

 

VI or VO= 3.6 to 5.5V

 

± 10

 

± 10

 

 

 

 

 

 

∆ ICC

ICC incr. per Input

2.7 to 3.6

VIH = VCC - 0.6V

 

500

 

500

µ A

Table 4: DYNAMIC SWITCHING CHARACTERISTICS

 

 

 

Test Condition

 

 

Value

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

VCC

 

 

 

TA = 25

°C

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

(V)

 

 

Min.

 

Typ.

 

 

Max.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOLP

Dynamic Low Level Quiet

3.3

 

CL = 50pF

 

 

0.8

 

 

 

V

 

Output (note 1)

 

VIL = 0V, VIH = 3.3V

 

 

 

 

 

 

VOLV

 

 

 

-0.8

 

 

 

 

 

 

 

 

 

 

 

 

1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state.

Table 7: AC Electrical Characteristics

 

 

 

 

Test Condition

 

 

Value

 

 

Symbol

Parameter

 

 

 

 

 

 

 

 

Unit

VCC

CL

RL

ts = tr

-40 to 85 °C

-55 to 125 °C

 

 

 

 

 

 

 

 

 

 

 

 

 

(V)

(pF)

()

(ns)

Min.

Max.

Min.

Max.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPLH tPHL

Propagation Delay

2.7

50

500

2.5

 

7.3

 

7.3

ns

 

Time A, B to Y

3.0 to 3.6

1.0

6.2

1.0

6.2

 

 

 

 

 

 

 

 

 

 

 

 

 

tPLH tPHL

Propagation Delay

2.7

50

500

2.5

 

5.8

 

5.8

ns

 

 

 

 

 

 

 

 

Time G to Y

 

 

 

 

 

 

3.0 to 3.6

1.0

5.3

1.0

5.3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tOSLH

Output To Output

3.0 to 3.6

50

500

2.5

 

1.0

 

1.0

ns

tOSHL

Skew Time (note1,

 

 

 

 

 

 

 

 

 

 

2)

 

 

 

 

 

 

 

 

 

 

 

1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-

ing in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|) 2) Parameter guaranteed by design

4/12

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