ST 54VCXH162245 User Manual
Rad hard low voltage CMOS 16-bit bus buffer transceiver
(3-state) with 3.6 V tolerant inputs and outputs
Features
■ 1.65 to 3.6 V inputs and outputs
■ High speed A outputs:
–t
= 3.4 ns at V
PD
–t
= 4.3 ns at V
PD
■ Symmetrical impedance A output:
–|I
–|I
■ High speed B outputs:
–t
–t
■ Symmetrical impedance A output:
–|I
–|I
■ Power down protection on inputs and outputs
■ 26 Ω serie resistors in A port output
■ Operating voltage range:
–V
■ Pin and function compatible with 54 series
| = IOL = 12 mA (Min.) at VCC = 3.0 V
OH
| = IOL = 8 mA (Min.) at VCC = 2.3 V
OH
= 2.5 ns (Max.) at V
PD
= 3.2 ns (Max.) at V
PD
| = IOL = 24 mA (Min.) at VCC = 3.0 V
OH
| = IOL = 18 mA (Min.) at VCC = 2.3 V
OH
(Opr) = 1.65 V to 3.6 V
CC
H162245
■ Bus hold provided on both sides
■ Cold spare function
■ Latch-up performance exceeds
300 mA (JESD 17)
■ ESD performance:
– HBM > 2000 V
(MIL STD 883 method 3015); MM > 200 V
■ 300 krad Mil1019.6 condition A, (RHA QML
qualification extension undergone)
■ No SEL, no SEU and no SET under 110
Mev/cm2/mg LET heavy ions irradiation
■ QML qualified product
■ Device fully compliant with
DSCC SMD 5962-02508
■ 100 mV typical Input hysteresis
= 3.0 to 3.6 V
CC
= 2.3 to 2.7 V
CC
CC
CC
= 3.0 to 3.6 V
= 2.3 to 2.7 V
54VCXH162245
Flat-48
The upper metallic lid is not electrically connected to any
pins, nor to the IC die inside the package.
Description
The 54VCXH162245 is a low voltage CMOS 16
bit bus transceiver (3-state) fabricated with submicron silicon gate and five-layer metal wiring
C²MOS technology. It is ideal for low power and
very high speed 1.65 to 3.6 V applications; it can
be interfaced to 3.6 V signal environment for both
inputs and outputs. This IC is intended for twoway asynchronous communication between data
buses; the direction of data transmission is
determined by DIR input. The two enable inputs
nG
can be used to disable the device so that the
buses are effectively isolated. The device circuits
is including 26 Ω series resistance in the A port
outputs. These resistors permit to reduce line
noise in high speed applications. Bus hold on
data inputs is provided in order to eliminate the
need for external pull-up or pull-down resistor. All
inputs and outputs are equipped with protection
circuits against static discharge, giving them 2 kV
ESD immunity and transient excess voltage. All
floating bus terminals during high Z state must be
held HIGH or LOW.
July 2011 Doc ID 10632 Rev 9 1/19
www.st.com
19
Contents 54VCXH162245
Contents
1 Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/19 Doc ID 10632 Rev 9
54VCXH162245 Logic symbols and I/O equivalent circuit
1 Logic symbols and I/O equivalent circuit
Figure 1. IEC logic symbols
Figure 2. Input and output equivalent circuit
Doc ID 10632 Rev 9 3/19
Pin settings 54VCXH162245
2 Pin settings
2.1 Pin connection
Figure 3. Pin connection (top through view)
4/19 Doc ID 10632 Rev 9
54VCXH162245 Pin settings
2.2 Pin description
Table 1. Pin description
Pin n° Symbol Name and function
1 1DIR Directional control
2, 3, 5, 6, 8, 9, 11, 12 1B1 to 1B8 Data inputs/outputs
13, 14, 16, 17, 19, 20, 22, 23 2B1 to 2B8 Data inputs/outputs
24 2DIR Directional control
25 2G
36, 35, 33, 32, 30, 29, 27, 26 2A1 to 2A8 Data inputs/outputs
47, 46, 44, 43, 41, 40, 38, 38 1A1 to 1A8 Data inputs/outputs
Output enable input
48 1G
4, 10, 15, 21, 28, 34, 39, 45 GND Ground (0 V)
7, 18, 31, 42 V
2.3 Truth table
Table 2. Truth table
Inputs Function Output
G
L L output input A = B
L H input output B = A
HXZ Z Z
Note: X = Do not care; Z = High Impedance
DIR A bus B bus Yn
CC
Output enable input
Positive supply voltage
Doc ID 10632 Rev 9 5/19
Maximum rating 54VCXH162245
3 Maximum rating
Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
I
CC
I
V
I
GND
T
Supply voltage -0.5 to +4.6 V
CC
DC input voltage -0.5 to +4.6 V
V
I
V
DC output voltage (OFF state) -0.5 to +4.6 V
O
DC output voltage (high or low state)
V
O
I
DC input diode current - 50 mA
IK
DC output diode current
OK
DC output current ± 50 mA
I
O
or
DC VCC or ground current per supply pin ± 100 mA
P
Power dissipation 400 mW
D
Storage temperature -65 to +150 °C
stg
Lead temperature (10 sec) 260 °C
T
L
(2)
1. IO absolute maximum rating must be observed
2. VO < GND, VO > V
CC
(1)
-0.5 to VCC + 0.5 V
- 50 mA
6/19 Doc ID 10632 Rev 9
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