SPT SPT7938SIR Datasheet

SPT7938

12-BIT, 40 MSPS, 170 mW A/D CONVERTER

FEATURES

• Monolithic 40 MSPS Analog-to-Digital Converter

• 170 mW Power Dissipation

• On-Chip Track-and-Hold

• Single +5 V Power Supply

• TTL/CMOS Outputs

• 20 pF Input Capacitance

• Selectable +3 V or +5 V Logic I/O

GENERAL DESCRIPTION

The SPT7938 is a 12-bit monolithic, low-cost, low-power
analog-to-digital converter capable of minimum word rates
of 40 MSPS. The on-chip track-and-hold function assures
very good dynamic performance without the need for exter­nal components. The input drive requirements are mini­mized due to the SPT7938’s low input capacitance of only
20 pF.

Power dissipation is extremely low at only 170 mW typical at
40 MSPS with a power supply of +5.0 V. The digital outputs

BLOCK DIAGRAM

ADC Section 1

A

IN

CLK In

Timing

and

Control

1:18
Mux

P1

P2

.
.
.

P17

P18

T/H

ADC Section 2

ADC Section 17

ADC Section 18

T/H

.
.
.

Auto-

Zero

CMP

Auto-

Zero

CMP

APPLICATIONS

• All High-Speed Applications Where
Low Power Dissipation Is Required

• Video Imaging

• Medical Imaging

• Radar Receivers

• IR Imaging

• Digital Communications

are +3 V or +5 V, and are user selectable. The SPT7938 has
incorporated proprietary circuit design and CMOS process­ing technologies to achieve its advanced performance. In­puts and outputs are TTL/CMOS compatible to interface
with TTL/CMOS logic systems. Output data format is
straight binary.

The SPT7938 is available in a 28-lead SSOP package over
the industrial temperature range.

13-Bit

SAR

DAC

13-Bit

SAR

DAC

13

13

13

.
.
.

13

.
.
.

13

13

13-Bit

18:1
Mux/
Error

Correction

D12 Out of Range

D11 (MSB)

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

DØ (LSB)

V

RHF

Reference Ladder

V

RHS

V

RLS

V

EN

RLF

Signal Processing Technologies, Inc.

4755 Forge Road, Colorado Springs, Colorado 80907, USA

Phone: [phone] FAX: [phone] Website: http://www.spt.com E-Mail: [e-mail]

ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C

Supply Voltages

VDD............................................................................+6 V

Temperature

Operating Temperature ............................. –40 to +85 °C

Junction Temperature ......................................... +175 °C

Input Voltages

Analog Input.................................... –0.5 V to VDD +0.5 V

CLK Input ...................................................................V

DD

Lead Temperature, (soldering 10 seconds)........ +300 °C

Storage Temperature............................... –65 to +150 °C

AGND – DGND ..................................................±100 mV

Output

Digital Outputs .......................................................10 mA

Note: 1. Operation at any Absolute Maximum Rating is not implied. See Electrical Specifications for proper nominal

applied conditions in typical applications.

ELECTRICAL SPECIFICATIONS

TA=T

PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS

Resolution 12 Bits
DC Accuracy

Analog Input

Conversion Characteristics

Reference Input

Dynamic Performance

1
2

Due to internal architecture, over-voltage recovery time is less than one clock cycle (i.e., 25 ns at ƒ

MIN

to T

, VDD=+5.0 V, ƒS=40 MSPS, VIN=0 to 4 V, V

MAX

=4.0 V, V

RHS

=0.0 V, unless otherwise specified.

RLS

TEST TEST SPT7938

Integral Nonlinearity V ±3 LSB
Differential Nonlinearity V ±1 LSB
No Missing Codes VI Guaranteed

Input Voltage Range VI V

RLS

V

RHS

V
Input Resistance V 25 kΩ
Input Capacitance V 5.0 pF
Input Bandwidth VIN = 2 V
–Full-Scale Error
+Full-Scale Error

1
1

PP

V 250 MHz
V 0.035 %FS
V –0.12 %FS

Maximum Conversion Rate VI 40 MHz
Minimum Conversion Rate V 1 MHz
Pipeline Delay (Latency) IV 14 Clock Cycles
Aperture Delay Time V 1.0 ns
Aperture Jitter Time V 5.0 ps(p-p)
Over-Voltage Recovery Time

2

25 ns

Resistance VI 420 465 520 Ω
Voltage Range

V
V
V

RHS
RLS
RHS

– V

RLS

IV 3.0 V

DD

IV 0.0 2.0 V

V 2.0 4.0 5.0 V

V

Effective Number of Bits

ƒIN=3.58 MHz TA = +25 °C I 9.9 10.1 Bits
ƒIN=3.58 MHz TA = T

MIN

to T

MAX

IV 9.4 10.1 Bits
Signal-to-Noise Ratio
(without Harmonics)

ƒIN=3.58 MHz TA = +25 °C I 61.2 62.5 dB
ƒIN=3.58 MHz TA = T

The full-scale range spans the reference ladder sense pins, V

MIN

to T

MAX

RHS

IV 58.0 62.5 dB

and V

. Refer to the Voltage Reference section for discussion.

RLS

= 40 MHz).

CLK

SPT

SPT7938

2 5/24/00

ELECTRICAL SPECIFICATIONS

TA=T

PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS

Dynamic Performance

Clock Input

Output Enable

Digital Outputs

Power Supply Requirements

to T

MIN

Harmonic Distortion

ƒIN=3.58 MHz TA = +25 °C I –62.5 –71 dB
ƒIN=3.58 MHz TA = T

Signal-to-Noise and Distortion

(SINAD)
ƒIN=3.58 MHz TA = +25 °C I 60.2 62 dB
ƒIN=3.58 MHz TA = T

Spurious Free Dynamic Range

ƒIN=3.58 MHz V 73 dB
Differential Phase V 0.25 Degree
Differential Gain V 0.5 %

Logic 1 Voltage VI 2.0 V
Logic 0 Voltage VI 0.8 V
Maximum Input Current Low VI –10 +10 µA
Maximum Input Current High VI –10 +10 µA
Input Capacitance V 5 pF
Input Duty Cycle V 45 50 55 %

Logic 1 Voltage VI 3.5 V
Logic 0 Voltage VI 1.5 V
Maximum Input Current Low VI –10 +10 µA
Maximum Input Current High VI –10 +10 µA

Logic 1 Voltage IOH = 0.5 mA VDD–0.5 V
Logic 0 Voltage I
CLK to Output Delay Time (tD)IV15ns
Output Enable to Data Output Delay 20 pF load IV 10 ns

Voltages OV
Currents I

Power Dissipation VI 170 200 mW
Power Supply Rejection Ratio 60 dB

, VDD=+5.0 V, ƒS=40 MSPS, VIN=0 to 4 V, V

MAX

TEST TEST SPT7938

to T

MIN

to T

MIN

= 1.6 mA 0.42 V

OL

DD

V

DD

DD

MAX

MAX

=4.0 V, V

RHS

IV –62.0 –71 dB

IV 57.5 62 dB

IV 3.0 5.0 V
IV 4.75 5.0 5.25 V
VI 34 40 mA

=0.0 V, unless otherwise specified.

RLS

TEST LEVEL CODES

All electrical characteristics are subject to the
following conditions:

All parameters having min/max specifications
are guaranteed. The Test Level column indi­cates the specific device testing actually per­formed during production and Quality Assur­ance inspection. Any blank section in the data
column indicates that the specification is not
tested at the specified condition.

SPT

TEST LEVEL

I

II

III
IV

V

VI

3 5/24/00

TEST PROCEDURE

100% production tested at the specified temperature.
100% production tested at TA = +25 °C, and sample

tested at the specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and

characterization data.
Parameter is a typical value for information purposes

only.
100% production tested at TA = +25 °C. Parameter is

guaranteed over specified temperature range.

SPT7938