SPT SPT7921SCJ, SPT7921SCQ Datasheet

SPT7921

12-BIT, 20 MSPS, TTL, A/D CONVERTER

FEATURES

• Monolithic

• 12-Bit 20 MSPS Converter

• 66 dB SNR @1 MHz Input

• On-Chip Track/Hold

• Bipolar ±2.0 V Analog Input

• Low Power (1.1 W Typical)

• 5 pF Input Capacitance

• TTL Outputs

GENERAL DESCRIPTION

The SPT7921 A/D converter is the industry's first 12-bit
monolithic analog-to-digital converter capable of sample
rates greater than 20 MSPS. On board input buffer and
track/hold function assures excellent dynamic perfor­mance without the need for external components. Drive
requirement problems are minimized with an input ca­pacitance of only 5 pF.

Logic inputs and outputs are TTL. An overrange output signal
is provided to indicate overflow conditions. Output data

APPLICATIONS

• Radar Receivers

• Professional Video

• Instrumentation

• Medical Imaging

• Electronic Warfare

• Digital Communications

• Digital Spectrum Analyzers

• Electro-Optics

format is straight binary. Power dissipation is very low at only

1.1 watts with power supply voltages of +5.0 and -5.2 volts.
The SPT7921 also provides a wide input voltage range of
±2.0 volts.

The SPT7921 is available in 32-lead ceramic sidebrazed DIP
and 44-lead cerquad packages over the commercial tem­perature range. Consult the factory for availability of die,
military temperature and /883 versions.

BLOCK DIAGRAM

V

Input

IN

Buffer

Analog Gain

Compression

Processor

Signal Processing Technologies, Inc.

4-Bit Flash

Converter

Track-and-Hold

Amplifiers

Asynchronous

SAR

4

Error

Correction,

Decoding

and

Output TTL

Drivers

8

4755 Forge Road, Colorado Springs, Colorado 80907, USA

Phone: [phone] FAX: [phone]

12

Digital

Output

ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C

Supply Voltages

VCC...........................................................................+6 V

Output

Digital Outputs .............................................. 0 to -30 mA

VEE............................................................................ -6 V

Temperature

Input Voltages

Analog Input................................................ VFB≤VIN≤V

VFT, VFB. ....................................................+3.0 V, -3.0 V

Reference Ladder Current .....................................12 mA

CLK IN .......................................................................V

FT

CC

Operating Temperature ................................. 0 to +70 °C

Junction Temperature .........................................+175 °C

Lead Temperature, (soldering 10 seconds)........+300 °C

Storage Temperature................................ -65 to +150 °C

Note: 1. Operation at any Absolute Maximum Rating is not implied. See Electrical Specifications for proper nominal

applied conditions in typical applications.

ELECTRICAL SPECIFICATIONS

TA=T
unless otherwise specified.

PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS

Resolution 12 Bits
DC Accuracy +25 °C

Analog Input f

Reference Input f

Timing Characteristics

Dynamic Performance

to T

MIN

Integral Nonlinearity ± Full Scale V ±2.0 LSB
Differential Nonlinearity 100 kHz Sample Rate V ±0.8 LSB
No Missing Codes VI Guaranteed

Input Voltage Range VI ±2.0 V
Input Bias Current TA=+25 °C I 30 60 µA
Input Resistance T
Input Capacitance V 5 pF
Input Bandwidth 3 dB Small Signal V 120 MHz
+FS Error V ±5.0 LSB

-FS Error V ±5.0 LSB

Reference Ladder Resistance VI 500 800 Ω
Reference Ladder Tempco V 0.8 Ω/°C

Maximum Conversion Rate VI 20 MHz
Overvoltage Recovery Time V 20 ns
Pipeline Delay (Latency) IV 1 Clock Cycle
Output Delay TA=+25 °C V 14 18 ns
Aperture Delay Time T
Aperture Jitter Time TA=+25 °C V 5 ps-RMS

Effective Number of Bits

=500 kHz 10.2 Bits

f

IN

f

=1.0 MHz 10.0 Bits

IN

=3.58 MHz 9.5 Bits

f

IN

, VCC=+5.0 V, VEE=-5.2 V, DVCC=+5.0 V, VIN=±2.0 V, VSB=-2.0 V, VST=+2.0 V, f

MAX

TEST TEST SPT7921

=1 MHz

CLK

=+25 °C, VIN=0 V I 100 300 kΩ

A

=1 MHz

CLK

=+25 °CV 1 ns

A

=20 MHz, 50% clock duty cycle,

CLK

Signal-To-Noise Ratio
(without Harmonics)
f

=500 kHz TA=+25 °C I 64 67 dB

IN

f

=1 MHz TA=+25 °C I 64 66 dB

IN

f

=3.58 MHz TA=+25 °C I 62 64 dB

IN

SPT

T

A=TMIN

T

A=TMIN

TA=T

MIN

to T

to T
to T

MAX

MAX

MAX

IV 58 61 dB

IV 58 60 dB
IV 58 60 dB

SPT7921

2 3/10/97

ELECTRICAL SPECIFICATIONS

TA=T

MIN

to T

, VCC=+5.0 V, VEE=-5.2 V, DVCC=+5.0 V, VIN=±2.0 V, VSB=-2.0 V, VST=+2.0 V, f

MAX

=20 MHz, 50% clock duty cycle,

CLK

unless otherwise specified.

TEST TEST SPT7921

PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS

Dynamic Performance

Harmonic Distortion

=500 kHz TA=+25 °C I 63 66 dB

f

IN

=1.0 MHz TA=+25 °C I 63 65 dB

f

IN

f

=3.58 MHz TA=+25 °C I 59 61 dB

IN

T

A=TMIN

T

A=TMIN

T

A=TMIN

to T
to T
to T

MAX

MAX

MAX

IV 59 62 dB
IV 59 61 dB
IV 57 59 dB

Signal-to-Noise and Distortion

=500 kHz TA=+25 °C I 60 63 dB

f

IN

f

=1.0 MHz TA=+25 °C I 60 62 dB

IN

f

=3.58 MHz TA=+25 °C I 57 59 dB

IN

Spurious Free Dynamic Range
Differential Phase
Differential Gain

2

2

Digital Inputs f

Logic 1 Voltage T
Logic 0 Voltage T
Maximum Input Current Low T
Maximum Input Current High T

T
T
T

1

TA=+25 °C V 74 dB

A=TMIN

A=TMIN

A=TMIN

to T
to T
to T

MAX

MAX

MAX

IV 55 58 dB
IV 55 57 dB
IV 54 56 dB

TA=+25 °C V 0.2 Degree
TA=+25 °C V 0.7 %

=1 MHz

CLK

=+25 °C I 2.4 4.5 V

A

=+25 °C I 0.8 V

A

=+25 °C I 0 +5 +20 µA

A

=+25 °C I 0 +5 +20 µA

A

Pulse Width Low (CLK) IV 20 ns
Pulse Width High (CLK) IV 20 300 ns

Digital Outputs f

Logic 1 Voltage T

=1 MHz

CLK

=+25 °C I 2.4 V

A

Logic 0 Voltage TA=+25 °C I 0.6 V

Power Supply Requirements

Voltages V

Currents I

DV

-V

CC

DI

-I

CC

EE

EE

CC

CC

TA=+25 °C I 135 150 mA
TA=+25 °C I 40 55 mA
TA=+25 °C I 45 70 mA

IV 4.75 5.0 5.25 V
IV 4.75 5.0 5.25 V
IV -4.95 -5.2 -5.45 V

Power Dissipation VI 1.1 1.3 W
Power Supply Rejection 5 V ±0.25 V, -5.2 ±0.25 V V 1.0 LSB

Typical thermal impedances (unsoldered, in free air):

32L sidebrazed DIP:

θ

= +50 °C/W

ja

44L cerquad:

θ

= +78 °C/W

ja

at 1 M/s airflow = +58 °C/W

θ

ja

θ

= +3.3 °C/W

jc

1

fIN = 1 MHz.

2

fIN = 3.58 and 4.35 MHz.

SPT

SPT7921

3 3/10/97

TEST LEVEL CODES

TEST LEVEL

TEST PROCEDURE

All electrical characteristics are subject to the
following conditions:

All parameters having min/max specifications
are guaranteed. The Test Level column indi­cates the specific device testing actually per­formed during production and Quality Assur­ance inspection. Any blank section in the data
column indicates that the specification is not
tested at the specified condition.

Figure 1A: Timing Diagram

N

tt

pwH pwL

II

III
IV

V

VI

I

100% production tested at the specified temperature.
100% production tested at TA = +25 °C, and sample

tested at the specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design

and characterization data.
Parameter is a typical value for information purposes

only.
100% production tested at TA = +25 °C. Parameter is

guaranteed over specified temperature range.

N+1

N+2

CLK

t

d

OUTPUT
DATA

N-2 N-1

DATA VALID

N

DATA VALID

N+1

Figure 1B: Single Event Clock

CLK

t

d

OUTPUT
DATA

DATA VALID

Table I - Timing Parameters

PARAMETERS DESCRIPTION MIN TYP MAX UNITS

t

d

t

pwH

CLK to Data Valid Prop Delay - 14 18 ns
CLK High Pulse Width 20 - 300 ns

t

pwL

SPT

CLK Low Pulse Width 20 - - ns

SPT7921

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