SPT SPT7760AIK, SPT7760BIK Datasheet

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SPT

SIGNAL PROCESSING TECHNOLOGIES

SPT7760

8-BIT, 1 GSPS FLASH A/D CONVERTER

FEATURES

• 1:2 Demuxed ECL Compatible Outputs

• Wide Input Bandwidth - 900 MHz

• Low Input Capacitance - 15 pF (MQUAD)

• Metastable Errors Reduced to 1 LSB

• Monolithic for Low Cost

• Gray Code Output

GENERAL DESCRIPTION

The SPT7760 is a full parallel (flash) analog-to-digital con­verter capable of digitizing full scale (0 to -2 V) inputs into
eight-bit digital words at an update rate of 1 GSPS. The ECL­compatible outputs are demultiplexed into two separate
output banks, each with differential data ready outputs to
ease the task of data capture. The SPT7760's wide input
bandwidth and low capacitance eliminate the need for exter­nal track-and-hold amplifiers for most applications. A propri-

CLKCLK

BLOCK DIAGRAM

CLOCK

Analog

V

RT

Input

Preamp Comparator

256

BUFFER

APPLICATIONS

• Digital Oscilloscopes

• Transient Capture

• Radar, EW, ECM

• Direct RF Down-Conversion

etary decoding scheme reduces metastable errors to the
1 LSB level. The SPT7760 operates from a single -5.2 V
supply, with a nominal power dissipation of 5.5 W.

The SPT7760 is available in an 80L surface-mount MQUAD
package over the industrial temperature range. Contact the
factory for availability of die and /883 versions.

DEMUX
CLOCK

BUFFER

255

152

151

128

V

RM

V

RB

127

64

63

2

1

D8

(OVR)

D7

(MSB)

D6

D5

D4

256 TO 8 BIT DECODER

D3

WITH METASTABLE ERROR CORRECTION

D2

D1

DO

(LSB)

D8B
D7B

•

•

D5B

•

•

D2B
D1B
D0B
D8
D7

•

•

•

1:2 DEMULTIPLEXER

D5

•

•

•

D2
D1
D0

DRB (DATA READY)
DRB (DATA READY)
D8B (OVR)
D7B (MSB)
D6B
D5B
D4B
D3B
D2B
D1B
D0B (LSB)
DRA (DATA READY)
DRA (DATA READY)
D8A (OVR)
D7A (MSB)
D6A
D5A

ECL OUTPUT BUFFERS AND LATCHES

D4A
D3A
D2A
D1A
D0A (LSB)

Signal Processing Technologies, Inc.

Phone: [phone] FAX: [phone] Website: http://www.spt.com E-Mail: [e-mail]

4755 Forge Road, Colorado Springs, Colorado 80907, USA

ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C

Supply Voltages
Negative Supply Voltage (V

Ground Voltage Differential............................. .-0.5 to +0.5 V

TO GND) ......... .-7.0 to +0.5 V

EE

Output

Digital Output Current ........................................ 0 to -28 mA

Temperature

Input Voltage

Analog Input Voltage........................................ +0.5 V to V

Reference Input Voltage .................................. +0.5 V to V

Digital Input Voltage ......................................... +0.5 V to V

Reference Current VRT to VRB.................................... 35 mA

EE
EE
EE

Operating Temperature, ambient .......................-25 to +85 °C

case ...................................+125 °C

junction............................... +150 °C

Lead Temperature, (soldering 10 seconds). ............. +300 °C

Storage Temperature......................................-65 to +150 °C

Notes: 1. Operation at any Absolute Maximum Rating is not implied. See Electrical Specifications for proper nominal applied condi-

tions in typical applications.

ELECTRICAL SPECIFICATIONS

TJ = TC = TA = +25 °C , VEE=-5.2 V, VRB=-2.00 V, VRM=-1.0 V, VRT=0.00 V, f

TEST TEST SPT7760A SPT7760B

PARAMETERS CONDITIONS LEVEL MIN TYP MAX MIN TYP MAX UNITS

Resolution 8 8 Bits
DC Accuracy (+25 °C)

Integral Nonlinearity f
Differential Nonlinearity f

= 100 kHz I -1.0 +1.0 -1.5 +1.5 LSB

CLK

= 100 kHz I -0.85 +0.95 -0.95 +1.5 LSB

CLK

No Missing Codes Guaranteed Guaranteed

Analog Input

Input Voltage Range I V
Input Bias Current V

=0 V I .75 2.0 .75 2.0 mA

IN

Input Resistance V 15 15 kΩ
Input Capacitance Over Full Input Range V 15 15 pF
Input Bandwidth

Small Signal V 900 900 MHz

Large Signal V 500 500 MHz
Offset Error V
Offset Error V

RT
RB

Input Slew Rate V 5 5 V/ns
Clock Synchronous

Input Currents V 2 2 µA

Reference Input

Ladder Resistance I 60 80 60 80 Ω
Reference Bandwidth V 30 30 MHz

Timing Characteristics

Maximum Sample Rate I 1 1 GHz
Aperture Jitter V 2 2 ps
Acquisition Time V 250 250 ps
CLK to Data Ready Delay IV 0.9 1.4 1.9 0.9 1.4 1.9 ns
Clock to Data Delay IV 1.25 1.75 2.25 1.25 1.75 2.25 ns

Dynamic Performance

Signal-To-Noise Ratio
(without Harmonics)

f

= 50 MHz I 45 43 dB

IN

f

= 250 MHz I 43 41 dB

IN

Total Harmonic Distortion

f

= 50 MHz I -44 -42 dBc

IN

f

= 250 MHz I -36 -34 dBc

IN

=1 GHz, Duty Cycle=50%, unless otherwise specified.

clk

RB

V

RT

V

RB

VRTV

I -30 +30 -30 +30 mV
I -30 +30 -30 +30 mV

SPT

SPT7760

2 3/10/97

ELECTRICAL SPECIFICATIONS

TJ = TC = TA = +25 °C , VEE=-5.2 V, VRB=-2.00 V, VRM=-1.0 V, VRT=0.00 V, f

TEST TEST SPT7760A SPT7760B

PARAMETERS CONDITIONS LEVEL MIN TYP MAX MIN TYP MAX UNITS

Dynamic Performance

Signal-to-Noise and Distortion

f

= 50 MHz I 42 40 dB

IN

f

= 250 MHz I 35 33 dB

IN

Spurious Free Dynamic Range

f

= 50 MHz I 47 43 dB

IN

f

= 250 MHz I 39 35 dB

IN

Digital Inputs

Input High Voltage

(CLK, NCLK) I -1.1 -0.7 -1.1 -0.7 V
Input Low Voltage

(CLK, NCLK) I -1.8 -1.5 -1.8 -1.5 V
Clock Pulse Width High (t
Clock Pulse Width Low (t

Digital Outputs

Logic "1" Voltage I -1.1 -0.9 -1.1 -0.9 V
Logic "0" Voltage I -1.8 -1.5 -1.8 -1.5 V
Rise Time 20% to 80% V 450 450 ps
Fall Time 20% to 80% V 450 450 ps

Power Supply Requirements

Voltage V
Current I
Power Dissipation I 5.5 6.25 5.5 6.25 W

EE

EE

) I 0.5 0.4 0.5 0.4 ns

PWH

) I 0.5 0.4 0.5 0.4 ns

PWL

=1 GHz, Duty Cycle=50%, unless otherwise specified.

clk

IV -4.95 -5.2 -5.45 -4.95 -5.2 -5.45 V

I 1.05 1.2 1.05 1.2 A

Typical Thermal Impedance: θJC = +4 °C/W.

TEST LEVEL CODES

All electrical characteristics are subject to the
following conditions:

All parameters having min/max specifications
are guaranteed. The Test Level column indi­cates the specific device testing actually per­formed during production and Quality Assur­ance inspection. Any blank section in the data
column indicates that the specification is not
tested at the specified condition.

Unless otherwise noted, all tests are pulsed
tests; therefore, TJ = TC = TA.

TEST LEVEL

I

II

III
IV

V

VI

TEST PROCEDURE

100% production tested at the specified temperature.
100% production tested at TA=25 °C, and sample

tested at the specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design

and characterization data.
Parameter is a typical value for information purposes

only.
100% production tested at TA = 25 °C. Parameter is

guaranteed over specified temperature range.

SPT

SPT7760

3 3/10/97