SPT SPT7721SIT Datasheet

SPT7721

8-BIT, 250 MSPS ADC WITH DEMUXED OUTPUTS

TECHNICAL DATA

FEBRUARY 20, 2001

FEATURES

• High conversion rate: 250 MSPS

• Single +5 V pow er supply

• V ery low pow er dissipation: 310 mW

• 500 MHz full power bandwidth

• Po wer-down mode

• +3.0 V/+5.0 V (LVCMOS) digital output logic
compatibility

• Demuxed output ports

GENERAL DESCRIPTION

The SPT7721 is a high-speed, 8-bit analog-to-digital con­verter implemented in an advanced BiCMOS process. An
advanced folding and interpolating architecture provides
both a high conversion rate and v ery low power dissipation
of only 310 mW. The analog inputs can be operated in
either single-ended or differential input mode. A 2.5 V com­mon mode reference is provided on chip for the single­ended input mode to minimize external components.

BLOCK DIAGRAM

AGND DGND

APPLICATIONS

• RGB video processing

• Digital communications

• High-speed instrumentation

• Digital sampling oscilloscopes (DSO)

• Projection display systems

The SPT7721 digital outputs are demuxed (double-wide)
with both dual-channel and single-channel selectable out­put modes. Demuxed mode supports either parallel
aligned or interleaved data output. The output logic is both
+3.0 V and +5.0 V compatible. The SPT7721 is av ailable in
a 44-lead TQFP surf ace mount package ov er the industrial
temperature range of –40 to +85 °C.

AV

CC

OV

DD

DA0DA

V

+

IN

8-Bit

7

250 MSPS

VIN

Common Mode

Voltage

Reference

+2.5 V

V

CM

PD CLK

ADC

CLK CLK

CLK

Data Output Latches

Data Output

Mode Control

22

Reset

DMODE

&

Reset

1,2

DB0DB

DCLK

OUT

DCLK

OUT

7

Signal Processing Technologies, Inc.

4755 Forge Road, Colorado Springs, Colorado 80907, USA

Phone: [phone] Fax: [phone] Web Site: http://www .spt.com e-mail: [e-mail]

ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C

Supply V oltages

AVCC...................................................................... +6 V

OVDD..................................................................... +6 V

Input V oltages

Analog Inputs ............................... –0.5 V to VCC +0.5 V

Digital Inputs ................................ –0.5 V to V

+0.5 V

CC

T emperatures

Operating Temperature........................... –40 to +85 °C

Storage Temperature ............................ –65 to +125 °C

Note: 1. Operation at any Absolute Maximum Rating is not implied.

See Electrical Specifications for proper nominal applied
conditions in typical applications.

ELECTRICAL SPECIFICATIONS

TA = T

PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS
Resolution 8 Bits
DC Performance

Analog Input

to T

, AV

MIN

MAX

= +5.0 V, ƒ

CC

= 250 MHz, unless otherwise specified.

CLK

TEST TEST SPT7721

Differential Linearity Error (DLE) +25 °C V –0.75/+1.25 LSB

–40 °C to +85 °C V –1.0/+2.0 LSB

Integral Linearity Error (ILE) +25 °C V ±2.0 LSB

–40 °C to +85 °C V ±3.0 LSB

No Missing Codes @250 MSPS VI Guaranteed

Input V oltage Range

(with respect to V

–) V ±512 mV

IN

Input Common Mode IV 2.3 2.5 2.7 V
Input Bias Current VI 5 µA
Input Resistance +25 °C V 50 kΩ
Input Capacitance +25 °C V 5 pF
Input Bandwidth +25 °C (–3 dB of FS) V 500 MHz
±FS Error VI ±2 %FS
Offset Error VI ±10 mV

P-P

Timing Characteristics

Conversion Rate VI 2 50 MSPS
Output Delay (t

) +25 °C IV 6 8 10 ns

pd1

Output Delay Tempco V 21 ps/°C
Aperture Delay Time (t

) V 0.5 ns

ap

Aperture Jitter Time V 2 ps rms
Pipeline Delay (Latency)

Single Channel Mode V 3.5 Clocks
Demuxed Interleaved Mode V 4.5 Clocks
Demuxed Parallel Mode

Channel B V 4.5 Clocks
Channel A V 5.5 Clocks

CLK to DCLK

Single Channel Mode (t
Dual Channel Mode (t

Delay Time

OUT

)V6ns

pd2

)V6ns

pd3

Dynamic Performance

Effective Number of Bits (ENOB)

= 70 MHz +25 °C VI 5.8 6.3 Bits

ƒ

IN

= 70 MHz –40 °C to +85 °C IV 5.4 5.9 Bits

ƒ

IN

Signal-to-Noise Ratio (SNR)

= 70 MHz +25 °C VI 42 43 dB

ƒ

IN

ƒIN = 70 MHz –40 °C to +85 °C IV 36 39 dB

SPT

SPT7721

2 2/20/01

ELECTRICAL SPECIFICATIONS

TA = T

MIN

to T

MAX

, AV

= +5.0 V, ƒ

CC

= 250 MHz, OVDD = 5 V, unless otherwise specified.

CLK

TEST TEST SPT7721

PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS
Dynamic Performance

Total Harmonic Distortion (THD)

= 70 MHz +25 °C VI –43 –40 dB

ƒ

IN

= 70 MHz –40 °C to +85 °C IV –41 –37 dB

ƒ

IN

Signal-to-Noise and Distortion (SINAD)

= 70 MHz +25 °C VI 37 39 dB

ƒ

IN

= 70 MHz –40 °C to +85 °C IV 35 37 dB

ƒ

IN

Power Supply Requirements

Voltage (Analog Supply) IV 4.75 5.0 5.25 V

AV

CC

OVDD Voltage (Digital Supply) IV 2.75 5.25 V

Current VI 62 70 mA

AV

CC

Power Dissipation with Inter nal Voltage Reference VI 3 10 3 50 mW
Power Supply Rejection Ratio V 35 mV/V

Common Mode Reference

Voltage VI 2.45 2.5 2.55 V
Voltage Tempco V 119 ppm/°C
Output Impedance V 1 kΩ
Current Capability V 50 µA
Power Supply Rejection Ratio V 34 mV/V

Clock and Reset Inputs (Differential and Single-Ended)

Differential Signal Amplitude V
Differential High Input Voltage V
Differential Low Input Voltage V

DIFF

IHD

ILD

Differential Common-Mode Input V
Single-Ended High Input Voltage V
Single-Ended Low Input Voltage V

CMD
IH

IL

VI 400 mV
IV 1.7 AV

CC

V
IV 0 AVCC –0.4 V
IV 1.5 V
IV 1.8 V
IV 0 1.2 V

P-P

High Current Level VID <2.5 V VI –100 2 0 +100 µA
Low Current Level V

ID

VI –100 20 +100 µA

Power Down and Mode Control Inputs (Single-Ended)

High Input Voltage IV 2.0 AV

CC

V

Low Input Voltage IV 0 1.0 V
Maximum Input Current Low VI –100 10 +100 µA
Maximum Input Current High <4.0 V VI –100 10 +100 µA

Digital Outputs

Logic "1" Voltage (IOH = –100 µA) VI OVDD – 0.2 V
Logic "0" Voltage (I

Data (10 pF load) V 3 ns

T

R/TF

= +100 µA) VI 0.2 V

OL

TR/TF DCLK = (10 pF load) V 1.5 ns

TEST LEVEL CODES

All electrical characteristics are subject to the
following conditions:

All parameters having min/max specifications
are guaranteed. The Test Level column indi­cates the specific device testing actually per­formed during production and Quality Assur­ance inspection. Any blank section in the data
column indicates that the specification is not
tested at the specified condition.

LEVEL TEST PROCEDURE

I 100% production tested at the specified temperature.

II 100% production tested at TA = +25 °C, and sample tested at the

specified temperatures.
III QA sample tested only at the specified temperatures.
IV Parameter is guaranteed (but not tested) by design and characteri-

zation data.

V Parameter is a typical value for information purposes only.

VI 100% production tested at TA = +25 °C. Parameter is guaranteed

over specified temperature range.

SPT

3 2/20/01

SPT7721

TYPICAL PERFORMANCE CHARACTERISTICS

SFDR, THD, SNR vs Temperature

60

55

50

45

40

35

SFDR, THD, SNR (dB)

30

40

20

0

Temperature (°C)

AV

Current vs Temperature

CC

75

70

65

(mA)

60

CC

AV

55

20

40

60 80

SFDR

THD

SNR

100

SFDR, SNR, THD, SINAD vs Sample Rate

60

55

50

45

40

35

SFDR, SNR, THD, SINAD (dB)

30

0

50

100

150

200

Sample Rate (MSPS)

AVCC Current Power Do wn vs Temperature

3.0

2.8

2.6

(mA)

CC

2.4

AV

SFDR

SNR

THD

SINAD

250 300

50

45

6.0

4.0

2.0

0.0

mV

2.0

4.0

6.0

2.2

40

20

0

20

40

Temperature (°C)

60 80

100

2.0
40

20

0

20

40

Temperature (°C)

V olta ge Offset Error vs Temperature Percent Gain Error vs Temperature

1.06

1.05

1.04

1.03

%

1.02

1.01

40

20

0

20

40

Temperature (°C)

60 80

100

1.00
40

20

0

20

40

Temperature (°C)

60 80

60 80

100

100

SPT

SPT7721

4 2/20/01