Sony Wistron Tucana MBX-238, VPCF136FM Schematics

5

TUCANA Block Diagram

D D

Clock Generator

ICS9LVS3197BKLFT

Thermal Sensor

GMT G787

3

37

DDRIII
800

DDRIII
800

Slot 0

Slot 1

DDRIII Channel A

21

DDRIII Channel B

22

4

Intel CPU

SFF

4,5,..,10,11

FDIx8

DMIx4

3

PROJECT CODE : 91.4KK01.001
PCB P/N : 48.4KK01.0SB
REVISION : S0201-SB

2

1

SYSTEM DC/DC

RT8223

INPUTS

DCBATOUT

RT8209

OUTPUTS

5V_S5(6A)
3D3V_S5(5A)
5V_AUX_S5
3D3V_AUX_S5

47

49

INPUTS OUTPUTS

DCBATOUT 1D05V_S0(20A)

RT8209

48

INPUTS OUTPUTS

LVDS

Int MIC

C C

Line Out

Codec

Realtek
ALC269

AZALIA

31~33

MIC In
SPKR

1.5W

B B

HDD SATA

Flash ROM

4MB

0

26

SPI

39

INTEL

PCH

14 USB 2.0/1.1 ports

(10/100/1000Mb)ETHERNET

High Definition Audio

6 SATA ports
8 PCIE ports

ACPI 1.1
LPC I/F

PCI/PCI BRIDGE

12,13,...,19,20

USB

PCIe

9

CAMERA

0,1,4

USB Port x 3

12

Blue Tooth

2

Cardreader

Realtek RTS5186

8

Mini 1 Card
WLAN/ WIMAX

1

Giga LAN

3

Atheros AR8131M

GB

R

PCIe

LPC

LCD

CRT

HDMI

23

28

27

34

35

29

23

24

25

MS Pro Duo
/SD(SDHC)

TXFM

30 30

34

RJ45

DCBATOUT

RT9026

1D5V_S3(9.4A)

51

INPUTS OUTPUTS

5V_S5

CHARGER

DDR_VREF_S3

1.2A

BQ24751

52

OUTPUTSINPUTS

DCBATOUT

CHG_PWR

18V 6.0A

CPU DC/DC

ADP3211

INPUTS

DCBATOUT

OUTPUTS
VCC_CORE

GFX Core

ADP3211

INPUTS

DCBATOUT VCC_GFXCORE

OUTPUTS

46

27A

50

11A

PCB STACKUP

A A

TOP
VCC

S
S

GND

BOTTOM

L1
L2
L3
L4
L5
L6

5

4

KBC

Winbond

NPCE781L

Touch
Pad

38

INT.
KB

40 38

SPI

Flash ROM

128KB

39

LPC

DEBUG
CONN.

3

39

SMbus ADDRESS

DIMM 1
DIMM 2
CLK GEN

Thermal Sensor

CHARGER
BATTERY

1010 000x b
1010 001x b
1110 001x b
0101 110x b
0001 001x b
0001 110x b

2

DVT 1ST

DVT 1ST

DVT 1ST

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

1

1 56Wednesday, July 07, 2010

1 56Wednesday, July 07, 2010

1 56Wednesday, July 07, 2010

SB

SB

SB

A

B

C

D

E

PCH
Strapping

Name Schematics Notes

SPKR

4 4

INIT3_3V#
GNT3#/

GPIO55

INTVRMEN

GNT0#,
GNT1#

GNT2#/
GPIO53

3 3

GPIO33

SPI_MOSI

NV_ALE

NC_CLE
HAD_DOCK_EN#

/GPIO[33]
HDA_SDO

HDA_SYNC
GPIO15
GPIO8
GPIO27

2 2

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with 8.2-kΩ

No Reboot Mode with TCO Disabled:

- 10-kΩ weak pull-up resistor.
Weak internal pull-down. Do not pull high.

Internal pull-up.

Default Mode:

(Connect to ground with 4.7-kΩ weak

Low (0) = Top Block Swap Mode

pull-down resistor).

High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled

Left both GNT0# and GNT1# floating. No pull up

Default (SPI):

required.
Connect GNT1# to ground with 1-kΩ pull-down

Boot from PCI:

resistor. Leave GNT0# Floating.
Connect both GNT0# and GNT1# to ground with 1-kΩ

Boot from LPC:

pull-down resistor.

Default - Internal pull-up.

= Configures DMI for ESI compatible operation (for servers

Low (0)

only. Not for mobile/desktops).

Do not pull low.

Default:

Connect to ground with 1-kΩ

Disable ME in Manufacturing Mode:

pull-down resistor.

Connect to Vcc3_3 with 8.2-kΩ weak pull-up resistor.

Enable iTPM:

Left floating, no pull-down required.

Disable iTPM:

Connect to Vcc3_3 with 8.2-kΩ weak pull-up

Enable Danbury:

resistor.
Connect to ground with 4.7-kΩ weak pull-down

Disable Danbury:

resistor.
Weak internal pull-up. Do not pull low.

Flash Descriptor Security will be overridden.

Low (0):

Flash Descriptor Security will be in effect.

High (1) :

Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-up. Do not pull low.

Default = Do not connect (floating)

High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.

Processor Strapping

Pin Name

CFG[4]

CFG[3]

CFG[0]

CFG[7]

Strap Description Configuration (Default value for each bit is

DisplayPort
Presence

PCI-Express Static
Lane Reversal

PCI-Express
Configuration
Select

Reserved ­Temporarily used
for early
Clarksfield
samples.

1 unless specified otherwise)

Disabled - No Physical Display Port attached to

1:Embedded

Embedded DisplayPort.
Enabled - An external Display Port device is

0:

connected to the Embedded Display Port.
Normal Operation.

1:

Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Single PCI-Express Graphics

1:

Bifurcation enabled

0:

-

Clarksfield (only for early samples pre-ES1)

Connect to GND with 3.01K Ohm/5% resistor
Only temporary for early CFD samples

Note:

(rPGA/BGA) [For details please refer to the WW33
MoW and sighting report].
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality.

Default
Value

1

1

1

0

Resistor

100R2J-2-GP

-GP=RoHS Part

Before "R" is the Resistance
ex: 100R=100 ohm; 49K9R=49.9K ohm
80D6R=80.6 ohm

1 1

2=0402
3=0603
5=0805

J=5%
F=1%
D=0.5%

-PAD=no component just
layout pad connected

Serial #;
Some parts no this #

4D7U is the Capacitance
ex:4D7U =4.7UF; SC100P=100PF

10V is the Rated Voltage

Capacitor

SC4D7U10V5ZY-3GP

0=1210
2=0402
3=0603
5=0805
6=1206

12

C1

SC33P50V2JN-3GP

DY

-3GP is serial #
and RoHS Part

Tolerance
ZY=Y5V
MX=X5R
KX=X5R
JN=NPO

DY means de-populate

DVT 1ST

DVT 1ST

DVT 1ST

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

Reference

Reference

Reference

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

2 56Wednesday, July 07, 2010

2 56Wednesday, July 07, 2010

2 56Wednesday, July 07, 2010

SB

SB

SB

1D5V_S0_CLKGEN

5

4

3

2

1

12

C1

SC10U6D3V3MX-GPC1SC10U6D3V3MX-GP

D D

1D05V_S0

12

R3

R3
0R3J-0-U-GP

0R3J-0-U-GP

C C

1D05V_S0

R7

R7
2K2R2J-2-GP

2K2R2J-2-GP

DY

DY

1 2

B B

R8

R8
2K2R2J-2-GP

2K2R2J-2-GP

1 2

12

12

C2

SC1U10V2KX-1GPC2SC1U10V2KX-1GP

3D3V_S0

C10

C10

14.318 MHz

FSC

12

C3

C4

SCD1U16V2ZY-2GPC3SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GPC4SCD1U16V2ZY-2GP

1 2

R2

R2
0R3J-0-U-GP

0R3J-0-U-GP

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C11

C11

12

12

C5

SCD1U16V2ZY-2GPC5SCD1U16V2ZY-2GP

12

12

C12

C12

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

CLK_ICH1413

FSC 0 1

SPEED

133MHz

(Default)

1D5V_S0 1D5V_S0_CLKGEN

1 2

R1

R1
0R3J-0-U-GP

0R3J-0-U-GP

3D3V_CK505

12

C7

C6

SC10U6D3V3MX-GPC7SC10U6D3V3MX-GP

SC1U10V2KX-1GPC6SC1U10V2KX-1GP

1D05V_CK505_IO

RN1

RN1

PCH_SMBCLK13,21,22

PCH_SMBDATA13,21,22

2 3
1

12

C13

C13
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

DY

DY

SRN0J-10-GP-U

SRN0J-10-GP-U

100MHz

4

R6

R6

33R2J-2-GP

33R2J-2-GP

PCH_SMBCLK_+

PCH_SMBDATA_+

GEN_XTAL_IN
GEN_XTAL_OUT

CLK_EN
FSC

12

U1

U1

1

VDD96_1_5

5

VDD27_3_3

15

VDDPCIEX_IO_LV

17

VDDPCIEX_1_5

18

VDDCPU_IO_LV

24

VDDCPU_1_5

29

VDDREF_3_3

6

27FIX

7

27SS

32

SCLK_3_3

31

SDATA_3_3

28

X1

27

X2

25

VTTPWRGD/PD#_3_3

30

REF/FSLC

16

NC#16

9LVS3197BKLFT-GP

9LVS3197BKLFT-GP

71.93197.B03

71.93197.B03

SATAT_LR

SATAC_LR

DOT96T_LR
DOT96C_LR

CPUT_LR0
CPUC_LR0
CPUT_LR1
CPUC_LR1

PCIEXT_LR
PCIEXC_LR

GND96
GND27

GNDSATA

GNDPCIEX

GNDCPU
GNDREF

GND

14.31818M HZ

CL=10pF±0.2pF

GEN_XTAL_IN

X1

X-14D31818M-50GP

X-14D31818M-50GP

10
11

3
4

23
22
20
19

13
14

2
8
9
12
21
26
33

CLK_SATA 13
CLK_SATA# 13

DREFCLK 13

DREFCLK# 13

CLK_CPU_BCLK 13

CLK_CPU_BCLK# 13

CLK_DMI 13
CLK_DMI# 13

100 MHz

96 MHz

133 MHz

SATA

PCH

CPU

DMI100 MHz

GEN_XTAL_OUT GEN_XTAL_OUT_1

R5

R5

10KR2J-3-GP

10KR2J-3-GP

CLK_EN

R4

R4

1 2

0R2J-2-GP

0R2J-2-GP

3D3V_S0

1 2

D

.

.
.

.

.

.

..

..

S

2nd = 82.30005.C51

2nd = 82.30005.C51

Q1

Q1
2N7002E-1-GP

2N7002E-1-GP

84.2N702.D31

84.2N702.D31

2ND = 84.2N702.E31

2ND = 84.2N702.E31

G

X1

82.30005.A51

82.30005.A51

VR_CLKEN# 46

C8

C8

SC12P50V2JN-3GP

SC12P50V2JN-3GP

12

C9

C9

SC12P50V2JN-3GP

SC12P50V2JN-3GP

12

12

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

ize Document Number Rev

Size Document Number Rev

Size Document Number Rev

S
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

Clock Generator

Clock Generator

Clock Generator

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

3 56Wednesday, July 07, 2010

3 56Wednesday, July 07, 2010

3 56Wednesday, July 07, 2010

1

SB

SB

SB

5

D D

DMI_TXN014
DMI_TXN114
DMI_TXN214
DMI_TXN314

DMI_TXP014
DMI_TXP114
DMI_TXP214
DMI_TXP314

DMI_RXN014
DMI_RXN114
DMI_RXN214
DMI_RXN314

DMI_RXP014
DMI_RXP114
DMI_RXP214
DMI_RXP314

C C

B B

FDI_TXN014
FDI_TXN114
FDI_TXN214
FDI_TXN314
FDI_TXN414
FDI_TXN514
FDI_TXN614
FDI_TXN714

FDI_TXP014
FDI_TXP114
FDI_TXP214
FDI_TXP314
FDI_TXP414
FDI_TXP514
FDI_TXP614
FDI_TXP714

FDI_FSYNC014
FDI_FSYNC114

FDI_INT14
FDI_LSYNC014

FDI_LSYNC114

H17
K15

F10
G17

M15
G13

N10

W10

AC7
AC9

AB5
AA1

AB2

J13

J11

M4

R7
U7

W8

N5
N2
R2
N9
R8
U6

F7
J8
K8
J4

F9
J6
K9
J2

L2
N7

P1

K1

4

CPU1A

CPU1A

DMI_RX#0
DMI_RX#1
DMI_RX#2
DMI_RX#3

DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3

DMI_TX#0
DMI_TX#1
DMI_TX#2
DMI_TX#3

DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3

FDI_TX#0
FDI_TX#1
FDI_TX#2
FDI_TX#3
FDI_TX#4
FDI_TX#5
FDI_TX#6
FDI_TX#7

FDI_TX0
FDI_TX1
FDI_TX2
FDI_TX3
FDI_TX4
FDI_TX5
FDI_TX6
FDI_TX7

FDI_FSYNC0
FDI_FSYNC1

FDI_INT
FDI_LSYNC0

FDI_LSYNC1

1 OF 10

1 OF 10

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

PEG_RX#0
PEG_RX#1

DMI

DMI

Intel(R) FDI

Intel(R) FDI

PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8

PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8

PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15

PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9

PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PEG_TX4

PEG_TX5

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15

B12
A13
D12
B11

G40
G38
H34
P34
G28
H25
H24
D29
B26
D26
B23
D22
A20
D19
A17
B14

F40
J38
G34
M34
J28
G25
K24
B28
A27
B25
A24
B21
B19
B18
B16
D15

N40
L38
M32
D40
A38
G32
B33
B35
L30
A31
B32
L28
N26
M24
G21
J20

L40
N38
N32
B39
B37
H32
A34
D36
J30
B30
D33
N28
M25
N24
F21
L20

PEG_IRCOMP_R

EXP_RBIAS

3

1 2

1 2

R9

R9

49D9R2F-GP

49D9R2F-GP

R10

R10
750R2F-GP

750R2F-GP

2

1

AUBURNDALE-1-GP-U3-NF

AUBURNDALE-1-GP-U3-NF

A A

5

4

3

2

DVT 1ST

DVT 1ST

DVT 1ST

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU SFF 1 of 8(DMI/FDI/PEG)

CPU SFF 1 of 8(DMI/FDI/PEG)

CPU SFF 1 of 8(DMI/FDI/PEG)

ize Document Number Rev

Size Document Number Rev

Size Document Number Rev

S
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

1

4 56Wednesday, July 07, 2010

4 56Wednesday, July 07, 2010

4 56Wednesday, July 07, 2010

SB

SB

SB

5

1D05V_S0

R13

1 2

D D

1 2

R13
49D9R2F-GP

49D9R2F-GP
R15

R15
68R2-GP

68R2-GP

H_CATERR#
PROCHOT#

1 2
1 2
1 2
1 2

DVT 2010702

Q61

Q61

. .

. .

EC_PROCHOT38

12

R128

R128

100KR2J-1-GP

100KR2J-1-GP

C C

PLT_RST#16,29,34,35,38,39,44

G

...

...

S

2N7002E-1-GP

2N7002E-1-GP

84.2N702.D31

84.2N702.D31

2ND = 84.2N702.E31

2ND = 84.2N702.E31

PM_DRAM_PWRGD14

R22

R22

1 2

1K5R2F-2-GP

1K5R2F-2-GP

EC_PROCHOT#

D

PM_THRMTRIP-A#17,44

12

4

R11

R11
20R2F-GP

20R2F-GP
R12

R12
20R2F-GP

20R2F-GP
R14

R14
49D9R2F-GP

49D9R2F-GP
R16

R16
49D9R2F-GP

49D9R2F-GP

H_PECI17

1 2

R17 0R2J-2-GPR17 0R2J-2-GP

H_PM_SYNC14

H_PWRGD17

From PCH

H_VTTPW RGD49

R23

R23
750R2F-GP

750R2F-GP

H_COMP3
H_COMP2
H_COMP1
H_COMP0

H_CATERR#

PROCHOT#

PLT_RST#_R

CPU1B

CPU1B

AD71

COMP3

AC70

COMP2

AD69

COMP1

AE66

COMP0

M71

PROC_DETECT

N61

CATERR#

N19

PECI

N67

PROCHOT#

N17

THERMTRIP#

N70

RESET_OBS#

M17

PM_SYNC

AM7

VCCPWRGOOD_1

Y67

VCCPWRGOOD_0

AM5

SM_DRAMPWROK

H15

VTTPWRGOOD

Y70

TAPPWRGOOD

G3

RSTIN#

AUBURNDALE-1-GP-U3-NF

AUBURNDALE-1-GP-U3-NF

3

2 OF 10

2 OF 10

Misc

Misc

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

Clocks

Clocks

Thermal

Thermal

DDR3

DDR3

Power Management

Power Management

SM_DRAMRST#

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

PM_EXT_TS#0
PM_EXT_TS#1

Misc

Misc

JTAG & MBP

JTAG & MBP

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

PRDY#
PREQ#

TCK
TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7

AK7
AK8

K71
J70

L21
J21

Y2
W4

BJ12
BV33

BP39
BV40

AV66
AV64

U71
U69

T67
N65
P69

T69

TDI

T71
P71
T70

W71

J69
J67
J62
K65
K62
J64
K69
M69

BCLK_CPU_P 17
BCLK_CPU_N 17

CLK_EXP_P_R 13
CLK_EXP_N_R 13

DPLL_REF_SSCLK
DPLL_REF_SSCLK#

SM_DRAMRST# 17

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

XDP_TRST#

XDP_TDO
XDP_TDI_TDO_M
XDP_DBRESET#

RN4

RN4

1
2 3

SRN51J-GP

SRN51J-GP

2

4

RN3

RN3
SRN10KJ-5-GP

SRN10KJ-5-GP

1
2 3

1D05V_S0

4

1

RN2

DPLL_REF_SSCLK
DPLL_REF_SSCLK#

If supports integrated graphics but without
Embedded DisplayPort(eDP),
these pins can also be connected to GND directly.

1D05V_S0

PM_EXTTS#0_R 21
PM_EXTTS#1_R 22

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

XDP_DBRESET#

RN2

1

4

2 3

SRN0J-10-GP-U

SRN0J-10-GP-U

R18 100R2F-L1-GP-UR18 100R2F-L1-GP-U

1 2

R19 24D9R2F-L-GPR19 24D9R2F-L-GP

1 2

R20 130R2F-1-GPR20 130R2F-1-GP

1 2

1 2

R21 1KR2J-1-GPR21 1KR2J-1-GP

3D3V_S0

B B

PM_DRAM_PWRGD PM_DRAM_PWRGD_1

1D5V_S0_DDR1D5V_S3

12

R25

R25
1K1R2F-GP

1K1R2F-GP

NON_S3

NON_S3

12

R27

R27
750R2F-GP

750R2F-GP

S3/ NON_S3

NON_S3: 3Kohm
S3: 750ohm

A A

5

S3/ NON_S3

12

R26

R26
1K1R2F-GP

1K1R2F-GP

DY

DY

R24

R24

1 2

1K5R2F-2-GP

1K5R2F-2-GP

S3

S3

3D3V_S5

U2

U2

1D5V_S0_PWRGD44,51

4

1

B

2

A

3

GND

74LVC1G08GW-1-GP

74LVC1G08GW-1-GP

73.01G08.L04

73.01G08.L04

2ND = 73.7SZ08.EAH

2ND = 73.7SZ08.EAH

3RD = 73.7SZ08.DAH

3RD = 73.7SZ08.DAH

S3

S3

VCC

5
4

Y

PM_DRAM_PWRGD_1PM_DRAM_PWRGD

DVT 1ST

DVT 1ST

DVT 1ST

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU SFF 2 of 8(CLK/Thermal)

CPU SFF 2 of 8(CLK/Thermal)

CPU SFF 2 of 8(CLK/Thermal)

ize Document Number Rev

Size Document Number Rev

Size Document Number Rev

S
A3

A3

A3
Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

1

SB

SB

5 56Wednesday, July 07, 2010

5 56Wednesday, July 07, 2010

5 56Wednesday, July 07, 2010

SB

5

CPU1C

CPU1C

4

3 OF 10

3 OF 10

3

CPU1D

CPU1D

2

4 OF 10

4 OF 10

1

BM34

SA_CK0

M_A_DQ[63..0]21

D D

C C

B B

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_BS_021
M_A_BS_121
M_A_BS_221

M_A_CAS#21
M_A_RAS#21
M_A_WE#21

AT8
AT6
BB5
BB9
AV7
AV6
BE6
BE8

BF11

BE11

BK5

BH13

BF9
BF6
BK7
BN8

BN11

BN9
BG17
BK15

BK9
BG15
BH17
BK17
BN20
BN17
BK25
BH25

BJ20
BH21
BG24
BG25

BJ40
BM43

BF47

BF48
BN40
BH43
BN44
BN47
BN48
BN51
BH53

BJ55
BH48

BJ48
BM53
BN55

BF55
BN57
BN65

BJ61

BF57

BJ57
BK64
BK61

BJ63

BF64
BB64
BB66

BJ66

BF65
AY64
BC70

BT38
BH38

BF21

BK43

BL38

BF38

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

SA_BS0
SA_BS1
SA_BS2

SA_CAS#
SA_RAS#
SA_WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CK#0
SA_CKE0

SA_CK1
SA_CK#1
SA_CKE1

SA_CS#0
SA_CS#1

SA_ODT0
SA_ODT1

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_MA0

SA_MA1

SA_MA2

SA_MA3

SA_MA4

SA_MA5

SA_MA6

SA_MA7

SA_MA8

SA_MA9

SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15

BP35
BF20

BK36
BH36
BK24

BH40
BJ47

BF43
BL47

BB10
BJ10
BM15
BN24
BG44
BG53
BN62
BH59

AY5
BJ7
BN13
BL21
BH44
BK51
BP58
BE62

AY7
BJ5
BL13
BN21
BK44
BH51
BM60
BE64

BT36
BP33
BV36
BG34
BG32
BN32
BK32
BJ30
BN30
BF28
BH34
BH30
BJ28
BF40
BN28
BN25

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS#0M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_CLK_DDR0 21
M_CLK_DDR#0 21
M_CKE0 21

M_CLK_DDR1 21
M_CLK_DDR#1 21
M_CKE1 21

M_CS0# 21
M_CS1# 21

M_ODT0 21
M_ODT1 21

M_A_DM[7..0] 21

M_A_DQS#[7..0] 21

M_A_DQS[7..0] 21

M_A_A[15..0] 21

M_B_DQ[63..0]22

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_BS_022
M_B_BS_122
M_B_BS_222

M_B_CAS#22
M_B_RAS#22
M_B_WE#22

BA2

AW2

BD1
BE4
AY1
BC2
BF2
BH2
BG4
BG1
BR6
BR8

BK2

BU9
BV10
BR10

BT12

BT15
BV15
BV12
BP12
BV17
BU16
BP15
BU19
BV22

BT22
BP19
BV19
BV20

BT20

BT48
BV48
BV50
BP49

BT47
BV52
BV54

BT54
BP53
BU53

BT59

BT57
BP56

BT55
BU60
BV59
BV61
BP60
BR66
BR64
BR62

BT61
BN68

BL69

BJ71

BF70
BG71
BC67
BK70
BK67
BD71
BD69

BV43
BV41
BV24

BU46

BT40

BT41

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11

BJ4

SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_BS0
SB_BS1
SB_BS2

SB_CAS#
SB_RAS#
SB_WE#

SB_CK0
SB_CK#0
SB_CKE0

SB_CK1
SB_CK#1
SB_CKE1

SB_CS#0
SB_CS#1

SB_ODT0
SB_ODT1

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_MA0

SB_MA1

SB_MA2

SB_MA3

SB_MA4

SB_MA5

SB_MA6

SB_MA7

SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15

BU33
BV34
BT26

BV38
BU39
BT24

BP46
BT43

BV45
BU49

BB4
BL4
BT13
BP22
BV47
BV57
BU65
BF67

BE2
BM3
BU12
BT19
BT52
BV55
BU63
BG69

BD4
BN4
BV13
BT17
BT50
BU56
BV62
BJ69

BT34
BP30
BV29
BU30
BV31
BT33
BT31
BP26
BV27
BT27
BU42
BU26
BT29
BT45
BV26
BU23

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8

M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_CLK_DDR2 22
M_CLK_DDR#2 22
M_CKE2 22

M_CLK_DDR3 22
M_CLK_DDR#3 22
M_CKE3 22

M_CS2# 22
M_CS3# 22

M_ODT2 22
M_ODT3 22

M_B_DM[7..0] 22

M_B_DQS#[7..0] 22

M_B_DQS[7..0] 22

M_B_A[15..0] 22

AUBURNDALE-1-GP-U3-NF

AUBURNDALE-1-GP-U3-NF

AUBURNDALE-1-GP-U3-NF

A A

5

4

3

AUBURNDALE-1-GP-U3-NF

2

DVT 1ST

DVT 1ST

DVT 1ST

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

CPU SFF 3 of 8(DDR)

CPU SFF 3 of 8(DDR)

CPU SFF 3 of 8(DDR)

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

1

6 56Wednesday, July 07, 2010

6 56Wednesday, July 07, 2010

6 56Wednesday, July 07, 2010

SB

SB

SB

5

4

3

2

1

6 OF 10

CPU1F

CPU1F

PSI#

C41

C41

F68

PSI#

A61

VID0

D61

VID1

D62

VID2

A62

VID3

B63

VID4

D64

VID5

D66

VID6

AN1

VTT_SELECT1

F66

PROC_DPRSLPVR

A41

ISENSE

F64

VCC_SENSE

F63

VSS_SENSE

N13

VTT_SENSE

R12

VSS_SENSE_VTT

W39

VCCPLL

W37

VCCPLL

U37

VCCPLL

R39

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C42

C42

VCCPLL

R37

VCCPLL

BB14

VDDQ_CK1

BB12

VDDQ_CK2

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

AUBURNDALE-1-GP-U3-NF

AUBURNDALE-1-GP-U3-NF

1.8V

1.8V

SENSE LINESCPU VIDS

SENSE LINESCPU VIDS

1.1V RAIL POWER

1.1V RAIL POWER

POWER

POWER

D D

C C

B B

CPU_Core_VID[6..0]46

VCC_SENSE46

VSS_SENSE46

CPU_Core_VID0
CPU_Core_VID1
CPU_Core_VID2
CPU_Core_VID3
CPU_Core_VID4
CPU_Core_VID5
CPU_Core_VID6

1D5V_S3

Please note that the VTT Rail
Values are Auburndale

PSI#46

PM_DPRSLPVR46

IMVP_IMON46

VTT_SENSE49

1D8V_S0

12

C40

C40

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

L1

L1

1 2

IND-1UH-2-GP

IND-1UH-2-GP

68.1R030.1D1

68.1R030.1D1

2ND = 68.1R020.10M

2ND = 68.1R020.10M

12

VDDQ_CK

VTT=1.05V; Clarksfield
VTT=1.1V

6 OF 10

VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0

AW14
AW12
AU60
AU59
AU12
AR60
AR59
AR12
AN60
AN59
AN35
AN33
AN17
AN15
AN14
AN12
AM10
AL60
AL59
AL17
AL15
AL14
AL12
AK35
AK33
AF39
AF37
AF35
AF33
AF32
AF30
AD39
BF60
BF59
BD60
BD59
BB60
BB59
AY60
AW60
AW35
AW33
AD37
AD35
AD33
AD32
AD30
W35
W33
W32
W30
W28
W26
W24
W23
U35
U33
U32
U30
U28
U26
U24
U23
R35
R33
R32
R30
R28
R26
R24
R23
AY10
AN9

1D05V_S0

C33

C33

12

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

1D05V_S0

C14

C14

C24

C24

C34

C34

12

12

C16

C16

C15

C15

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C25

C25

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C35

C35

C36

C36

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

12

C18

C18

C17

C17

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C26

C26

C27

C27

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C37

C37

C38

C38

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

12

C19

C19

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C28

C28

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C39

C39

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

C20

C20

C21

C21

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

C30

C30

C29

C29

12

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C23

C23

C22

C22

12

C31

C31

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C32

C32

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DVT 1ST

DVT 1ST

DVT 1ST

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

CPU SFF 4 of 8(POWER/VTT)

CPU SFF 4 of 8(POWER/VTT)

CPU SFF 4 of 8(POWER/VTT)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

7 56Wednesday, July 07, 2010

7 56Wednesday, July 07, 2010

7 56Wednesday, July 07, 2010

1

SB

SB

SB

5

VCC_GFXCORE

D D

C C

B B

12

C43

C43

12

C58

C58

12

12

C54

C54

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C47

C47

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C68

C68

12

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1D05V_S0

12

C55

C55

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C49

C49

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C69

C69

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C44

C44

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C48

C48

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C56

C56

C50

C50

4

CPU1G

CPU1G

AN32

VAXG

AN30

VAXG

VCAP2

C87

C87

AN28

VAXG

AN26

VAXG

AN24

VAXG

AN23

VAXG

AN21

VAXG

AN19

VAXG

AL32

VAXG

AL30

VAXG

AL28

VAXG

AL26

VAXG

AL24

VAXG

AL23

VAXG

AL21

VAXG

AL19

VAXG

AK14

VAXG

AK12

VAXG

AJ10

VAXG

AH14

VAXG

AH12

VAXG

AF28

VAXG

AF26

VAXG

AF24

VAXG

AF23

VAXG

AF21

VAXG

AF19

VAXG

AF17

VAXG

AF15

VAXG

AF14

VAXG

AD28

VAXG

AD26

VAXG

AD24

VAXG

AD23

VAXG

AD21

VAXG

AD19

VAXG

AD17

VAXG

W21

VTT1

W19

VTT1

U21

VTT1

U19

VTT1

U17

VTT1

U15

VTT1

U14

VTT1

U12

VTT1

R21

VTT1

R19

VTT1

R17

VTT1

R15

VTT1

AK62

VCAP2

AK60

VCAP2

AK59

VCAP2

AH60

VCAP2

AH59

VCAP2

AF60

VCAP2

AF59

VCAP2

AD60

VCAP2

AD59

VCAP2

AB60

VCAP2

AB59

VCAP2

AA60

VCAP2

AA59

VCAP2

W60

VCAP2

W59

VCAP2

U60

VCAP2

U59

VCAP2

R60

VCAP2

R59

VCAP2

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

AUBURNDALE-1-GP-U3-NF

AUBURNDALE-1-GP-U3-NF

12

C45

C45

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C51

C51

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C70

C70

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

C83

C83

12

12

C46

C46

C57

C57

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C71

C71

12

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C52

C52

C53

C53

SC4D7U6D3V2MX-GP

SC4D7U6D3V2MX-GP

SC4D7U6D3V2MX-GP

SC4D7U6D3V2MX-GP

12

12

C72

C72

C73

C73

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C84

C84

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C85

C85

12

C86

C86

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

3

GRAPHICS

GRAPHICS

PEG & DMI

PEG & DMI

POWER

POWER

7 OF 10

7 OF 10

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6

GFX_IMON

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VTT0_DDR
VTT0_DDR
VTT0_DDR
VTT0_DDR
VTT0_DDR
VTT0_DDR
VTT0_DDR
VTT0_DDR
VTT0_DDR
VTT0_DDR

VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1

AF12
AF10

AF71
AG67
AG70
AH71
AN71
AM67
AM70

AH69
AL71
AL69

BU40
BU35
BU28
BN38
BM25
BL30
BJ38
BH32
BH28
BG43
BF16
BF15
BD35
BD33
BD32
BD30
BD28
BD26
BD24
BD23
BD21
BD19
BD17
BD15
BB35
BB33
BB32
BB30
BB28
BB26
BB24
BB23
BB21
BB19
BB17
BB15

AW32
AW30
AW28
AW26
AW24
AW23
AW21
AW19
AW17
AW15

AD15
AD14
AD12
AB12
AA12
W17
W15
W14
W12

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VR_EN

GFX_DPRSLPVR

GRAPHICS VIDs

GRAPHICS VIDs

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

VCC_AXG_SENSE 50
VSS_AXG_SENSE 50

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6

GFX_VR_EN 50

GFX_DPRSLPVR

GFX_IMON 50

2

1

GFX_VID[6..0] 50

TP1 TPAD14-GPTP1 TPAD14-GP

12

12

C59

C59

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C74

C74

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C60

C60

1

1D5V_S3

NON_S3

DY

DY

12

C66

C66

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

NON_S3

R32

R32
0R3J-0-U-GP

0R3J-0-U-GP

1 2

1D5V_S0_DDR

12

C67

C67

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

S3

S3

PM_SLP_S3_CTL_D

D

.

.
.

.

.

.

. .

. .

G

NON_S3

NON_S3

R33

R33
0R3J-0-U-GP

0R3J-0-U-GP

1 2

12

TC1

TC1

ST330U2D5VBM-GP

ST330U2D5VBM-GP

DY

DY

R34

R34
220R2F-GP

220R2F-GP

S3

S3

Q2

Q2
2N7002E-1-GP

2N7002E-1-GP

S

84.2N702.D31

84.2N702.D31

2ND = 84.2N702.E31

2ND = 84.2N702.E31

NON_S3

NON_S3

R30

R30
0R3J-0-U-GP

0R3J-0-U-GP

1 2

12

12

C76

C76

12

C62

C62

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1D05V_S0

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C80

C80

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

C63

C63

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DY

DY

PM_SLP_S3_CTL14,21,44,51

12

C81

C81

12

12

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C61

C61

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C75

C75

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C79

C79

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

C64

C64

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

1D05V_S0

C82

C82

12

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

NON_S3

NON_S3

R31

R31
0R3J-0-U-GP

0R3J-0-U-GP

1 2

12

C65

C65

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

A A

Do not dummy these CAPs

5

4

3

2

DVT 1ST

DVT 1ST

DVT 1ST

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU SFF 5 of 8(PWR/DDR/GFX/)

CPU SFF 5 of 8(PWR/DDR/GFX/)

CPU SFF 5 of 8(PWR/DDR/GFX/)

ize Document Number Rev

Size Document Number Rev

Size Document Number Rev

S
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

1

8 56Wednesday, July 07, 2010

8 56Wednesday, July 07, 2010

8 56Wednesday, July 07, 2010

SB

SB

SB

5

VCAP0

12

12

C99

C99

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

D D

12

12

C110

C110

C109

C109

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C100

C100

C113

C113

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C101

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C101

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C118

C118

C111

C111

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

Processor package decoupling ­DO NOT connect to any power rail

C C

12

C135

C135

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C141

C141

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

B B

C137

C137

C136

C136

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C143

C143

C142

C142

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

12

12

C138

C138

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C144

C144

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C139

C139

C140

C140

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C146

C146

C145

C145

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VCAP1

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

4

CPU1H

CPU1H

BD55

VCAP0

BD51

VCAP0

BD48

VCAP0

BB55

VCAP0

BB51

VCAP0

BB48

VCAP0

AY57

VCAP0

AY53

VCAP0

AY50

VCAP0

AW57

VCAP0

AW53

VCAP0

AW50

VCAP0

AU55

VCAP0

AU51

VCAP0

AU48

VCAP0

AR55

VCAP0

AR51

VCAP0

AR48

VCAP0

AN57

VCAP0

AN53

VCAP0

AN50

VCAP0

AL57

VCAP0

AL53

VCAP0

AL50

VCAP0

AK57

VCAP0

AK53

VCAP0

AK50

VCAP0

BD44

VCAP1

BD41

VCAP1

BD37

VCAP1

BB44

VCAP1

BB41

VCAP1

BB37

VCAP1

AY46

VCAP1

AY42

VCAP1

AY39

VCAP1

AW46

VCAP1

AW42

VCAP1

AW39

VCAP1

AU44

VCAP1

AU41

VCAP1

AU37

VCAP1

AR44

VCAP1

AR41

VCAP1

AR37

VCAP1

AN46

VCAP1

AN42

VCAP1

AN39

VCAP1

AL46

VCAP1

AL42

VCAP1

AL39

VCAP1

AK46

VCAP1

AK42

VCAP1

AK39

VCAP1

AUBURNDALE-1-GP-U3-NF

AUBURNDALE-1-GP-U3-NF

POWER

POWER

CPU CORE SUPPLY

CPU CORE SUPPLY

8 OF 10

8 OF 10

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

AF57
AF55
AF53
AF51
AF50
AF48
AF46
AF44
AF42
AF41
AD55
AD51
AD48
AD44
AD41
AB55
AB51
AB48
AB44
AB41
AA55
AA51
AA48
AA44
AA41
W55
W51
W48
W44
W41
U55
U51
U48
U44
U41
R55
R51
R48
R44
R41
P60
N55
N51
N48
N44
N42
M60
M51
M44
L55
K60
K51
K44
J55
H60
H51
H44
G60
G55
G51
G44
F55
E60
E57
E53
E50
E46
E42
D59
D57
D55
D54
D52
D50
D48
D47
D45
D43
B60
B56
B53
B49
B46
B42
A57
A54
A50
A47
A43

3

VCC_CORE

2

12

12

C88

C88

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C102

C102

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C119

C119

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C90

C90

C89

C89

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C103

C103

C104

C104

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C120

C120

C121

C121

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

12

12

C91

C91

C92

C92

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C106

C106

C105

C105

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C122

C122

C123

C123

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

12

C93

C93

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C114

C114

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C124

C124

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

C94

C94

C95

C95

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C125

C125

C126

C126

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

12

C112

C112

C96

C96

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C115

C115

C107

C107

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C127

C127

C128

C128

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

12

C98

C98

C97

C97

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C117

C117

C116

C116

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C130

C130

C129

C129

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

1

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C108

C108

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C131

C131

C132

C132

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C134

C134

C133

C133

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

A A

5

4

3

2

DVT 1ST

DVT 1ST

DVT 1ST

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU SFF 6 of 8(CPUCORE)

CPU SFF 6 of 8(CPUCORE)

CPU SFF 6 of 8(CPUCORE)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

1

9 56Wednesday, July 07, 2010

9 56Wednesday, July 07, 2010

9 56Wednesday, July 07, 2010

SB

SB

SB

5

CPU1E

CPU1E

5 OF 10

5 OF 10

RSVD#W66
RSVD#W64

4

W66
W64

3

2

1

D D

CFG0

CFG3
CFG4

C C

B B

A A

AL4

CFG0

AM2

CFG1

AK1

CFG2

AK2

CFG3

AK4

CFG4

AJ2

CFG5

AT2

CFG6

AG7

CFG7

AF4

CFG8

AG2

CFG9

AH1

CFG10

AC2

CFG11

AC4

CFG12

AE2

CFG13

AD1

CFG14

AF8

CFG15

AF6

CFG16

AB7

CFG17

AU1

RSVD_TP0

T4

RSVD#T4

T2

RSVD#T2

U1

RSVD#U1

V2

RSVD#V2

AV71

RSVD#AV71

AW70

RSVD#AW70

AY69

RSVD#AY69

BB69

RSVD#BB69

D8

RSVD#D8

B7

RSVD#B7

A10

RSVD#A10

B9

RSVD#B9

C5

RSVD_NCTF#C5

A6

RSVD_NCTF#A6

E3

RSVD_NCTF#E3

F1

RSVD_NCTF#F1

AUBURNDALE-1-GP-U3-NF

AUBURNDALE-1-GP-U3-NF

5

RESERVED

RESERVED

NCTF_DC_TEST#BV71
NCTF_DC_TEST#BV69
NCTF_DC_TEST#BV68

NCTF_DC_TEST#BT71

NCTF_DC_TEST#BR71

NCTF TEST PIN:

A5,A68,A69,A71,C3,C71,E1,E71,BR1,BR71,

NCTF TEST PIN:

A5,A68,A69,A71,C3,C71,E1,E71,BR1,BR71,

BT1,BT71,BV1,BV3,BV5,BV68,BV69,BV71

BT1,BT71,BV1,BV3,BV5,BV68,BV69,BV71

RSVD#AC69
RSVD#AC71

RSVD#AA71
RSVD#AA69

RSVD#R66
RSVD#R64

RSVD_NCTF#BT5
RSDV_NCTF#BR5

RSDV_NCTF#BV6
RSDV_NCTF#BV8

RSVD#AV69
RSVD#AK71
RSVD#AN69
RSVD#AP66
RSVD#AH66
RSVD#AK66
RSVD#AR71

RSVD#AM66

RSVD#AK69
RSVD#AU71

RSVD#AT70
RSVD#AR69
RSVD#AU69

RSVD#AT67

RSVD_TP2
RSVD_TP1

RSVD#AV4

RSVD#AU2

RSVD#BE69
RSVD#BE71

NCTF_DC_TEST#BV5
NCTF_DC_TEST#BV3
NCTF_DC_TEST#BV1

DC_TEST_BT69

DC_TEST_BT3

NCTF_DC_TEST#BT1
NCTF_DC_TEST#BR1

NCTF_DC_TEST#E71

NCTF_DC_TEST#E1

NCTF_DC_TEST#C71

DC_TEST_C69

NCTF_DC_TEST#C3
NCTF_DC_TEST#A71
NCTF_DC_TEST#A69
NCTF_DC_TEST#A68

NCTF_DC_TEST#A5

AC69
AC71

AA71
AA69

R66
R64

BT5
BR5

BV6
BV8

AV69
AK71
AN69
AP66
AH66
AK66
AR71
AM66
AK69
AU71
AT70
AR69
AU69
AT67

AP2
AN7

AV4
AU2

BE69
BE71

TP2

TP2

1

BV71
BV69
BV68
BV5
BV3
BV1
BT71
BT69
BT3
BT1
BR71
BR1
E71
E1
C71
C69
C3
A71
A69
A68
A5

4

1

1

1

TPAD14-GP

TPAD14-GP

TP3

TP3
TPAD14-GP

TPAD14-GP

TP4

TP4
TPAD14-GP

TPAD14-GP

TP5

TP5
TPAD14-GP

TPAD14-GP

3

CFG0

CFG3

CFG4

DY

DY

DY

DY

12

12

12

R35

R35
3KR2F-GP

3KR2F-GP

R36

R36
3KR2F-GP

3KR2F-GP

R37

R37
3KR2F-GP

3KR2F-GP

PCI-Express Configuration Select

CFG0

1:Single PEG
0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

CFG3

1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

CFG4

1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port

DVT 1ST

DVT 1ST

DVT 1ST

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A4

A4

A4
Date: Sheet of

Date: Sheet of

Date: Sheet of

CPU SFF 7 of 8(RESERVED)

CPU SFF 7 of 8(RESERVED)

CPU SFF 7 of 8(RESERVED)

TUCANA

TUCANA

TUCANA

2

10 56Wednesday, July 07, 2010

10 56Wednesday, July 07, 2010

10 56Wednesday, July 07, 2010

1

SB

SB

SB

5

D D

C C

B B

A A

5

CPU1I

CPU1I

BU62

VSS

BU58

VSS

BU55

VSS

BU51

VSS

BU48

VSS

BU44

VSS

BU37

VSS

BU32

VSS

BU25

VSS

BU21

VSS

BU18

VSS

BU14

VSS

BU11

VSS

BU7

VSS

BP42

VSS

BN64

VSS

BN6

VSS

BM70

VSS

BM51

VSS

BM44

VSS

BM32

VSS

BM24

VSS

BM17

VSS

BL57

VSS

BL55

VSS

BL48

VSS

BL40

VSS

BL28

VSS

BL20

VSS

BK63

VSS

BK60

VSS

BK53

VSS

BK34

VSS

BK10

VSS

BJ64

VSS

BJ21

VSS

BJ9

VSS

BJ1

VSS

BH70

VSS

BH57

VSS

BH55

VSS

BH47

VSS

BH24

VSS

BH20

VSS

BH15

VSS

BG51

VSS

BG36

VSS

BF62

VSS

BF30

VSS

BF13

VSS

BF8

VSS

BE70

VSS

BE65

VSS

BE9

VSS

BE1

VSS

BD57

VSS

BD53

VSS

BD50

VSS

BD46

VSS

BD42

VSS

BD39

VSS

BD14

VSS

BB71

VSS

BB62

VSS

BB57

VSS

BB53

VSS

BB50

VSS

BB46

VSS

BB42

VSS

BB39

VSS

BB7

VSS

BB1

VSS

BA70

VSS

AY71

VSS

AY66

VSS

AY62

VSS

AY59

VSS

AY55

VSS

AY51

VSS

AY48

VSS

AR42

VSS

AR39

VSS

AR35

VSS

AR33

VSS

AR32

VSS

AR30

VSS

AR28

VSS

AR26

VSS

AR24

VSS

AR23

VSS

AR21

VSS

AR19

VSS

AR17

VSS

AR15

VSS

AR14

VSS

AR4

VSS

AR1

VSS

AP70

VSS

AP64

VSS

AN62

VSS

AN55

VSS

AY44

VSS

AY41

VSS

AY37

VSS

AY35

VSS

AY33

VSS

AY32

VSS

AY30

VSS

AY28

VSS

AY26

VSS

AUBURNDALE-1-GP-U3-NF

AUBURNDALE-1-GP-U3-NF

VSS

VSS

9 OF 10

9 OF 10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AY24
AY23
AY21
AY19
AY17
AY15
AY14
AY12
AY8
AY4
AW67
AW62
AW59
AW55
AW51
AW48
AW44
AW41
AW37
AV9
AV1
AU70
AU62
AU57
AU53
AU50
AU46
AU42
AU39
AU35
AU33
AU32
AU30
AU28
AU26
AU24
AU23
AU21
AU19
AU17
AU15
AU14
AU4
AT64
AT10
AR62
AR57
AR53
AR50
AR46
AN51
AN48
AN44
AN41
AN37
AN5
AN4
AM64
AM8
AL62
AL55
AL51
AL48
AL44
AL41
AL37
AL35
AL33
AL1
AK70
AK64
AK55
AK51
AK48
AK44
AK41
AK37
AK32
AK30
AK28
AK26
AK24
AK23
AK21
AK19
AK17
AK15
AJ70
AH62
AH57
AH55
BV66
BV64
BT68
BR69
BR68
BR3
BN71
BN1
BL71
BL1
R14
H71
F71
E69
E68
A66
A64
E5
C68

4

4

3

CPU1J

CPU1J

AH53

VSS

AH51

VSS

AH50

VSS

AH48

VSS

AH46

VSS

AH44

VSS

AH42

VSS

AH41

VSS

AH39

VSS

AH37

VSS

AH35

VSS

AH33

VSS

AH32

VSS

AH30

VSS

AH28

VSS

AH26

VSS

AH24

VSS

AH23

VSS

AH21

VSS

AH19

VSS

AH17

VSS

AH15

VSS

AH4

VSS

AG64

VSS

AG9

VSS

AG6

VSS

AF69

VSS

AF62

VSS

AF1

VSS

AE70

VSS

AE64

VSS

AD62

VSS

AD57

VSS

AD53

VSS

AD50

VSS

AD46

VSS

AD42

VSS

AD4

VSS

AC67

VSS

AC64

VSS

AC10

VSS

AC5

VSS

AC1

VSS

AB70

VSS

AB62

VSS

AB57

VSS

AB53

VSS

AB50

VSS

AB46

VSS

AB42

VSS

AB39

VSS

AB37

VSS

AB35

VSS

AB33

VSS

AB32

VSS

AB30

VSS

AB28

VSS

AB26

VSS

AB24

VSS

AB23

VSS

AB21

VSS

AB19

VSS

AB17

VSS

AB15

VSS

AB14

VSS

AB9

VSS

AA66

VSS

AA64

VSS

AA62

VSS

AA57

VSS

AA53

VSS

AA50

VSS

AA46

VSS

AA42

VSS

AA39

VSS

AA37

VSS

AA35

VSS

AA33

VSS

AA32

VSS

AA30

VSS

AA28

VSS

AA26

VSS

AA24

VSS

AA23

VSS

AA21

VSS

AA19

VSS

F20

VSS

F4

VSS

E37

VSS

E33

VSS

E30

VSS

E16

VSS

E12

VSS

D41

VSS

D38

VSS

D34

VSS

D31

VSS

D27

VSS

D24

VSS

D20

VSS

D17

VSS

D13

VSS

D10

VSS

D6

VSS

B65

VSS

B40

VSS

AUBURNDALE-1-GP-U3-NF

AUBURNDALE-1-GP-U3-NF

3

VSS

VSS

10 OF 10

10 OF 10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A40
A36
A33
A29
A26
A22
A19
A15
A12
A8
B62
B58
B55
B51
B48
B44
A59
A55
A52
A48
A45
AA17
AA15
AA14
AA4
W69
W62
W57
W53
W50
W46
W42
W6
W1
V70
U64
U62
U57
U53
U50
U46
U42
U39
U9
U4
T1
R70
R62
R57
R53
R50
R46
R42
R5
P4
N63
N57
N53
N50
N46
N30
N21
N15
M53
M42
M36
M1
L70
L57
L48
L47
L13
K64
K53
K43
K36
K34
K32
K25
K17
K11
K6
K4
J65
J57
J48
J47
J40
J9
H53
H43
H36
H1
G70
G57
G53
G48
G47
G43
G30
G24
G20
G15
F61
F48
F47
F28

2

DVT 1ST

DVT 1ST

DVT 1ST

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

2

Date: Sheet of

CPU SFF 8 of 8(VSS)

CPU SFF 8 of 8(VSS)

CPU SFF 8 of 8(VSS)

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

11 56Wednesday, July 07, 2010

11 56Wednesday, July 07, 2010

11 56Wednesday, July 07, 2010

1

SB

SB

SB

5

RTC_X1

R39

R39

1 2

10MR2J-L-GP

10MR2J-L-GP

D D

1

4

23

X2

C147

C147

C C

B B

A A

If reserve 1.5/1.8V option for VCCVRM.Not Power plan change only.
Please refer figure2.HDA_SYNC will be strap to define VCCVRM is 1.5 or 1.8V source.
Means need have Pull high/low resistor to option,
P/H voltage base on HAD Link is 1.5V or 3.3V(Figure 3).

X2
X-32D768KHZ-34GPU

X-32D768KHZ-34GPU

82.30001.661

82.30001.661

1 2

SC5P50V2CN-2GP

SC5P50V2CN-2GP

ACZ_RST#31,32
ACZ_BITCLK31
ACZ_SYNC31
ACZ_SDATAOUT31

ACZ_BIT_CLK_1 PCH_SPI_CLK

12

EC1

EC1

SC22P50V2JN-4GP

SC22P50V2JN-4GP

DY

DY

DY

DY

12

DY

DY

1D5V_S01D8V_S0

12

R52

R52

10KR2J-3-GP

10KR2J-3-GP

DY

DY

5

RN6

RN6
SRN33J-7-GP

SRN33J-7-GP

1
2
3
4 5

EC2

EC2

SC22P50V2JN-4GP

SC22P50V2JN-4GP

12

R53

R53

12

R54

R54

DY

DY

12

R41

R41
0R2J-2-GP

0R2J-2-GP

RTC_X2_1

C148

C148

SC5P50V2CN-2GP

SC5P50V2CN-2GP

1 2

10KR2J-3-GP

10KR2J-3-GP

ACZ_SYNC_1

10KR2J-3-GP

10KR2J-3-GP

RTC_X2

ACZ_RST#_1

8

ACZ_BIT_CLK_1

7

ACZ_SYNC_1

6

ACZ_SDATAOUT_1

51R2F-2-GP

51R2F-2-GP

R48

R48

12

PCH_SPI_CS#039

PCH_SPI_MOSI39
PCH_SPI_CLK39

RTC_AUX_S5

RTC_AUX_S5

1
2 3

PCH_JTAG_TCK

SPI_CS0#, SPI_MISO, SPI_MOSI, SPI_CLK:
No series resistor required if routing length is 1.5"-6.5"

4

R38

R38

330KR2J-L1-GP

330KR2J-L1-GP

1 2
1 2

R40

R40
1MR2J-1-GP

1MR2J-1-GP

RN5

RN5

SRN20KJ-GP-U

SRN20KJ-GP-U

C149

C149

4

SC1U10V2KX-1GP

SC1U10V2KX-1GP

INTVRMEN
SM_INTRUDER#

12

21

G1

GAP-OPENG1GAP-OPEN

12

C150

C150

SC1U10V2KX-1GP

SC1U10V2KX-1GP

ACZ_SPKR31

ACZ_SDATAIN031

When unused all JTAG pins may be NC

DY

DY

1 2

R49 0R2J-2-GP

R49 0R2J-2-GP

DY

DY

1 2

R51 0R2J-2-GP

R51 0R2J-2-GP

RN7

RN7

1
2
3
4 5

SRN0J-7-GP

SRN0J-7-GP

SPI_CS#0_R

8
7

SPI_MOSI_R

6

SPI_CLK_R

DVT 20100630

RTC_AUX_S5

3

12

C151

C151

SC1U10V2KX-1GP

SC1U10V2KX-1GP

4

R47

R47

TP6TPAD14-GP TP6TPAD14-GP

SPI_MISO_R39

3D3V_AUX_S5

1

2

D1

D1
BAT54GP-GP-U

BAT54GP-GP-U

83.R2003.I81

83.R2003.I81

2ND = 83.BAT54.D81

2ND = 83.BAT54.D81

RTC_X1
RTC_X2

ICH_RTCRST#
SRTCRST#
SM_INTRUDER#
INTVRMEN

ACZ_BIT_CLK_1
ACZ_SYNC_1

ACZ_RST#_1

ACZ_SDATAOUT_1

ME_UNLOCK#38

1 2

100KR2J-1-GP

100KR2J-1-GP

PCH_JTAG_TCK

1

PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TRST#

SPI_CLK_R
SPI_CS#0_R

SPI_MOSI_R

RTC_AUX_S5

3

PCH1A

PCH1A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN#/GPIO33

J30

HDA_DOCK_RST#/GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

R55

R55

1 2

510R2J-1-GP

510R2J-1-GP

3

RTC_BAT

RTCIHDA

RTCIHDA

SATA

SATA

SPI JTAG

SPI JTAG

R56

R56

1 2

510R2J-1-GP

510R2J-1-GP

1 OF 10

1 OF 10

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

LPC

LPC

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP/GPIO21
SATA1GP/GPIO19

RTC CONN

RTC_BAT_R

2

LPC_LAD0_1

D33

LPC_LAD1_1

B33

LPC_LAD2_1

C32

LPC_LAD3_1

A32

LPC_LFRAME#_1

C34
A34

F34
AB9

AK7
AK6
AK11
AK9

AH6
AH5
AH9
AH8

AF11
AF9
AF7
AF6

AH3
AH1
AF3
AF1

AD9
AD8
AD6
AD5

AD3
AD1
AB3
AB1

SATAICOMP

AF16
AF15

T3

SATA_DET#0_R

Y9
V1

RTC1

RTC1

3
1

2
4

ACES-CON2-11-GP

ACES-CON2-11-GP

20.F0772.002

20.F0772.002

2ND = 20.F1729.002

2ND = 20.F1729.002

2

R42 56R2F-1-GPR42 56R2F-1-GP
R43 56R2F-1-GPR43 56R2F-1-GP
R44 56R2F-1-GPR44 56R2F-1-GP
R45 56R2F-1-GPR45 56R2F-1-GP

R46 56R2F-1-GPR46 56R2F-1-GP

INT_SERIRQ 38

SATA_RXN0 26
SATA_RXP0 26
SATA_TXN0 26
SATA_TXP0 26

1 2

R50

R50
37D4R2F-GP

37D4R2F-GP

HDD_LED# 13,43

SATA_DET#1_R 17

1

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable Low=Disable

integrated VccLan1_05VccCL1_05

1 2
1 2
1 2
1 2

1 2

LAN100_SLP

High=Enable Low=Disable

LPC_LAD0 38,39
LPC_LAD1 38,39
LPC_LAD2 38,39
LPC_LAD3 38,39

LPC_LFRAME# 38,39

HDD

1D05V_S0

RN8

SATA_DET#0_R
INT_SERIRQ

DVT 1ST

DVT 1ST

DVT 1ST

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

PCH 1 of 9(SATA/RTC/HDA)

PCH 1 of 9(SATA/RTC/HDA)

PCH 1 of 9(SATA/RTC/HDA)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

1

4

12 56Wednesday, July 07, 2010

12 56Wednesday, July 07, 2010

12 56Wednesday, July 07, 2010

RN8

SRN10KJ-5-GP

SRN10KJ-5-GP

23
1

3D3V_S0

SB

SB

SB

5

4

3

2

1

2 OF 10

PCH1B

PCH1B

PCIE_RXN135

MINICARD1-WLAN

D D

LAN

C C

CLK_PCIE_MINI1#35
CLK_PCIE_MINI135

MINICARD1-WLAN

WLAN_CLKREQ#35

PCIE_CLK_RQ1#

CLK_PCIE_LAN#29
CLK_PCIE_LAN29

LAN

LAN_CLKREQ#29

B B

PCIECLKRQ{0,3,4,5,6,7}# should
have a 10K pull-up to +3VALW.

PCIECLKRQ{1,2} should have a
10K pull-up to +1.05VS (But CRB is
pull-up to +3VS).

RN16

RN16

1

8

2

3D3V_S0

A A

CLK_PCIE_LAN CLK_PCIE_LAN#

12

EC4

EC4

SC22P50V2JN-4GP

SC22P50V2JN-4GP

DY

DY

3
4 5

SRN10KJ-6-GP

SRN10KJ-6-GP

7
6

5

PCIE_RXP135
PCIE_TXN135
PCIE_TXP135

PCIE_RXN329

PCIE_RXP329
PCIE_TXN329
PCIE_TXP329

PCIE_CLK_RQ2#

12

EC5

EC5

SC22P50V2JN-4GP

SC22P50V2JN-4GP

DY

DY

C153 SCD1U10V2KX-5GPC153 SCD1U10V2KX-5GP
C152 SCD1U10V2KX-5GPC152 SCD1U10V2KX-5GP

C154 SCD1U10V2KX-5GPC154 SCD1U10V2KX-5GP
C155 SCD1U10V2KX-5GPC155 SCD1U10V2KX-5GP

RN12 SRN0J-10-GP-URN12 SRN0J-10-GP-U

2 3
1

R58 0R2J-2-GPR58 0R2J-2-GP

R59 0R2J-2-GPR59 0R2J-2-GP

PCH_GPIO39 17

4

1 2

TP7TPAD14-GP TP7TPAD14-GP

1

TP8TPAD14-GP TP8TPAD14-GP

1

TP9TPAD14-GP TP9TPAD14-GP

1

RN14 SRN0J-10-GP-URN14 SRN0J-10-GP-U

1

4

2 3
1 2

HDD_LED# 12,43
PCIE_CLK_RQ1#

PCIE_CLK_RQ0#

CLK_PCH_SRC1_N
CLK_PCH_SRC1_P

PCIE_CLK_RQ1#

CLK_PCH_SRC2_N
CLK_PCH_SRC2_P

PCIE_CLK_RQ2#

CLK_PCH_SRC3_N
CLK_PCH_SRC3_P

PCIE_CLK_RQ3#

PCIE_CLK_RQ4#

PCIE_CLK_RQ5#

PEG_B_CLKRQ#

BG30

PERN1

BJ30

TXN1

12

TXP1

12

TXN3

12

TXP3

12

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0#/GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1#/GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2#/GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4#/GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5#/GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ#/GPIO56

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

4

SMBus

SMBus

PCI-E*

PCI-E*

Link

Link

Controller

Controller

PEG_A_CLKRQ#/GPIO47

PEG

PEG

CLKOUT_DP_N/CLKOUT_BCLK1_N
CLKOUT_DP_P/CLKOUT_BCLK1_P

From CLK BUFFER

From CLK BUFFER

CLKIN_SATA_N/CKSSCD_N
CLKIN_SATA_P/CKSSCD_P

Clock Flex

Clock Flex

CLKIN_PCILOOPBACK

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

2 OF 10

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1ALERT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1
CL_DATA1
CL_RST1#

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

B9
H14
C8

J14
C6
G8

M14
E10
G12

T13
T11
T9

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

AH51
AH53

AF38

T45

P43

T42

N50

3

SMB_CLK
SMB_DATA

PCH_GPIO60 17

SML0_CLK
SML0_DATA

PCH_GPIO74 16

KBC_SCL1 38
KBC_SDA1 38

PEG_A_CLKRQ#

CLK_EXP_N
CLK_EXP_P

CLK_DMI# 3
CLK_DMI 3

CLK_CPU_BCLK# 3
CLK_CPU_BCLK 3

DREFCLK# 3
DREFCLK 3

CLK_SATA# 3
CLK_SATA 3

CLK_ICH14 3

CLK_PCI_FB 16

XTAL25_IN
XTAL25_OUT

XCLK_RCOMP

33MHZ

33MHZ

33MHZ

48MHZ

EC_SWI# 14,38

1 2

R60

R60
90D9R2F-1-GP

90D9R2F-1-GP

3D3V_S5

SMB_DATA
SMB_CLK

RN11

RN11

4

SRN0J-10-GP-U

SRN0J-10-GP-U

SML0_CLK
SML0_DATA

4

1

1
23

1D05V_S0

RN53

RN53
SRN2K2J-1-GP

SRN2K2J-1-GP

2 3

123

678

4 5

2

3D3V_S5

RN9

RN9
SRN2K2J-4-GP

SRN2K2J-4-GP

KBC_SCL1
KBC_SDA1

PCH_SMBDATA3,21,22

CLK_EXP_N_R 5
CLK_EXP_P_R 5

3D3V_S0

4

RN61

RN61
SRN2K2J-1-GP

SRN2K2J-1-GP

1

2 3

Q3

Q3
2N7002KDW-GP

2N7002KDW-GP

1

SMB_CLK

AC_PRESENT14,38

PCH_GPIO1217

XTAL25_IN

R62

R62

1MR2J-1-GP

1MR2J-1-GP

XTAL25_OUT

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

PCH 2 of 9(PCIE/CLK/SMB)

PCH 2 of 9(PCIE/CLK/SMB)

PCH 2 of 9(PCIE/CLK/SMB)

ize Document Number Rev

Size Document Number Rev

Size Document Number Rev

S
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

2
3 4

84.2N702.A3F

84.2N702.A3F

2ND = 84.DM601.03F

2ND = 84.DM601.03F

PEG_A_CLKRQ#

PCIE_CLK_RQ0#
PCIE_CLK_RQ4#
AC_PRESENT

PCIE_CLK_RQ3#
PEG_B_CLKRQ#

PCIE_CLK_RQ5#

DVT 20100625
Change C156,C157 to 12pF
for Crystal vendor Test

R63

R63

XTAL25_OUT_1

1 2

1 2

0R2J-2-GP

0R2J-2-GP

TUCANA

TUCANA

TUCANA

3D3V_S0

6
5

R57

R57

1 2

10KR2J-3-GP

10KR2J-3-GP

X3

X3

XTAL-25MHZ-102-GP

XTAL-25MHZ-102-GP

82.30020.851

82.30020.851

2ND = 82.30020.971

2ND = 82.30020.971

SMB_DATA

PCH_SMBCLK 3,21,22

3D3V_S5

RN13

RN13

1

8

2

7

3

6

4 5

SRN10KJ-6-GP

SRN10KJ-6-GP

3D3V_S5

RN15

RN15

1

8

2

7

3

6

45

SRN10KJ-6-GP

SRN10KJ-6-GP

C156

C156
SC12P50V2JN-3GP

SC12P50V2JN-3GP

C157

C157
SC12P50V2JN-3GP

SC12P50V2JN-3GP

13 56Wednesday, July 07, 2010

13 56Wednesday, July 07, 2010

13 56Wednesday, July 07, 2010

1

12

12

12

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SB

SB

SB

RN17

RN17

8
7
6

SRN10KJ-6-GP

SRN10KJ-6-GP

5

PCH_GPIO72

1
2
3

LAN_RST#1

45

3D3V_S5

EC_SWI# 13,38

3D3V_S5

D D

Delete PM_PWRBTN# pull high

5V_AUX_S5

C158

C158

1 2

DVT 20100705
Change D3 to schottky diode.

C C

CORE_PW RGD

PM_RSMRST#

VTT_PW RGD38,49

B B

RSMRST#_KBC38

A A

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

D3

D3

1

2

BAT54C-GP-U

BAT54C-GP-U

83.BAT54.081

83.BAT54.081

3D3V_AUX_S5

12

R75

R75
10KR2J-3-GP

10KR2J-3-GP

3

D4

D4

KA

RB751V-40-2-GP

RB751V-40-2-GP

83.R2004.B8F

83.R2004.B8F

2ND = 83.R0304.D8F

2ND = 83.R0304.D8F

3RD = 83.R2004.C8F

3RD = 83.R2004.C8F

R72

R72
1KR2F-3-GP

1KR2F-3-GP

12

D5

D5

3

DY

DY

BAT54PT-GP

BAT54PT-GP

83.00054.T81

83.00054.T81

2ND = 83.BAT54.D81

2ND = 83.BAT54.D81

Q5

Q5

34
2

5

1

6

2N7002KDW-GP

2N7002KDW-GP

84.2N702.A3F

84.2N702.A3F

2ND = 84.DM601.03F

2ND = 84.DM601.03F

5

U3

U3

5

VCC

4

RESET#/RESET

G680LT1UF-GP

G680LT1UF-GP

74.00680.A7F

74.00680.A7F

3D3V_S5

DY

DY

1

2

PM_RSMRST#

1

HTH

2

GND

3

LTH

12

R71

R71
10KR2J-3-GP

10KR2J-3-GP

PM_RSMRST#

12

R73

R73

Add RTC Data lose function

100KR2J-1-GP

100KR2J-1-GP

DY D5

12

R76

R76
100KR2J-1-GP

100KR2J-1-GP

8223_PGOOD 47

All_PWRGD modify 51123_PGOOD from 3V/5V power

4

1 2

R64 1KR2J-1-GPR64 1KR2J-1-GP

DCBATOUT

12

R66

R66
820KR2F-GP

820KR2F-GP

HTH
LTH

12

R69

R69
15KR2F-GP

15KR2F-GP

12

R70

R70
165KR2F-GP

165KR2F-GP

4

PCIE_WAKE#

D2

D2

IMVP_VR_EN44,46

CORE_PW RGD25,46

PM_PWROK_117

Vl = 1.245 ( (R1+R2+R3)/(R2+R3))
Vh= 1.245 ( (R1+R2+R3)/(R3))

1SS400GP-GP

1SS400GP-GP

AK

R67

R67

1 2

0R2J-2-GP

0R2J-2-GP

3

1D05V_S0

PM_SYSRST#_R17

2N7002E-1-GP

2N7002E-1-GP

84.2N702.D31

84.2N702.D31

2ND = 84.2N702.E31

2ND = 84.2N702.E31

3

1 2

R65

R65
49D9R2F-GP

49D9R2F-GP

PM_PWROK_1

R68

R68

1 2

0R2J-2-GP

0R2J-2-GP

PM_SLP_S3#

Q4

Q4

PM_DRAM_PWRGD5

SUS_PW R_DN_ACK17,38

DMI_IRCOMP_R

ME_PWROK

LAN_RST#1

PM_RSMRST#

PM_PWRBTN#38

AC_PRESENT13,38

3D3V_S5

12

D

.

.
.

.

.

.

. .

. .

G

DMI_RXN04
DMI_RXN14
DMI_RXN24
DMI_RXN34

DMI_RXP04
DMI_RXP14
DMI_RXP24
DMI_RXP34

DMI_TXN04
DMI_TXN14
DMI_TXN24
DMI_TXN34

DMI_TXP04
DMI_TXP14
DMI_TXP24
DMI_TXP34

PCH_GPIO72

PM_RI#17

R74

R74
10KR2J-3-GP

10KR2J-3-GP

S3

S3

S3

S3

S

2

PCH1C

PCH1C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK/GPIO30

P5

PWRBTN#

P7

ACPRESENT/GPIO31

A6

BATLOW#/GPIO72

F14

RI#

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

PM_SLP_S3_CTL 8,21,44,51

2

1

3 OF 10

3 OF 10

BA18

FDI_RXN0

BH17

FDI_RXN1

BD16

FDI_RXN2

BJ16

FDI_RXN3

BA16

FDI_RXN4

BE14

FDI_RXN5

BA14

FDI_RXN6

BC12

FDI_RXN7

BB18

FDI_RXP0

BF17

FDI_RXP1

BC16

FDI_RXP2

BG16

FDI_RXP3

AW16

FDI_RXP4

BD14

FDI_RXP5

BB14

FDI_RXP6

BD12

FDI_RXP7

BJ14

FDI_INT

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

BF13
BH13
BJ12
BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

FDI_FSYNC0

DMI

FDI

DMI

FDI

FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

System Power Management

System Power Management

SLP_LAN#/GPIO29

DVT 1ST

DVT 1ST

DVT 1ST

Title

Title

Title

ize Document Number Rev

Size Document Number Rev

Size Document Number Rev

S
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

FDI_TXN0 4
FDI_TXN1 4
FDI_TXN2 4
FDI_TXN3 4
FDI_TXN4 4
FDI_TXN5 4
FDI_TXN6 4
FDI_TXN7 4

FDI_TXP0 4
FDI_TXP1 4
FDI_TXP2 4
FDI_TXP3 4
FDI_TXP4 4
FDI_TXP5 4
FDI_TXP6 4
FDI_TXP7 4

FDI_INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4

PCIE_WAKE# 29,35

PM_CLKRUN# 17,38

PM_SUS_STAT#

PM_SLP_S5#

PM_SLP_M#

PM_SLP_DSW#

PM_SLP_LAN#

PCH 3 of 9(DMI/FDI)

PCH 3 of 9(DMI/FDI)

PCH 3 of 9(DMI/FDI)

TUCANA

TUCANA

TUCANA

1

PM_SUS_CLK 38

1

PM_SLP_S4# 38,44,48,51

PM_SLP_S3# 26,38,44,49,51

1

1

H_PM_SYNC 5

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

TP10 TPAD14-GPTP10 TPAD14-GP

TP11 TPAD14-GPTP11 TPAD14-GP

TP12 TPAD14-GPTP12 TPAD14-GP

TP13 TPAD14-GPTP13 TPAD14-GP

TP14 TPAD14-GPTP14 TPAD14-GP

14 56Wednesday, July 07, 2010

14 56Wednesday, July 07, 2010

14 56Wednesday, July 07, 2010

SB

SB

SB

5

4

3

2

1

Panel backlight enable control for LVDS ­ used to gate power into the backlight circuit

4 OF 10

PCH1D

PCH1D

LIBG

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

LVDS

LVDS

CRT

CRT

3

Digital Display Interface

Digital Display Interface

D D

C C

B B

3D3V_S0

RN19

RN19

1
2 3

1
2 3

R78 150R2F-1-GPR78 150R2F-1-GP

1 2

R79 150R2F-1-GPR79 150R2F-1-GP

1 2

R80 150R2F-1-GPR80 150R2F-1-GP

1 2

SRN10KJ-5-GP

SRN10KJ-5-GP

RN20

RN20

SRN2K2J-1-GP

SRN2K2J-1-GP

4

4

CLK_DDC_EDID

CLK_DDC_EDID
DAT_DDC_EDID

CRT_BLUE
CRT_GREEN
CRT_RED

PCH_BL_ON23

PCH_LCDVDD_ON23

L_BKLTCTL23

CLK_DDC_EDID23
DAT_DDC_EDID23

R77

R77
2K37R2F-GP

2K37R2F-GP

1 2

R81

R81
1KR2D-1-GP

1KR2D-1-GP

CLK_DDC_EDID
DAT_DDC_EDIDDAT_DDC_EDID

12

LVDS_TXACLK-23
LVDS_TXACLK+23

LVDS_TXAOUT0-23
LVDS_TXAOUT1-23
LVDS_TXAOUT2-23

LVDS_TXAOUT0+23
LVDS_TXAOUT1+23
LVDS_TXAOUT2+23

CRT_BLUE24
CRT_GREEN24
CRT_RED24

CRT_DDCCLK24
CRT_DDCDATA24

CRT_HSYNC24
CRT_VSYNC24

CRT_IREF

1K 0.5% ohm

A A

5

4

4 OF 10

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_INTN

SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPB_0N

DDPB_0P

DDPB_1N

DDPB_1P

DDPB_2N

DDPB_2P

DDPB_3N

DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ46
BG46

BJ48
BG48

BF45
BH45

T51
T53

BG44
BJ44
AU38

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

Y49
AB49

BE44
BD44
AV40

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

U50
U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

PCH_HDMI_CLK 25
PCH_HDMI_DATA 25

PCH_HDMI_DETECT 25

2

PCH_HDMI_DATA2-_L 25
PCH_HDMI_DATA2+_L 25
PCH_HDMI_DATA1-_L 25
PCH_HDMI_DATA1+_L 25
PCH_HDMI_DATA0-_L 25
PCH_HDMI_DATA0+_L 25
PCH_HDMI_CLK-_L 25
PCH_HDMI_CLK+_L 25

DVT 1ST

DVT 1ST

DVT 1ST

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

ize Document Number Rev

Size Document Number Rev

Size Document Number Rev

S
Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

PCH 4 of 9(LVDS/CRT/DP)

PCH 4 of 9(LVDS/CRT/DP)

PCH 4 of 9(LVDS/CRT/DP)

TUCANA

TUCANA

TUCANA

15 56Wednesday, July 07, 2010

15 56Wednesday, July 07, 2010

15 56Wednesday, July 07, 2010

1

SB

SB

SB

5

3D3V_S0

RN21

RN21
SRN8K2J-4-GP

SRN8K2J-4-GP

1
2
3
4 5

RN22

RN22
SRN8K2J-4-GP

SRN8K2J-4-GP

1
2

D D

C C

3
4 5

RN23

RN23
SRN8K2J-4-GP

SRN8K2J-4-GP

1
2
3
4 5

RN24

RN24
SRN8K2J-4-GP

SRN8K2J-4-GP

1
2
3
4 5

RN25

RN25
SRN8K2J-4-GP

SRN8K2J-4-GP

1
2
3
4 5

PCI_GNT0#
PCI_GNT1#

8
7
6

8
7
6

PCI_REQ3#

8

INT_PIRQF#

7

INT_PIRQB#

6

PCI_REQ0#

8
7
6

PCI_REQ2#

8

INT_PIRQC#

7

INT_PIRQA#

6

INT_PIRQG#

1 2
1 2

PCI_PERR#
PCI_PLOCK#
PCI_DEVSEL#
PCI_SERR#

INT_PIRQD#
PCI_IRDY#
PCI_STOP#
INT_PIRQE#

INT_PIRQH#
PCI_TRDY#
PCI_FRAME#
PCI_REQ1#

DY

DY
DY

DY

R82

R82
1KR2J-1-GP

1KR2J-1-GP
R83

R83
1KR2J-1-GP

1KR2J-1-GP

BOOT BIOS Strap

PCI_GNT#1 BOOT BIOS LocationPCI_GNT#0

0 0 LPC(Default)

01 Reserved

0 1

B B

A A

5

PCI

11

SPI

PLT_RST#5,29,34,35,38,39,44

R85

R85

100KR2J-1-GP

100KR2J-1-GP

USE SPI

12

DY

DY

4

These pins are left as NC,
because the function is disable.

DVT 20100621
Add PCI_REQ2# Pull-High to 3D3V_S0
by hang-up issue

PCLK_FW H39
CLK_PCI_FB13

CLK_PCI_KBC38

PCLK_FW H

12

EC6

EC6

SC22P50V2JN-4GP

SC22P50V2JN-4GP

DY

DY

4

1 2

R259 22R2F-1-GPR259 22R2F-1-GP

1 2

R260 22R2F-1-GPR260 22R2F-1-GP

R86 47R2J-2-GPR86 47R2J-2-GP

1 2

3

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#

PCI_GNT0#
PCI_GNT1#

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

PCI_SERR#
PCI_PERR#

PCI_IRDY#
PCI_DEVSEL#

PCI_FRAME#
PCI_PLOCK#
PCI_STOP#

PCI_TRDY#

CLK_PCI_SIO_R
CLK_PCI_FB_R

CLK_PCI_KBC_R

3

PCH1E

PCH1E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1#/GPIO50

B45

REQ2#/GPIO52

M53

REQ3#/GPIO54

F48

GNT0#

K45

GNT1#/GPIO51

F36

GNT2#/GPIO53

H53

GNT3#/GPIO55

B41

PIRQE#/GPIO2

K53

PIRQF#/GPIO3

A36

PIRQG#/GPIO4

A48

PIRQH#/GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

USB_OC#1
USB_OC#3
USB_OC#7
USB_OC#0

PCI

PCI

RN28

RN28

8
7
6

SRN10KJ-6-GP

SRN10KJ-6-GP

NV_DQ0/NV_IO0
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2
NV_DQ3/NV_IO3
NV_DQ4/NV_IO4
NV_DQ5/NV_IO5
NV_DQ6/NV_IO6
NV_DQ7/NV_IO7
NV_DQ8/NV_IO8

NV_DQ9/NV_IO9
NV_DQ10/NV_IO10
NV_DQ11/NV_IO11

NVRAM

NVRAM

NV_DQ12/NV_IO12
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14
NV_DQ15/NV_IO15

NV_RCOMP

NV_WR#0_RE#
NV_WR#1_RE#

NV_WE#_CK0
NV_WE#_CK1

USB

USB

USBRBIAS#

OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43

OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14

3D3V_S5

1
2
3
45

2

5 OF 10

5 OF 10

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_ALE
NV_CLE

NV_RB#

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS

2

AY9
BD1
AP15
BD8

AV9
BG8

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

BD3
AY6

AU2
AV7
AY8

AY5
AV11

BF5

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

B25
D25

N16
J16
F16
L16
E14
G16
F12
T15

1

These pins are left as NC,
because the function is disable.

USB Table

Pair

Device

External #0

USBPN0 28
USBPP0 28
USBPN1 28
USBPP1 28
USBPN2 34
USBPP2 34

USBPN4 28
USBPP4 28

USBPN8 35
USBPP8 35

USBPN9 23
USBPP9 23

USBPN12 27
USBPP12 27

USB_RBIAS_PN

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

DVT 1ST

DVT 1ST

DVT 1ST

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

1 2

R84

R84
22D6R2F-L1-GP

22D6R2F-L1-GP

USB_OC#0 28
USB_OC#1 28
USB_OC#2 28

USB_OC#6 17

PCH_GPIO7413

PCH 5 of 9(PCI/USB)

PCH 5 of 9(PCI/USB)

PCH 5 of 9(PCI/USB)

0

External #1

1
2

CardReader

3

NC

4

External #2
NC

5
6

NC

7

NC

8

WLAN/WiMAX

9

CAMERA(HS)

10

NC

11

NC

12

BLUETOOTH(FS)

13

NC

USB_OC#4
USB_OC#2

USB_OC#5

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

1

RN27

RN27

8
7
6

SRN10KJ-6-GP

SRN10KJ-6-GP

16 56Wednesday, July 07, 2010

16 56Wednesday, July 07, 2010

16 56Wednesday, July 07, 2010

3D3V_S5

1
2
3
45

SB

SB

SB

5

GPIO8 has a weak[20K] internal pull up.
No need to have external pull down/up.
GPIO8 pin set to high at reset.

GPIO15 has a weak[20K] internal pull down.
No need to have external pull up/down.
GPIO 15 pin is set to low at reset.

D D

C C

B B

A A

Low : ME Crypto TLS with no confidentiality
High : ME Crypto TLS with confidentiality

GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.

3D3V_S5

RN30

RN30

4 5
3

6

2

7

1

8

SRN33KJ-1-GP

SRN33KJ-1-GP

3D3V_S5

1 2

R88 8K2R2J-3-GPR88 8K2R2J-3-GP

1 2

R89 1KR2J-1-GPR89 1KR2J-1-GP

3D3V_S0

RN32

RN32

4 5

3D3V_S5

3
2
1

4

3D3V_S0

3D3V_S0

SRN10KJ-6-GP

SRN10KJ-6-GP
RN33

RN33

SRN10KJ-5-GP

SRN10KJ-5-GP

3D3V_S0

6
7
8

1
23

4 5
3
2
1

8
7
6

8
7
6

SRN10KJ-6-GP

SRN10KJ-6-GP

RN34

RN34

SRN10KJ-6-GP

SRN10KJ-6-GP

RN60

RN60

SRN10KJ-6-GP

SRN10KJ-6-GP

RN18

RN18

PCH_GPIO45

PCH_GPIO15

PCH_GPIO36
PCH_GPIO48
PCH_GPIO16
PCH_GPIO0

PCH_GPIO28

6
7
8

1
2
3
45

1
2
3
45

PM_RI# 14
PCH_GPIO60 13

USB_OC#6 16
PM_PWROK_1 14

SUS_PW R_DN_ACK 14,38

PCH_GPIO35
PCH_GPIO38

PCH_GPIO22
PCH_GPIO37

STP_PCI#

EC_SCI#
EC_SMI#
PCH_GPIO17

PM_CLKRUN# 14,38

SATA_DET#1_R 12

PM_SYSRST#_R 14

4

PCH1F

PCH1F

PCH_GPIO0
EC_SMI#

EC_SCI#38

PCH_GPIO1213

TP15TPAD14-GP TP15TPAD14-GP
TP16TPAD14-GP TP16TPAD14-GP

PCH_GPIO3913

TPAD14-GP

TPAD14-GP

TP18

TP18

PCH_GPIO15
PCH_GPIO16
PCH_GPIO17
PCH_GPIO22
PCH_GPIO24

1

PCH_GPIO27

1

PCH_GPIO28
STP_PCI#
PCH_GPIO35
PCH_GPIO36
PCH_GPIO37
PCH_GPIO38
PCH_GPIO39
PCH_GPIO45
RST_GATE
PCH_GPIO48

TPAD14-GP

TPAD14-GP

TPAD14-GP

TPAD14-GP

TPAD14-GP

TPAD14-GP

1

TP17

TP17

TP19

TP19

TP20

TP20

Y3

BMBUSY#/GPIO0

C38

TACH1/GPIO1

D37

TACH2/GPIO6

J32

TACH3/GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL/GPIO12

T7

GPIO15

AA2

SATA4GP/GPIO16

F38

TACH0/GPIO17

Y7

SCLOCK/GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI#/GPIO34

V6

SATACLKREQ#/GPIO35

AB7

SATA2GP/GPIO36

AB13

SATA3GP/GPIO37

V3

SLOAD/GPIO38

P3

SDATAOUT0/GPIO39

H3

PCIECLKRQ6#/GPIO45

F1

PCIECLKRQ7#/GPIO46

AB6

SDATAOUT1/GPIO48

AA4

SATA5GP/GPIO49

F8

GPIO57

B4

VSS_NCTF_8

B52

VSS_NCTF_9

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

D2

VSS_NCTF_28

A4

VSS_NCTF#A4

A49

VSS_NCTF#A49

A5

VSS_NCTF#A5

A50

VSS_NCTF#A50

A52

VSS_NCTF#A52

A53

VSS_NCTF#A53

1

B2

VSS_NCTF#B2

B53

VSS_NCTF#B53

BE1

VSS_NCTF#BE1

BE53

VSS_NCTF#BE53

BF1

VSS_NCTF#BF1

BF53

VSS_NCTF#BF53

BH1

VSS_NCTF#BH1

BH53

VSS_NCTF#BH53

BJ1

1

VSS_NCTF#BJ1

BJ2

VSS_NCTF#BJ2

BJ4

VSS_NCTF#BJ4

BJ49

VSS_NCTF#BJ49

BJ5

VSS_NCTF#BJ5

BJ50

VSS_NCTF#BJ50

BJ52

VSS_NCTF#BJ52

1

BJ53

VSS_NCTF#BJ53

D1

VSS_NCTF#D1

D53

VSS_NCTF#D53

E1

VSS_NCTF#E1

E53

VSS_NCTF#E53

IBEXPEAK-M-GP-NF

IBEXPEAK-M-GP-NF

3

CLKOUT_PCIE6N

CLKOUT_PCIE6P

CLKOUT_PCIE7N

MISC

MISC

CLKOUT_BCLK0_N/CLKOUT_PCIE8N
CLKOUT_BCLK0_P/CLKOUT_PCIE8P

GPIO

GPIO

CPU

CPU

NCTF

NCTF

RSVD

RSVD

NCTF TEST PIN:

A4,A49,A5,A50,A52,A53,B2,B53,BE1,

BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,

BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53

NCTF TEST PIN:

A4,A49,A5,A50,A52,A53,B2,B53,BE1,

BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,

BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53

CLKOUT_PCIE7P

A20GATE

PROCPWRGD

THRMTRIP#

INIT3_3V#

6 OF 10

6 OF 10

PECI

RCIN#

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8

TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19

NC_1
NC_2
NC_3
NC_4
NC_5

TP24

AH45
AH46

AF48
AF47

U2

AM3
AM1
BG10
T1
BE10
BD10

BA22
AW22
BB22
AY45
AY46
AV43
AV45
AF13
M18
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39

P6
C10

KA20GATE 38

BCLK_CPU_N_R
BCLK_CPU_P_R

H_PECI 5
KBRCIN# 38
H_PWRGD 5

PCH_THERMTRIP_R

2

2 3
1

To CPU

10KR2F-2-GP

10KR2F-2-GP

RST_GATE

RN29

RN29

4

SRN0J-10-GP-U

SRN0J-10-GP-U

3D3V_S5

12

R92

R92

S3

S3

12

C159

C159

S3

S3

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY

DY

1 2

R87

R87
54D9R2F-L1-GP

54D9R2F-L1-GP

. .

. .

DVT 1ST

DVT 1ST

DVT 1ST

BCLK_CPU_N 5
BCLK_CPU_P 5

DVT 20100629

1 2
1 2

1D5V_S3

12

R90

R90
1KR2F-3-GP

1KR2F-3-GP

S3

S3

D

.

.
.

.

.

.

2ND = 84.2N702.E31

2ND = 84.2N702.E31

S

G

12

R93

R93
100KR2F-L1-GP

100KR2F-L1-GP

S3

S3

R648

R648
56R2J-4-GP

56R2J-4-GP
R649

R649
56R2J-4-GP

56R2J-4-GP

S3

S3

Q6

Q6
2N7002E-1-GP

2N7002E-1-GP

84.2N702.D31

84.2N702.D31

1

1D05V_S0

PM_THRMTRIP-A# 5,44

DDR3_DRAMRST# 21,22

12

R91

R91
0R2J-2-GP

0R2J-2-GP

NON_S3

NON_S3

SM_DRAMRST# 5

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

ize Document Number Rev

Size Document Number Rev

Size Document Number Rev

S
A3

A3

A3
Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PCH 6 of 9(GPIO/RSVD)

PCH 6 of 9(GPIO/RSVD)

PCH 6 of 9(GPIO/RSVD)

Taipei Hsien 221, Taiwan, R.O.C.

TUCANA

TUCANA

TUCANA

1

SB

SB

17 56Wednesday, July 07, 2010

17 56Wednesday, July 07, 2010

17 56Wednesday, July 07, 2010

SB