Sony VAIO SVF15N Schematic
A
Page
Title of schematic page Rev. Date
Page List
01
Block Diagram
02
Change List
03
04
4 4
3 3
2 2
1 1
HSW MCP(DISPLAY/Sideband)
HSW MCP(MEMORY/GND)
05
HSW MCP(CFG/PwrMGT)
06
HSW MCP(POWER)
07
HSW PCH(RTC/HDA/SATA)
08
HSW PCH(PCIE/USB)
09
HSW PCH(CLK/LPC/SPI/SMB)
10
HSW PCH(GPIO/LPIO/MISC)
11
HSW PCH(POWER)
12
DDR3L DIMM0-STD 4H(CH-A)
13
DDR3L DIMM1-RVS 4H(CH-B)
14
15
HOLE/EMI/KB
WPCE985L & FLASH
16
EDP/TS/CAMERA/NFC
17
18
HDD/Gsensor/TP/FAN
HDMI/THERMAL
19
USB3.0
20
WLAN/KB-BL
21
LED BD CON/USB BD CON
22
Sensors Hub & Sensors
23
POWER +VCC_CORE (NCP81101)
24
POWER 3VPCU&RVCC5(TPS51427)
25
POWER 1.35VSUS/VTT_MEM
26
POWER +1.05V(G5602R41U)
27
POWER VCC1.5/Thermal
28
POWER(BAT IN / ADA IN/ UL)
29
30
POWER CHARGER (ISL88732)
POWER VGA_CORE/1.0(RT8812A)
31
32
POWER VCC1.5_VRAM/1.05V
33
NVIDIA N14 GB2-64 PCIE 1/4
NVIDIA N14 GB2-64 TMDS 2/4
34
NVIDIA N14 GB2-64 VRAM 3/4
35
NVIDIA N14 GB2-64 VRAM 4/436
IO PORT LIST
37
SMBUS
38
39
Power Table
B
1A
1A
1A
1A
1A
C
D
E
Page Title of schematic page Rev. Date
Power Sequence1A
40 1A
1A
1A
1A
* : No mount
E@ : For DIS GFX
I@ : For UMA
1
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
A
B
C
D
E
FI3 BLOCK
DIAGRAM
5
4
3
2
1
2
X8
D D
X8
X8
X8
USB3.0 PORT3
X8X8
DDR3L-1600
DDR3L-1600
X8
X8
X8
HDD SATA0
USB3.0 PORT2
P18
USB3.0 PORT1
P20
C C
Rear CAMERA
Light Sensor
CM3218
A+M Sensor
LSM303DLHCTR
Gyro Sensor
L3GD20TR
USB3.0 PORT4
I2C
I2C
Sensor HUB
I2C
STM32F103RC
BT
CAMERA
P23
USB2-PORT4
P17
PORT5
P21
PORT7
P17
PORT6
P13
CH-A SO-DIMM
CH-B SO-DIMM
P14
6Gb/s
USB 3.0
USB 2.0
I2C
Intel Shark Bay
Haswell ULT
+
Lynx
Point-LP
BGA1168
(40mm X 24mm)
PCI-E
X4
PCIE3
5GT/s P33 ~ P36
eDP 15"eDP
Nvidia
N14M-LP
(2880x1620)
P17
HDMI
P19
2.5GT/s
PCIE4
PCI-Express Gen1
PCIE3
Giga-LAN
RTL8111GUS-CG
USB BD
RJ45
USB BD
WLAN/BT
Card Reader
P21
VRAM
1GB / 2GB
P33~P36
RTS5227E
SD-XC
PCIE6
USB BD
B B
HD-AUDIO
NFC
P17
SMBUS
SPI
P4~P12
Audio CODEC
ALC233-CG
USB BD
SPK
DMIC
Combo Jack
PCB STACK UP 8L
LAYER 1 : TOP
SPI ROM
8MB
P10
SPI
LPC
LAYER 2 : SGND
A A
LAYER 3 : IN1
LAYER 4 : IN2
LAYER 5 : SVCC
LAYER 6 : IN3
LAYER 7 : SGND
LAYER 8 : BOT
5
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green
Partners.
4
Touch Pad
P18
Keyboard
P15
EC
NPCE985L
P16
PECI
LEDs
Power LED
HDD Status LED
Caps Lock LED
3
Buttons
Power
AssitCharger LED
Volume Up
Volume Down
Windows
Battery Detach
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Date: Sheet
Date: Sheet of
2
Date: Sheet of
PROJECT :
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
FI3
FI3
FI3
240
240
1
240
1C
1C
1C
of
Change List
MB_SCH_DVT_001
P14 Change footprint from 0603 to 0402
Reason : Corresponsive material with R149
Possible Risk: No.
MB_SCH_DVT_002
P9 Change USB port assignment
Reason : Design spec. change
Possible Risk: No.
MB_SCH_DVT_003
P18 Add USB 3.0 and control signal to CON16 .
Reason : Implement Rear camera
Possible Risk: Yes
MB_SCH_DVT_004
P4 Change netname of GPIO 78 from EC_A20GATE to GPIO78
P16 Remove EC_A20GATE
Reason : EC_A20GATE is not necessary and the GPIO for Rear CAM power enable .
Possible Risk: no
D D
MB_SCH_DVT_005
P22 CON9/CON22 change pin assignment
Reason :Change USB2.0 to USB3.0 and implement RTD3 control signal for LAN .
Possible Risk: no
MB_SCH_DVT_006
P9 PCH GPIO29 use for WLAN_PW_EN
Reason :Change the power well of WLAN_PW_EN from sus to DSW. .
Possible Risk: no
MB_SCH_DVT_007
P11 Change GPIO08 for LAN_RST#
P11 PCH GPIO24 use for PCH_LAN_WAKE#
Reason :Implement RTD3 in LAN. .
Possible Risk: no
MB_SCH_DVT_008
P17 Change CON6 USB port assignment and add MODE_LID-2# to pin 12 of CON 6
Reason :USB port assignment change and add mode detection for stand mode .
Possible Risk: no
MB_SCH_DVT_009
P20 Add R24452 without mount for TPS2543 .
Reason :Reserve for TPS2543 .
Possible Risk: no
MB_SCH_DVT_010
P21 Remove D5 .
Reason :for cost down
Possible Risk: no
MB_SCH_DVT_011
P21 change R2442 from unmout to mount
P21 change R2444 from mout to unmount
Reason :Change PLTRST#_WLAN instead of PLTRST for RTD3
Possible Risk: no
MB_SCH_DVT_012
P15 Add serial resistor RP11~RP16 on K/B matrix
Reason :For ESD protection
Possible Risk: no
MB_SCH_DVT_013
P21 Add a AND gate for WLAN power enable
Reason :The power enable of WLAN can be controlled by application .
Possible Risk: no
MB_SCH_DVT_014
C C
P21 Change WLAN_WAKE# PU power well from +3V_S5 to +3V_S5_DSW .
Reason :The signal is belong to" DSW " power well
Possible Risk: no
MB_SCH_DVT_015
P16 Change EC GPIO55 from DRAM_VOLTAGE_SET to SIO_WAKE_GPIO27#
P16 Change EC GPIO84 from NV_ALERT_EC# to EC_WLAN_PWR_EN
Reason :For WLAN iSCT control
Possible Risk: no
MB_SCH_DVT_016
P16 Change EC GPIO32 from IMVP_PWRGD to MODE_LID-2#
P16 add KR28 PU for MODE_LID-2#
Reason :Mode detction for stand mode
Possible Risk: no
MB_SCH_DVT_017
P34 Remove NV_ALERT_EC#
Reason :This signal didn't implement .
Possible Risk: no
MB_SCH_DVT_018
P11 Change PCH GPIO12 as LAN_ISOLATE#
P22 Add LAN_ISOLATE# on pin28 of CON9
Reason :For LAN RTD3.
Possible Risk: no
MB_SCH_DVT_019
P18 Change CON16 from 20 pin to 30 pin connector
MB_SCH_DVT_020
P8 Change Y1 package for Broadwell requirement
MB_SCH_DVT_021
P21 Change CON13 to DFH52M059
MB_SCH_DVT_022
P11 GPIO59 use for R_CAM_ON
MB_SCH_DVT_023
P18 Add Q41
P18 Add Q37,Q38, Q40,R24453,R24454,C2340
P18 add R24456 100K ohm pull down on R_CAM_ON
P18 Change Q24 from DDTC144EUA to 2N7002W
P18 Change Q23 from 2N7002W to 2N7002DW
P18 Remove R2437 0 ohm and R2436 (0 ohm NC)
P18 Add R219,R24455,C2415,C2416,U53
P18 Add F24
MB_SCH_DVT_024
P11 Change HDD_PW_EN from GPIO90 to GPIO13
P11 Change R302 from 10k ohm pull high to 100k ohm pull down
P11 Add R24463 ,R24462 100K pull down for CR_PW_EN and GPU_PW_EN
B B
MB_SCH_DVT_025
P23 add R24457 ,R24458 100K ohm pull down
P23 Remove reserve resistor , R2450 ,R2384
MB_SCH_DVT_026
P17 add R24459 ,R24460,R24461 100K ohm pull down
P17 Remove reserve resistor , R180,R258,R259,R2435,R2434,R2450
MB_SCH_DVT_027
P11 Change R293,R304,R310,R308,R289,R297,R306 from mount to un-mount .
P10 Remove RP4 , Add R24464 10 K ohm for CCD_PWR_EN without mount , add R24465 10K ohm for GPIO11 with mount .
P11 Change R118 from NC to mount
MB_SCH_DVT_028
P4 Change the netname of GPIO77 from EC_EXT_SMI# to GPIO77
P11 Change the netname of GPIO35 from GPIO35 to EC_EXT_SMI#
MB_SCH_DVT_029(2013-05-08)
P16 Add KC16 150 pF without mount
P16 Add KD5
P18 Add C2359 220pF
P18 Change Q21,Q37,Q38 from TPCC8067-H to NTTFS4C10N
P17 Change U5,U18,U26 from G5254T11U to G527ATP11U
P17 Remove R24448 ,R24447,R382 1.9Kohm
P17 Add R24466 ,R24467,R24468 40.2Kohm
P23 Change U29 from G5254T11U to G527ATP11U
P23 Remove R2449 1.9Kohm
P23 Add R24469 40.2Kohm
MB_SCH_DVT_029(2013-05-08)
P18 Add R24470 40.2Kohm
P18 Change U29 from G5254HT11U to G527ATP11U
P18 Remove R24455 1Kohm
MB_SCH_DVT_030(2013-05-09)
P11 Change netname of GPIO47 from GPIO47 to DB_DET
P18 Add Q42 2N7002W
P18 Add Q42 2N7002W
P12 Add C475 0.47uF
P21 Change U27 from TPS2557DRBR to G547E1P81U
P21 Remove R2454 100K ohm
MB_SCH_DVT_031(2013-05-10)
P11 Change netname of GPIO16 from GPIO16 to DB_DET
P12 Change Q8 from 2N7002W to NTTFS4C10N
P14 Change R271, R272, R273, R274, R275, R276, R277 from 10k ohm to 100k ohm
P7 Change R42 from 10k ohm to 100k ohm
P8 Change R278, R279, R280, R280, R281 from 10k ohm to 100k ohm
P9 Change R73, R282 from 10k ohm to 100k ohm
P10 Change R24464(no mount), R24465, R86 from 10k ohm to 100k ohm
P10 Change R283, R285, R300, R315, R313, R317,
R115, R296, R298, R299, R301, R303, R305, R307, R309, R312,
R314, R316(no mount), R318, R319, R320, R293(no mount), R290,
R291, R304(no mount), R294, R310(no mount), R308(no mount),
R284, R112, R288, R311, R292, R287, R295, R116, R117, R118, R119,
R286, R289(no mount), R297(no mount), R114, R122, R306(no mount),
R125(no mount), R126, R127(no mount), R128, R129(no mount), R130,
R131(no mount), R132, R133(no mount), R134, R135(GPU SKU only)
A A
from 10k ohm to 100k ohm
P15 Change KR2, KR4, KR19, KR26, KR27, KR28 from 10k ohm to 100k ohm
P21 Change R24445,R2446 from 10k ohm to 100k ohm
P4 Change R14,R15 from 10k ohm to 100k ohm
MB_SCH_DVT_032(2013-05-14)
P23 Add R24471 100K ohm for SH_ALS_INT#
MB_SCH_DVT_033(2013-05-16)
P15 Change H1,H3,H4 footprint
MB_SCH_DVT_034(2013-05-17)
P23 U29 PIN1 change +3V_SENSORHUB for optional non CS design
P23 R2451 PIN2 change +3V_S5 for optional non CS design
5
5
4
4
3
MB_SCH_DVT_035(2013-05-18)
P23 R2451 mount
P23 change U29 ,C2337,R24469,R2449,R24457 to un-mout
P21 Add R24472 0 ohm
P21 Mount R2444
P21 Un-mount R2446,R24442,Q34,Q35,R2447,U28,R2442,R2443,U30
MB_SCH_DVT_036(2013-05-21)
P11 Mount R310
P18 Mount R2440
P17 CON6 change FP and P/N .
P15 CON4 change FP and P/N .
P21 CON14 change FP and P/N .
P22 CON9 and CON22 change FP and P/N .
MB_SCH_DVT_037(2013-05-28)
P17 Change CON6 Footprint
MB_SCH_DVT_038(2013-05-29)
P22 Change LAN_RST# ,LAN_ISOLATE# , PCH_LAN_WAKE# to CON22
P22 Change CON9 pin define
MB_SCH_DVT_039(2013-05-30)
P7 Add R24475 ,R24476,R24479,R24480 0 ohm
P7 Add C2417,C2418,C2419,C2420 0.1 uF
P7 Add U54,U55 74LVC1G07GW
P7 R24474 ,R24473,R24478,R24477 without mount 0 ohm
P7 Change C49 to mount 680pF from un-mount
P7 Change R41,R44 pull up t0 +3V_S5 from +3V
P22 Change PCH_LAN_WAKE# to pin29 on CON22
P22 Change ACZ_SDOUT to pin28 on CON22
P23 Mount R2359,R2361,R2363,R2365,R2367,R2369 10k ohm
MB_SCH_DVT_040(2013-05-31)
P11 Change R288 to un-mount
P17 Add U56 TC7SH08FU
P17 Add R24481 100K ohm
P9 Add R24482 100K ohm
P9 Add U57 TC7SH08FU
P9 Add C2421 0.1uF
P9 R24483 without mount
P19 Change HR22,HR25 from 2.2Kohm to 4.7k ohm
P19 Change HR20,HR33 from un-mount to mount 4.7k ohm
P34 Change VC78,VC79 from 12pF to 10pF
P23 Change C2300,C2301 from 22pF to 18pF
MB_SCH_DVT_041(2013-06-02)
P18 Change pin 5 and pin 6 of +5V_HDD_+3V_SSD_F to GND on CON16
P18 Change pin 7 of +3V_CCD to GND on CON16
MB_SCH_DVT_042(2013-06-03)
P22 Change F10,F11,F12 Footprint
MB_SCH_DVT_043(2013-06-04)
P20 Add C2432 ,C2433,C2434 0.22uF without mount
P16 Add KR29 100k ohm
P7 Add C2435 3.3pF
P13 Add C2437,C2436 ,C2441 3.3pF
P13 Change C2112 ,C2114 from NC to mount 3.3pF
P14 Change C160,C162 from NC to mount 3.3pF
P14 Add C2438,C2439,C2440 3.3pF
P17 Add C2442,C2443 3.3pF
P18 Add R24484,R24485,R24486,R24487
MB_SCH_DVT_044(2013-06-05)
P21 Change R24441 from mount to un-mount .
P22 Change CON22 from 40 pin to 44pin
P15 Change H7 NUT P/N
MB_SCH_DVT_045(2013-06-07)
P8 Change R59,R60,R61 ,R64,R65,R66 from mount to un-mout .
MB_SCH_DVT_046(2013-06-10)
P18 Change C276 from 220p to 1000p
MB_SCH_DVT_047(2013-06-11)
P11 Change R126 value from 100k_4 to E@100K_4
P11 Change R125 value from *100k_4 to I@100K_4
P29 Change PR167 from 470K/NTC to 680K/NTC for ajusting thermal trigger point
P29 Change PR171 from 6.98K to 0 for ajusting thermal trigger point
MB_SCH_PVT_001(2013-07-07)
P22 Change CON9 From 50281-00301-001 to 50501-03001-001
MB_SCH_PVT_002(2013-07-013)
P08 Add Q46 , R24484 for no power issue(un-mount)
P16 EC GPIO85 add EC_RTC_RST for workaround solution
P17 Change F2 from fast fuse to poly switch fuse .
P07 BOM remove C2417,C2418,C2419,C2420,U54,U55
P07 R40,R24475,R24476,R24479,R24480 change to short pad.
P12 R138,R139 change to short pad.
P13 R161,r163 change to short pad.
P14 R2145 change to short pad.
P16 KL1,KR25,KR18 change to short pad.
P17 Remove F6,C297 ,Add U58,C2444,R24485,R24487,R24486,C2445
P21 R2445 change to short pad.
MB_SCH_PVT_003(2013-07-016)
P24 Change PR24, PR26, PR11, PR7 to short pad.
P25 Change PR43, PR230, PR53, PR45, PR52, PR54, PR36, PR48, PR85 to short pad.
P26 Change PC61 from 0.01uF to NC for E/E request on power sequence.
P26 Del PR100 for layout space saving
P27 Change PR114 to short pad.
P28 Change PR117 to short pad.
P28 Change PR148 from 374K to 330K to fine-tune UVP trigger point.
P30 Add PC134 1000PF
P31 Change VPR11, VPR23, VPR25 to short pad.
P32 Change VPR41 to short pad.
MB_SCH_PVT_004(2013-07-017)
P18 CON18 change FP .
MB_SCH_PVT_005(2013-07-018)
P18 Add R24488 100K ohm
MB_SCH_PVT_006(2013-07-020)
P12 Add C2446,C2447,C2448,C2449,C2450,C2451,C2452,C2453 220 pF for EMI requirement
P04 R2412 change to short pad
P10 R95,r96,R97,R98 change to short pad
P17 R2448 change to short pad
P18 R219 change to short pad
MB_SCH_PVT_007(2013-07-022)
P11 Change R308,R306 from NC to mount .
P17 Change R24459,r24461,C294,C295 from mount to unmount .
P22 Change R262,R264 from 75ohm to 220 ohm
P22 Change R264 from 75ohm to 100 ohm
MB_SCH_PVT_008(2013-07-023)
P17 Add Resever pad D24
P18 Change C276 from 1000pF to 4700pF
MB_SCH_PVT_009(2013-07-024)
P9 Change VC157,VC158,VC159,VC160,VC161,VC162,VC163,VC164 from 0.1u to 0.22u
MB_SCH_PVT_009(2013-07-024)
P25 Change PR38 from 255K to 196K for fine-tuning OCP.
MB_SCH_PVT_010(2013-07-026)
P22 Change R261 from 470ohm to 120 ohm
P22 Change R263 from 75ohm to 220 ohm
MB_SCH_PVT_011(2013-07-30)
P17 Change C2331 and C2333 from 1uF to 2.2uF
P17 Change C2332 from 0.1uF to 2.2uF
MB_SCH_PVT_012(2013-08-04)
P19 Change HR33 ,R228,R229,R24450,R24451 to NC .
P19 Change R28 to 42.2K ,change R212 to 17.8K ,change R204 to 60.4k , change R210
to 24.9K , change R216 to 76.8K , change R218 to 32.4k
P17 Change C2442,C220,C2443 to 10u and change C228 to mount 22uF from NC .
MB_SCH_PVT-1_001(2013-08-06)
P17 Change F2 fuse type from poly switch to fast fuse --considering cable burn out issue .
P10 Add damping resistor R24489,R24490,R24491,R24492,R24493 on LPC bus : solve siganl overshoot and undershoot issue
MB_SCH_PVT-1_002(2013-08-09)
P15 Remove D21 and D23 , H3 and H6 connect to GND for EMI request .
MB_SCH_PVT-1_003(2013-08-15)
P8 Correct Q46 connection.
P23 Remove C2308,C2309,C2310,C2312,R2390,R2392,C2315,U23 --E-compass move to LED BD
P23 Add CON27
MB_SCH_PVT-1_004(2013-08-18)
P17 Change CON6 pin 11 from MODE_LID# to +LCDVCC for Backup solution of OFHD panel
P17 Add R24494
P17 Remove MOD_LID# and reserve it in EC
MB_SCH_PVT-1_005(2013-08-21)
P8 Change Q46/R24484 from um-mount to mount
MB REV. E
MB_SCH_PVT-2_001(2013-08-23)
P17 reserve R24495,R24496,R24497 to co-lay LVDS power switch between GMT and UPI
MB_SCH_PVT-2_002(2013-08-30)
P17 Change VIN source of U6 from +3V to +3V_WAKE
P17 R24497/R24495 : NC , R24496 mount
MB_SCH_PVT-3_002(2013-09-16)
P11 Change R315 from mount to un-mount
MB_SCH_PVT-3_004(2013-09-22)
P17 Change U6 from G5243 to BCD AP22802
MB_SCH_PVT-3_005(2013-10-08)
P34 Add VRAM ID for Micron VRAM
3
2
Size Document Number Rev
Size Document Number Rev
2
Size Document Number Rev
Change List
Change List
Change List
Tuesday, Octo ber 08 , 201 3
Tuesday, Octo ber 08 , 201 3
Tuesday, Octo ber 08 , 201 3
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
FI3
FI3
FI3
340
340
340
3
1C
1C
1C
5
INT. HDMI
INT_ HDMI_T XDN219
INT_ HDMI_T XDP219
INT_ HDMI_T XDN119
INT_ HDMI_T XDP119
INT_ HDMI_T XDN019
INT_ HDMI_T XDP019
INT_ HDMI_T XCN19
+1.05V
INT_ HDMI_T XCP19
C312 47P/50V/NPO_4
R8 62_4
3
2
2N7002W(SOT323)
1
D D
C C
H_PROCHOT#24,28
PROCHOT16
C1 0.1U/10V/X5R_4
C2 0.1U/10V/X5R_4
C3 0.1U/10V/X5R_4
C4 0.1U/10V/X5R_4
C5 0.1U/10V/X5R_4
C6 0.1U/10V/X5R_4
C7 0.1U/10V/X5R_4
C8 0.1U/10V/X5R_4
12
R9 56_4
R10 10K_4
Q1
R11 200/F_4
R12 121/F_4
R13 100/F_4
SM_DRAMRST#13
DDR_PG_CTRL14
1 2
EC_PECI16
CPU_PROCHOT#
H_CPUPWRGD
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
HDMI_TXDN2_C
HDMI_TXDP2_C
HDMI_TXDN1_C
HDMI_TXDP1_C
HDMI_TXDN0_C
HDMI_TXDP0_C
HDMI_TXCN_C
HDMI_TXCP_C
TP147
TP148
DDR_PG_CTRL
4
Haswell ULT (DISPLAY)
U1A
C54
C55
B58
C58
B55
A55
A57
B57
C51
C50
C53
B54
C49
B50
A53
B53
DDI1_TXN0
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
DDI1_TXN3
DDI1_TXP3
DDI2_TXN0
DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3
D61
K61
N62
K63
C61
AU60
AV60
AU61
AV15
AV61
U1B
PROC_DETECT
CATERR
PECI
PROCHOT
PROCPWRGD
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_DRAMRST
SM_PG_CNTL1
EDPDDI
MISC
THERMAL
PWR
DDR3L
DSW
EDP_AUXN
EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
JTAG
C45
B46
A47
B47
C47
C46
A49
B49
A45
B45
D20
A43
PROC_TRST
PRDY
PREQ
PROC_TCK
PROC_TMS
PROC_TDI
PROC_TDO
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
3
EDP_COMP
J62
K62
E60
E61
E59
F63
F62
J60
H60
H61
H62
K59
H63
K60
J61
EDP_TX0# 17
EDP_TX0 17
EDP_TX1# 17
EDP_TX1 17
EDP_TX2# 17
EDP_TX2 17
EDP_TX3# 17
EDP_TX3 17
EDP_AUX# 17
EDP_AUX 17
R6 24.9/F_4
R2411 *0_4
XDP_TCK0
XDP_TMS_CPU
XDP_TRST_CPU_N
XDP_TDI_CPU
XDP_TDO_CPU
+VCCIOA_OUT
INT_ LVDS_ BRIGHTDP_UTIL
2
XDP_TDO_CPU
XDP_TDI_CPU
XDP_TMS_CPU
XDP_TCK0
XDP_TRST_CPU_N
1
4
+1.05V
R1 51/F_4
R2 *51_4
R3 *51_4
R4 51/F_4
R5 51_4
R12 change to 121 ohm from 120 ohm /2013-0312
B B
EDP_BKLCTL: abnormal 2V when power on.
INT_ LVDS_ BRIGHT17
R2412 *Short_4
INT_ LVDS_ BLON16
INT_ LVDS_ VDDEN17
LCD_PWM
EVT-2013-05-06
PVT
GPIO77
GPIO78
+3V
R271 100K_4
CR_RST#22
R272 100K_4
+3V
CR_RST#
GPIO80
GPIO79
R273 100K_4
+3V
A A
+3V
R275 100K_4
CR_WAKE#22
R274 100K_4
+3V
+3V
+3V
R276 100K_4
R277 100K_4
GPIO55
GPIO52
CR_WAKE#
GPIO51
GPIO53
AD4
B8
A9
C6
U6
P4
N4
N2
U7
L1
L3
R5
L4
U1I
EDP_BKLCTL
EDP_BKLEN
EDP_VDDEN
PIRQA/GPIO77
PIRQB/GPIO78
PIRQC/GPIO79
PIRQD/GPIO80
PME
GPIO55
GPIO52
GPIO54
GPIO51
GPIO53
+3V
+3V
+3V
+3V
+3V
eDP
SIDEBAND
+3V
+3V
+3V
+3V
PCIE
DISPLAY
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
B9
C9
D9
D11
C5
B6
B5
A6
C8
A8
D6
INT_ HDMI_S CL 19
INT_ HDMI_S DA 19
INT_ HDMI_H PD_Q 19
EDP_HPD 17
EVT-2013-05-02
EVT-2013-05-06
GPIO78
GPIO77
EVT_2013-05-10
R14 100K_4
R15 100K_4
+3V
GPIO54
Quanta Computer Inc.
Quanta Computer Inc.
2013-03-18
Size Document Number Rev
Size Document Number Rev
1.Level 1 Environment-related Substances Should Never be Used.
5
4
3
2.Recycled Resin and Coated Wire should be procured from Green Partners.
2
Size Document Number Rev
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Date: Sheet of
Date: Sheet of
Date: Sheet of
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
HSW MCP(Display/eDP)
HSW MCP(Display/eDP)
HSW MCP(Display/eDP)
FI3
FI3
FI3
440
440
440
1
1C
1C
1C
5
SA_CLK0
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0
SA_BA1
SA_BA2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
Haswell ULT (DDR3L)
AU37
AV37
AW36
AY36
AU43
AW43
AY42
AY43
AP33
AR32
AP32
AY34
AW34
AU34
AU35
AV35
AY41
AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
AP49
AR51
AP51
M_A_CLKN0
M_A_CLKP0
M_A_CLKN1
M_A_CLKP1
M_A_CKE0
M_A_CKE1
M_A_CS#0
M_A_CS#1
M_A_ODT0_CPU
M_A_RAS#
M_A_WE#
M_A_CAS#
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQSN0
M_A_DQSN1
M_B_DQSN0
M_B_DQSN1
M_A_DQSN2
M_A_DQSN3
M_B_DQSN2
M_B_DQSN3
M_A_DQSP0
M_A_DQSP1
M_B_DQSP0
M_B_DQSP1
M_A_DQSP2
M_A_DQSP3
M_B_DQSP2
M_B_DQSP3
M_A_CLKN0 13
M_A_CLKP0 13
M_A_CLKN1 13
M_A_CLKP1 13
M_A_CKE0 13
M_A_CKE1 13
M_A_CS#0 13
M_A_CS#1 13
TP26
M_A_RAS# 13
M_A_WE# 13
M_A_CAS# 13
M_A_BS#0 13
M_A_BS#1 13
M_A_BS#2 13
M_A_A[15:0] 13
SM_VREF_CA 14
SM_VREF_DQ0 13
SM_VREF_DQ1 14
M_A_DQSN[7:0] 13
M_A_DQSP[7:0] 13
M_A_DQ[63:0] 13
U1C
AH63
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
D D
C C
B B
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
AW58
AW56
AW54
AW52
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AY56
AV58
AU58
AV56
AU56
AY54
AY52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_CLK#0
SA_CLK#1
DDR CHANNEL A
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
4
M_B_DQ[63:0] 14
U1D
AY31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AW31
AW29
AW27
AW25
AM29
AM26
AW23
AW21
AW19
AW17
AM22
AM20
AY29
AV31
AU31
AV29
AU29
AY27
AY25
AV27
AU27
AV25
AU25
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AK25
AL25
AY23
AY21
AV23
AU23
AV21
AU21
AY19
AY17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AR18
AP18
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
DDR CHANNEL
B
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0
SB_BA1
SB_BA2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
AM38
AN38
AK38
AL38
AY49
AU50
AW49
AV50
AM32
AK32
AL32
AM35
AK35
AM33
AL35
AM36
AU49
AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46
AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
3
M_B_CLKN0
M_B_CLKP0
M_B_CLKN1
M_B_CLKP1
M_B_CKE0
M_B_CKE1
M_B_CS#0
M_B_CS#1
M_B_ODT0_CPU
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_A_DQSN4
M_A_DQSN5
M_B_DQSN4
M_B_DQSN5
M_A_DQSN6
M_A_DQSN7
M_B_DQSN6
M_B_DQSN7
M_A_DQSP4
M_A_DQSP5
M_B_DQSP4
M_B_DQSP5
M_A_DQSP6
M_A_DQSP7
M_B_DQSP6
M_B_DQSP7
M_B_RAS#
M_B_WE#
M_B_CAS#
M_B_CLKN0 14
M_B_CLKP0 14
M_B_CLKN1 14
M_B_CLKP1 14
M_B_CKE0 14
M_B_CKE1 14
M_B_CS#0 14
M_B_CS#1 14
TP27
M_B_RAS# 14
M_B_WE# 14
M_B_CAS# 14
M_B_BS#0 14
M_B_BS#1 14
M_B_BS#2 14
M_B_A[15:0] 14
M_B_DQSN[7:0] 14
M_B_DQSP[7:0] 14
AA58
AB10
AB20
AB22
AC61
AD21
AD63
AE10
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29
2
U1N
A11
VSS
A14
VSS
A18
VSS
A24
VSS
A28
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
VSS
A52
VSS
A56
VSS
AA1
VSS
VSS
VSS
VSS
VSS
AB7
VSS
VSS
VSS
AD3
VSS
VSS
VSS
AE5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ35
VSS
AJ39
VSS
AJ41
VSS
AJ43
VSS
AJ45
VSS
AJ47
VSS
AJ50
VSS
AJ52
VSS
AJ54
VSS
AJ56
VSS
AJ58
VSS
AJ60
VSS
AJ63
VSS
AK23
VSS
AK3
VSS
AK52
VSS
AL10
VSS
AL13
VSS
AL17
VSS
AL20
VSS
AL22
VSS
AL23
VSS
AL26
VSS
AL29
VSS
AL31
VSS
AL33
VSS
AL36
VSS
AL39
VSS
AL40
VSS
AL45
VSS
AL46
VSS
AL51
VSS
AL52
VSS
AL54
VSS
AL57
VSS
AL60
VSS
AL61
VSS
AM1
VSS
AM17
VSS
AM23
VSS
AM31
VSS
AM52
VSS
AN17
VSS
AN23
VSS
AN31
VSS
AN32
VSS
AN35
VSS
AN36
VSS
AN39
VSS
AN40
VSS
AN42
VSS
AN43
VSS
AN45
VSS
AN46
VSS
AN48
VSS
AN49
VSS
AN51
VSS
AN52
VSS
AN60
VSS
AN63
VSS
AN7
VSS
AP10
VSS
AP17
VSS
AP20
VSS
HSW ULT(GND)
U1O
AP22
VSS
AP23
VSS
AP26
VSS
AP29
VSS
AP3
VSS
AP31
VSS
AP38
VSS
AP39
VSS
AP48
VSS
AP52
VSS
AP54
VSS
AP57
VSS
AR11
VSS
AR15
VSS
AR17
VSS
AR23
VSS
AR31
VSS
AR33
VSS
AR39
VSS
AR43
VSS
AR49
VSS
AR5
VSS
AR52
VSS
AT13
VSS
AT35
VSS
AT37
VSS
AT40
VSS
AT42
VSS
AT43
VSS
AT46
VSS
AT49
VSS
AT61
VSS
AT62
VSS
AT63
VSS
AU1
VSS
AU16
VSS
AU18
VSS
AU20
VSS
AU22
VSS
AU24
VSS
AU26
VSS
AU28
VSS
AU30
VSS
AU33
VSS
AU51
VSS
AU53
VSS
AU55
VSS
AU57
VSS
AU59
VSS
AV14
VSS
AV16
VSS
AV20
VSS
AV24
VSS
AV28
VSS
AV33
VSS
AV34
VSS
AV36
VSS
AV39
VSS
AV41
VSS
AV43
VSS
AV46
VSS
AV49
VSS
AV51
VSS
AV55
VSS
AU44
AV44
U1P
D33
VSS
D34
VSS
D35
VSS
D37
VSS
D38
VSS
D39
VSS
D41
VSS
D42
VSS
D43
VSS
D45
VSS
D46
VSS
D47
VSS
D49
VSS
D5
VSS
D50
VSS
D51
VSS
D53
VSS
D54
VSS
D55
VSS
D57
VSS
D59
VSS
D62
VSS
D8
VSS
E11
VSS
E17
VSS
F20
VSS
F26
VSS
F30
VSS
F34
VSS
F38
VSS
F42
VSS
F46
VSS
F50
VSS
F54
VSS
F58
VSS
F61
VSS
G18
VSS
G22
VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS
H13
VSS
U1R
AT2
RSVD
RSVD
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
AV59
VSS
AV8
VSS
AW16
VSS
AW24
VSS
AW33
VSS
AW35
VSS
AW37
VSS
AW4
VSS
AW40
VSS
AW42
VSS
AW44
VSS
AW47
VSS
AW50
VSS
AW51
VSS
AW59
VSS
AW60
VSS
AY11
VSS
AY16
VSS
AY18
VSS
AY22
VSS
AY24
VSS
AY26
VSS
AY30
VSS
AY33
VSS
AY4
VSS
AY51
VSS
AY53
VSS
AY57
VSS
AY59
VSS
AY6
VSS
B20
VSS
B24
VSS
B26
VSS
B28
VSS
B32
VSS
B36
VSS
B4
VSS
B40
VSS
B44
VSS
B48
VSS
B52
VSS
B56
VSS
B60
VSS
C11
VSS
C14
VSS
C18
VSS
C20
VSS
C25
VSS
C27
VSS
C38
VSS
C39
VSS
C57
VSS
D12
VSS
D14
VSS
D18
VSS
D2
VSS
D21
VSS
D23
VSS
D25
VSS
D26
VSS
D27
VSS
D29
VSS
D30
VSS
D31
VSS
VSS_SENS E
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
1
5
H17
VSS
H57
VSS
J10
VSS
J22
VSS
J59
VSS
J63
VSS
K1
VSS
K12
VSS
L13
VSS
L15
VSS
L17
VSS
L18
VSS
L20
VSS
L58
VSS
L61
VSS
L7
VSS
M22
VSS
N10
VSS
N3
VSS
P59
VSS
P63
VSS
R10
VSS
R22
VSS
R8
VSS
T1
VSS
T58
VSS
U20
VSS
U22
VSS
U61
VSS
U9
VSS
V10
VSS
V3
VSS
V7
VSS
W20
VSS
W22
VSS
Y10
VSS
Y59
VSS
Y63
VSS
V58
VSS
AH46
VSS
V23
VSS
E62
AH16
VSS
N23
R23
T23
U10
AL1
AM11
AP7
AU10
AU15
AW14
AY14
VSS_SENS E 24
100/F_4
R17
U1Q
DC_TEST_B62_B63
DC_TEST_C1_C2
2
AY2
DAISY_CHAIN_NCTF_AY2
AY3
DAISY_CHAIN_NCTF_AY3
AY60
DAISY_CHAIN_NCTF_AY60
AY61
DAISY_CHAIN_NCTF_AY61
AY62
DAISY_CHAIN_NCTF_AY62
B2
DAISY_CHAIN_NCTF_B2
B3
DAISY_CHAIN_NCTF_B3
B61
DAISY_CHAIN_NCTF_B61
B62
DAISY_CHAIN_NCTF_B62
B63
DAISY_CHAIN_NCTF_B63
C1
DAISY_CHAIN_NCTF_C1
C2
DAISY_CHAIN_NCTF_C2
DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4
DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62
DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3
DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
TP_DC_TEST_AY60
TP29
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
TP_DC_TEST_B2
TP145
DC_TEST_A3_B3
DC_TEST_A61_B61
A A
1.Level 1 Environment-related Substances Should Never be Used.
5
4
3
2.Recycled Resin and Coated Wire should be procured from Green Partners.
A3
DC_TEST_A3_B3
A4
TP_DC_TEST_A4
A60
TP_DC_TEST_A60
A61
DC_TEST_A61_B61
A62
TP_DC_TEST_A62
AV1
TP_DC_TEST_AV1
AW1
TP_DC_TEST_AW 1
AW2
DC_TEST_AY2_AW2
AW3
DC_TEST_AY3_AW3
AW61
DC_TEST_AY61_AW61
AW62
DC_TEST_AY62_AW62
AW63
TP_DC_TEST_AW 63
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Tuesday, October 08 , 2013
Tuesday, October 08 , 2013
Tuesday, October 08 , 2013
Date: Sheet of
Date: Sheet of
PROJECT :
HSW MCP(Memory)
HSW MCP(Memory)
HSW MCP(Memory)
1
TP28
TP30
TP32
TP33
TP34
TP35
FI3
FI3
FI3
of
540
540
540
1C
1C
1C
5
4
3
2
1
U1S
AC60
CFG0
CFG1
TP38
TP41
TP42
TP43
D D
C C
TP47
TP48
TP49
TP50
TP51
TP52
TP53
TP54
TP55
R19 49.9/F_4
R20 8.2K/F_4
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
NOA_STBN_0
NOA_STBN_1
NOA_STBP_0
NOA_STBP_1
NOA_RCOMP
TD_IREF
AC62
AC63
AA63
AA60
AA62
AA61
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60
U63
U62
V63
H18
B12
A5
E1
D1
J20
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG18
CFG17
CFG19
CFG_RCOMP
RSVD
RSVD
RSVD
RSVD
RSVD
TD_IREF
RESERVED
PROC_OPI_RCOMP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
RSVD
RSVD
AV63
AU63
C63
C62
B43
A51
B51
L60
N60
W23
Y22
AY15
AV62
D58
P22
N21
P20
R20
PROC_OPI_COMP
R18 49.9/F_4
6
Processor Strapping
1
CFG0
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1
PCH/ PCH LESS MODE
SELECTION
CFG3
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
B B
CFG4
DISPLAY PORT PRESENCE STRAP
CFG 8
ALLOW THE USE OF NOA
ON LOCKED UNITS
CFG9
NO SVID PROTOCOL CAPABLE VR
CONNECTED
(DEFAULT) NORMAL OPERATION; NO STALL STALL
(DEFAULT) NORMAL OPERATION
DISABLED
DISABLED
NO PHYSICAL DISPLAY PORT ATTACHED TO
EMBEDDED DISPLAY PORT
DISABLED(DEFAULT); IN THIS CASE,
NOA WILL BE DISABLED IN LOCKED
UNITS AND ENABLED IN UN-LOCKED
UNITS
VRS SUPPORTING SVID PROTOCOL ARE
PRESENT
PCH-LESS MODE
ENABLED
SET DFX ENABLED BIT IN DEBUG
INTERFACE MSR
ENABLED; NOA WILL BE AVAILABLE
REGARDLESS OF THE LOCKING OF
THE UNIT
ENABLED
AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED
TO THE EMBEDDED DISPLAY PORT
NO VR SUPPORTING SVID IS PRESENT. THE
CHIP WILL NOT GENERATE (OR RESPOND TO)
SVID ACTIVITY
0
CFG0
R21 *1K_4
CFG1
R22 *1K_4
CFG3
R23 *1K_4
CFG4
R24 1K_4
CFG8
R25 *1K_4
CFG9
R26 *1K_4
CFG10
SAFE
MODE
BOOT
A A
5
POWER FEATURES ACTIVATED
DURING RESET
4
POWER FEATURES (ESPECIALLY CLOCK
GATINE ARE NOT ACTIVATED
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green
3
Partners.
CFG10
2
R27 *1K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Date: Sheet of
Date: Sheet of
PROJECT :
HSW MCP(CFG)
HSW MCP(CFG)
HSW MCP(CFG)
FI3
FI3
FI3
640
640
640
1
of
1C
1C
1C
5
+1.35V_SUS
D D
VR_EN(1.05V): Output to disable VR in C10
VR_Ready(1.05v):
C C
2.2uF *4
10uF *6
C2435 3.3p/50V/NPO_4
C11 10/u/6.3V/X5R_6
C13 10/u/6.3V/X5R_6
C15 10/u/6.3V/X5R_6
C17 10/u/6.3V/X5R_6
C19 10/u/6.3V/X5R_6
C21 10/u/6.3V/X5R_6
C24 2.2u/6.3V/X5R_4
C26 2.2u/6.3V/X5R_4
C28 2.2u/6.3V/X5R_4
C30 2.2u/6.3V/X5R_4
+VCC_CORE
H_VR_ENABLE_MCP24
+V1.05S_VCCST
VCCST_PWRGD(O/D Input):
VCC/VDDQ/CLK stable
VCC_SENSE24
R39 150/F_4
PVT
+1.05V
DVT
+1.35V_SUS
(VDDQ : 4.2A)
+VCC_CORE
R35 100/F_4
TP90
+VCCIO_OUT
+VCCIOA_OUT
H_CPU_SVIDALRT_N
VR_SVID_CLK
VR_SVID_DATA
VCCST_PWRGD
R36 10K_4
FIVR_EN_BUF
+V1.05S_VCCST
1 2
R40 *short_6
+VCC_CORE
VR_READY
4
Haswell ULT MCP(POWER)
U1L
L59
RSVD
J58
RSVD
AH26
VDDQ
AJ31
VDDQ
AJ33
VDDQ
AJ37
VDDQ
AN33
VDDQ
AP43
VDDQ
AR48
VDDQ
AY35
VDDQ
AY40
VDDQ
AY44
VDDQ
AY50
VDDQ
F59
VCC
N58
RSVD
AC58
RSVD
E63
VCC_SENSE
AB23
RSVD
A59
VCCIO_OUT
E20
VCCIOA_OUT
AD23
AA23
AE59
AD60
AD59
AA59
AE60
AC59
AG58
AC22
AE22
AE23
AB57
AD57
AG57
L62
N63
L63
B59
F60
C59
D63
H59
P62
P60
P61
N59
N61
T59
U59
V59
C24
C28
C32
RSVD
RSVD
RSVD
VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY
VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCST
VCCST
VCCST
VCC
VCC
VCC
VCC
VCC
VCC
HSW ULT
POWER
+VCC_CORE
Haswell ULT 15W : 32A
C36
VCC
C40
VCC
C44
VCC
C48
VCC
C52
VCC
C56
VCC
E23
VCC
E25
VCC
E27
VCC
E29
VCC
E31
VCC
E33
VCC
E35
VCC
E37
VCC
E39
VCC
E41
VCC
E43
VCC
E45
VCC
E47
VCC
E49
VCC
E51
VCC
E53
VCC
E55
VCC
E57
VCC
F24
VCC
F28
VCC
F32
VCC
F36
VCC
F40
VCC
F44
VCC
F48
VCC
F52
VCC
F56
VCC
G23
VCC
G25
VCC
G27
VCC
G29
VCC
G31
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
23 X 22UF(0805 MLCC)
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
3
C9 22u/6.3V/X5R_6
C10 22u/6.3V/X5R_6
C14 22u/6.3V/X5R_6
C16 *22u/6.3V/X5R_6
C18 22u/6.3V/X5R_6
C20 22u/6.3V/X5R_6
C22 22u/6.3V/X5R_6
C23 *22u/6.3V/X5R_6
C25 22u/6.3V/X5R_6
C27 22u/6.3V/X5R_6
C29 22u/6.3V/X5R_6
C31 22u/6.3V/X5R_6
C32 22u/6.3V/X5R_6
C33 *22u/6.3V/X5R_6
C34 22u/6.3V/X5R_6
C35 *22u/6.3V/X5R_6 R33
C36 *22u/6.3V/X5R_6
C37 22u/6.3V/X5R_6
C38 22u/6.3V/X5R_6
C39 22u/6.3V/X5R_6
C40 22u/6.3V/X5R_6
C41 22u/6.3V/X5R_6
C42 22u/6.3V/X5R_6
C43 *22u/6.3V/X5R_6
C44 22u/6.3V/X5R_6
C45 22u/6.3V/X5R_6
C46 22u/6.3V/X5R_6
C47 22u/6.3V/X5R_6
C48 *22u/6.3V/X5R_6
H_CPU_SVIDALRT_N
close to CPU
+1.05V
12
R31
130_4
2
SVID ALERT
close to CPU
R30 43_4C12 22u/6.3V/X5R_6
VR_SVID_DATA
+1.05V
VR_SVID_CLK
+1.05V
SVID DATA
close to VR
R37
54.9_4
R28
75_4
+1.05V
12
1
7
VR_SVID_ALERT# 24
close to VR
130_4
VR_SVID_DATA 24
VR_SVID_CLK 24
DVT DVT
+3V_S5
R41
C2417
*0.1U/10V_4
100K_4
215
4 3
U54
1
2
IN
GND3OUT
*74LVC1G07GW
VCC5NC
6
+3V_S5
4
VCCST_PWRGD_C
Q2
2N7002DW
C2418
*0.1U/10V_4
PVT
R24476 *short_4
R24473 *0_4
PVT
EC_PWROK9,16
B B
R24475 *SHORT_4
R24474 *0_4
+V1.05S_VCCST
EVT_2013-05-10
R42
100K_4
VCCST_PWRGD
C49
680p/50V/X5R_4
+3V
+3V_S5
PVT
IMVP_P WR GD24
R24479 *short_4
PVT
R24478 *0_4
C2419
*0.1U/10V_4
R43
100K_4
U55
1
2
IN
GND3OUT
*74LVC1G07GW
R44
100K_4
VR_READY_C VR_READY
6
215
Q3
2N7002DW
4 3
+3V_S5
C2420
*0.1U/10V_4
VCC5NC
4
PVT
R24480 *short_4
R24477 *0_4
PVT
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
1.Level 1 Environment-related Substances Should Never be Used.
5
4
3
2.Recycled Resin and Coated Wire should be procured from Green Partners.
2
Size Document Number Rev
Date: Sheet
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Date: Sheet of
Date: Sheet of
PROJECT :
HSW MCP(Power)
HSW MCP(Power)
HSW MCP(Power)
FI3
FI3
FI3
740
740
740
1
1C
1C
1C
of
5
Haswell ULT (RTC, HDA, JTAG, SATA)
U1E
RTC_X1
RTC_X2
+3V_RTC
+3V_RTC
D D
ACZ_BITCLK22
ACZ_SYNC22
ACZ_RST#22
ACZ_SDIN022
ACZ_SDOUT22
ACZ_SDOUT_R16
C C
R45 1M_4
R46 330K_4
R47 33_4
R48 33_4
R49 33_4
R50 33_4
R51 *51__4
R52 51__4
SM_INTRUDER#
PCH_INTVRMEN
SRTC_RST#
RTC_RST#
HDA_BITCLK_C
HDA_SYNC_C
HDA_RST#_C
ACZ_SDOUT_R
PCH_TRST
PCH_XDP_TCK1
XDP_TDI
PCH_JTAG_TDO
XDP_TMS
PCH_JTAGX
AW5
RTCX1
AY5
RTCX2
AU6
INTRUDER
AV7
INTVRMEN
AV6
SRTCRST
AU7
RTCRST
AW8
HDA_BCLK/I2S0_SCLK
AV11
HDA_SYNC/I2S0_SFRM
AU8
HDA_RST/I2S_MCLK
AY10
HDA_SDI0/I2S0_RX D
AU12
HDA_SDI1/I2S1_RX D
AU11
HDA_SDO/I2S0_TXD
AW10
HDA_DOCK_EN/I2S1_T XD
AV10
HDA_DOCK_RST/I2S1_ SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
RTC
4
3
2
1
8
RSVD
RSVD
SATALED
J5
H5
B15
A15
J8
H8
A17
B17
J6
H6
B14
C15
F5
E5
C17
D17
V1
U1
V6
AC1
A12
L11
K10
C12
U3
PCIE_TXN6_C
PCIE_TXP6_C
GPIO34
EC_EXT_SMI#
GPIO36
GPIO37
SATA_RCOMP
SATA_ACT# 22
C63 0.1u/10V/X5R_4
C64 0.1u/10V/X5R_4
R278 100K_4
R280 100K_4
R281 100K_4
1 2
R54 3.01K/F_4
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
AUDIO
JTAG
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1
SATA
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
+3V
SATA0GP/GPIO34
+3V
SATA1GP/GPIO35
+3V
SATA2GP/GPIO36
+3V
SATA3GP/GPIO37
SATA_RCOMP
SATA_IREF
+3V
+3V
+3V
SATA_RXN0 18
SATA_RXP0 18
SATA_TXN0 18
SATA_TXP0 18
PCIE_RXN6 22
PCIE_RXP6 22
PCIE_TXN6 22
PCIE_TXP6 22
EC_EXT_SMI# 16
R279 100K_4
+V1.05S_ASATA3PLL
HDD
Card Reader
+3V
EVT-2013-05-06
EVT-2013-04-29
R61
*210/F_4
R66
*100/F_4
RTC_X1
R55
10M_4
RTC_X2
MP remove(Intel)
PCH_JTAG_TDO
XDP_TMS
XDP_TDI
PCH_JTAGX
DVT
+3VPCU
+3V_RTC_1
R62
1K_4
20MIL
12
CON1
AAA-BAT-054-K01
2 1
D1 DA2J10100L
2 3
D2 BAS70
20MIL
1u/6.3V/X5R_4
C58
+3V_RTC
RTC Power trace width 20mils.
R56 20K/F_4
R57 20K/F_4
C56
1u/6.3V/X5R_4
RTC_RST#
SRTC_RST#
C57
1u/6.3V/X5R_4
12
J1
*SHORT_ PAD1
PVT
Q46
3
2
EC_RTC_RST
2N7002W(SOT323)
1
MP
R24484
100K_4
EC_RTC_RST 16
C54 15P/50V/_4
C55 15P/50V/_4
41
Y1
32.768KHZ
2 3
R324 0_4
PCH JTAG Debug (CLG)
R58
*210/F_4
R63
*100/F_4
+3V_S5
R59
*210/F_4
R64
*100/F_4
R60
*210/F_4
R65
*100/F_4
B B
2013-0323
PCH Strap Table
Pin Name Strap description
A A
SPKR
HDA_SDO
INTVRMEN
No reboot mode setting PWROK
Flash Descriptor Security
Override / Intel ME Debug
Mode
Integrated 1.05V VRM enable ALWAYS
5
Sampled
PWROK
Configuration note
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = Security Effect (Int PD)
1 = Can be Override
Should be always pull-up
4
+3V
R67 *1K_4
SPKR 11,22
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
1.Level 1 Environment-related Substances Should Never be Used.
3
2.Recycled Resin and Coated Wire should be procured from Green Partners.
2
Size Document Number Rev
Date: Sheet
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Date: Sheet of
Date: Sheet of
PROJECT :
HSW PCH(RTC/HDA/SATA)
HSW PCH(RTC/HDA/SATA)
HSW PCH(RTC/HDA/SATA)
FI3
FI3
FI3
840
840
840
1
1C
1C
1C
of
5
PVT
PEG_RXN033
PEG_RXP033
PEG_TXN033
PEG_TXP033
PEG_RXN133
D D
PEG
WiFi/BT NGFF
LAN
C C
USB3.0 Port 3
Rear Camera
PEG_RXP133
PEG_TXN133
PEG_TXP133
PEG_RXN233
PEG_RXP233
PEG_TXN233
PEG_TXP233
PEG_RXN333
PEG_RXP333
PEG_TXN333
PEG_TXP333
PCIE_RXN321
PCIE_RXP321
PCIE_TXN321
PCIE_TXP321
PCIE_RXN422
PCIE_RXP422
PCIE_TXN422
PCIE_TXP422
USB3_RX3-22
USB3_RX3+22
USB3_TX3-22
USB3_TX3+22
USB3_RX4-18
USB3_RX4+18
USB3_TX4-18
USB3_TX4+18
VC157 E@0.22U/10V/X5R_4
VC158 E@0.22U/10V/X5R_4
VC159 E@0.22U/10V/X5R_4
VC160 E@0.22U/10V/X5R_4
VC161 E@0.22U/10V/X5R_4
VC162 E@0.22U/10V/X5R_4
VC163 E@0.22U/10V/X5R_4
VC164 E@0.22U/10V/X5R_4
C59 0.1u/10V/X5R_4
C60 0.1u/10V/X5R_4
C61 0.1u/10V/X5R_4
C62 0.1u/10V/X5R_4
PEG_TXN0_C
PEG_TXP0_C
PEG_TXN1_C
PEG_TXP1_C
PEG_TXN2_C
PEG_TXP2_C
PEG_TXN3_C
PEG_TXP3_C
PCIE_TXN3_C
PCIE_TXP3_C
PCIE_TXN4_C
PCIE_TXP4_C
EVT-2013-04-23
+V1.05S_AUSB3PLL
1 2
R69 3.01K/F_4
1 2
R70 0_4
PCIE_RCOMP
PCIE_IREF
4
Haswell ULT (PCIE,USB)
U1K
F10
PERN5_L0
E10
PERP5_L0
C23
PETN5_L0
C22
PETP5_L0
F8
PERN5_L1
E8
PERP5_L1
B23
PETN5_L1
A23
PETP5_L1
H10
PERN5_L2
G10
PERP5_L2
B21
PETN5_L2
C21
PETP5_L2
E6
PERN5_L3
F6
PERP5_L3
B22
PETN5_L3
A21
PETP5_L3
G11
PERN3
F11
PERP3
C29
PETN3
B30
PETP3
F13
PERN4
G13
PERP4
B29
PETN4
A29
PETP4
G17
PERN1/USB3RN3
F17
PERP1/USB3RP3
C30
PETN1/USB3TN3
C31
PETP1/USB3TP3
F15
PERN2/USB3RN4
G15
PERP2/USB3RP4
B31
PETN2/USB3TN4
A31
PETP2/USB3TP4
E15
RSVD
E13
RSVD
A27
PCIE_RCOMP
B27
PCIE_IREF
PCIE
USB
USBRBIAS
OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43
USB2N0
USB2P0
USB2N1
USB2P1
USB2N2
USB2P2
USB2N3
USB2P3
USB2N4
USB2P4
USB2N5
USB2P5
USB2N6
USB2P6
USB2N7
USB2P7
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USBRBIAS
RSVD
RSVD
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
G20
H20
C33
B34
E18
F18
B33
A33
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
EVT-2013-04-23
USB_BIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
3
USBP0- 20
USBP0+ 20
USBP1- 20
USBP1+ 20
USBP2- 22
USBP2+ 22
USBP3- 18
USBP3+ 18
USBP4- 17
USBP4+ 17
USBP5- 21
USBP5+ 21
USBP6- 23
USBP6+ 23
USBP7- 17
USBP7+ 17
USB3_RX1- 20
USB3_RX1+ 20
USB3_TX1- 20
USB3_TX1+ 20
USB3_RX2- 20
USB3_RX2+ 20
USB3_TX2- 20
USB3_TX2+ 20
R68 22.6/F_4
USB_OC0# 20
USB_OC1# 20
USB_OC2# 20
USB3.0 Port 1 with Charge
USB3.0 Port 2
USB3.0 Port 3
Rear Camera
Touch Screen (Full Speed)
BT (Combo)
Sensor Hub
Front Camera
USB3.0 Port 1
USB3.0 Port 2
USB_OC3#
USB_OC1#
USB_OC2#
USB_OC0#
2
RP7 10K_x2
4
2
RP8 10K_x2
4
2
1
9
+3V_S5
3
1
3
1
Haswell ULT (SYSTEM POWER MANAGEMENT)
U1H
B B
C304 220P_4
PCH_PWROK_EC16
EC_PWROK7,16
C305 220P_4
+3V_S5_DSW
PWRBTN# and SUSACK# internal PU
PEX_RST#11
A A
PCI_PLTRST#
R80
100K/J_4
5
SUSACK#16
RSMRST#16
SUSWARN#16
EC_PWRBTN#16
AC_PRESENT16
R282 100K_4
WLAN_PW_EN21
+3V_S5
2
1
3 5
R81 0_4
SYS_RESET#
PCH_PWROK_EC
PCI_PLTRST#
SUSWARN#
EC_PWRBTN#
AC_PRESENT
PM_BATLOW#
WLAN_PW_EN
TP89
EVT-2013-04-28
C65 E@0.1U/10V/X5R_4
4
U2
E@TC7SH08FU
C66
*0.1U/10V /X5R_4
R79
E@100K/J_4
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST
AW6
RSMRST
AV4
SUSWARN/SUSPWRDNACK/ GPIO30
AL7
PWRBTN
AJ8
ACPRESENT/GPIO31
AN4
BATLOW/GPI O72
AF3
TP88 TP80
PLTRST_DIS# 33
SLP_S0
AM5
SLP_WLAN/GPI O29
4
SYSTEM POWER
MANAGEMENT
DSW
DSW
DSW
R24483 *0_4
+3V_S5
2
1
U57
3 5
TC7SH08FU
C2421
0.1U/10V/X5R_4
4
+3V
+3V_S5
+3V_S5
DSW
+3V_S5
DSW
DSWVRMEN
DSW
DSW
CLKRUN/GPIO32
SUS_STAT/GPIO61
SUSCLK/GPIO62
SLP_S5/GPIO63
DSW
DSW
DSW
DSW
DSW
R24482
100K/J_4
DPWROK
WAKE
SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN
DVT
AW7
AV5
AJ5
V5
AG4
AE6
AP5
AJ6
AT4
AL5
AP4
AJ7
DSWVRMEN
PCIE_WAKE#
SLP_M#
On Die DSW VR Enable
High = Enable (Default)
Low = Disable
CLKRUN#
SLP_S5#
TP149
TP81
PLTRST# 17,21,22
3
R72 330K_4
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green Partners.
DPWROK 16
PCIE_WAKE# 21,22
TP77
TP78
TP79
TP82
SLP_S4# 16
SLP_S3# 16
SLP_SUS# 16
+3V_RTC
2
PCH Pull-high/low(CLG)
+3V_S5_DSW
PCIE_WAKE#
AC_PRESENT
PM_BATLOW#
SUSWARN#
CLKRUN#
SYS_RESET#
PCH_PWROK_EC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Date: Sheet of
Date: Sheet of
R71 1K/F_4
R73 100K_4
R74 10K_4
R75 10K_4
R76 10K_4
R77 10K_4
R78 100K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
HSW PCH(PCIE/USB)
HSW PCH(PCIE/USB)
HSW PCH(PCIE/USB)
+3V_S5
+3V
FI3
FI3
FI3
1
of
940
940
940
1C
1C
1C
5
4
3
2
1
C67 12P_4
4
Haswell ULT (CLK)
U1F
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
D D
WiFi/BT(NGFF)
LAN
GFX
Card Reader
C C
CLK_PCIE_WIFIN21
CLK_PCIE_WIFIP21
PCIE_CLK_REQ2#21
CLK_PCIE_LANN22
CLK_PCIE_LANP22
PCIE_CLK_REQ3#22
CLK_PCIE_VGAN33
CLK_PCIE_VGAP33
PCIE_CLK_REQ4#33
CLK_PCIE_CRDN22
CLK_PCIE_CRDP22
PCIE_CLK_REQ5#22
PCIE_CLK_REQ0#
PCIE_CLK_REQ1#
PCIE_CLK_REQ2#
PCIE_CLK_REQ3#
PCIE_CLK_REQ4#
PCIE_CLK_REQ5#
Haswell ULT (LPC/SPI/SMB/CLINK)
PVT-1
LPC_AD016,21
LPC_AD116,21
LPC_AD216,21
LPC_AD316,21
LPC_FRAME#16,21
R24489 33_4
R24490 33_4
R24491 33_4
R24492 33_4
R24493 33_4
LPC_AD0_R
LPC_AD1_R
LPC_AD2_R
LPC_AD3_R
LPC_FRAME#_R
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_IO2
PCH_SPI_IO3
U2
PCIECLKRQ0/GPIO1 8
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO1 9
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2/GPIO2 0
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO2 1
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO2 2
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO2 3
U1G
AU14
LAD0
AW12
LAD1
AY12
LAD2
AW11
LAD3
AV12
LFRAME
AA3
SPI_CLK
Y7
SPI_CS0
Y4
SPI_CS1
AC2
SPI_CS2
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
LPC
SPI
+3V
+3V
+3V
CLOCK
+3V
+3V
+3V
+3V_S5
SMBUS
+3V_S5
+3V_S5
SML1ALERT/PCHHOT/GPIO7 3
+3V_S5
+3V_S5
C-LINK
XTAL24_OUT
DIFFCLK_BIASREF
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLKOUT_LPC_0
CLKOUT_LPC_1
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
SMBALERT/GPIO11
SML0ALERT/GPIO60
SML0DATA
SML1CLK/GPIO75
SML1DATA/GPIO74
XTAL24_IN
RSVD
RSVD
SMBCLK
SMBDATA
SML0CLK
CL_CLK
CL_DATA
CL_RST
A25
XTAL24_IN
B25
XTAL24_OUT
K21
M21
C26
DIFFCLK_BIASREF
C35
TESTLOW_0
C34
TESTLOW_1
AK8
TESTLOW_2
AL8
TESTLOW_3
AN15
LPC_CLK_0
AP15
LPC_CLK_1
B35
TP83
A35
TP84
AN2
GPIO11
AP2
SMB_PCH_CLK
AH1
SMB_PCH_DAT
AL2
CCD_PWR_EN
AN1
SMB_NFC_CLK
AK1
SMB_NFC_DAT
AU4
SENSOR_HDR_SMALERT1
AU3
SMB_ME1_CLK
AH3
SMB_ME1_DAT
AF2
AD2
AF4
3
R82
1M_4
R83 3.01K/F_4
R84 22_4
R85 22_4
Y2
24MHz
1
2
C68 12P_4
1 2
1 2
1 2
C69
*10P/50V _4
SPD
CCD_PWR_EN 17
NFC
SENSOR_HDR_SMALERT1 23
EC
+1.05V
C70
*10P/50V _4
CLK_PCI_EC 16
CLK_PCI_LPC 21
+3V_S5
Do not short
the testlow pins together.
EVT-2013-05-05
SMBus/Pull-up(CLG)
R88 2.2K_4
R90 2.2K_4
SMB_PCH_CLK
SMB_PCH_DAT
PCIE_CLK_REQ0#
PCIE_CLK_REQ1#
PCIE_CLK_REQ2#
PCIE_CLK_REQ3#
CCD_PWR_EN
GPIO11
SENSOR_HDR_SMALERT1
Q4
5
2
6
+3V
10
9
8
7 4
TESTLOW_0
TESTLOW_1
TESTLOW_2
TESTLOW_3
R87 4.7K/J_4
43
R89 4.7K/J_4
1
RP1
10K_x8
RP2 10K_x2
1
3
RP3 10K_x2
1
3
R24464 *100K_4
R24465 100K_4
R86 100K_4
SMB_RUN_CLK 13,14,18
SMB_RUN_DAT 13,14,18
1
PCIE_CLK_REQ4#
2
PCIE_CLK_REQ5#
3
56
+3V
2
4
2
4
+3V+3V
+3V+3V
10
+3V_S5
2N7002DW
B B
+3V_S5
PVT
F_CS0#_PCH16
F_SDI_PCH16
SCK_PCH16
SD0_PCH16
R95 *short_4
R96 *short_4
R97 *short_4
R98 *short_4
For NPCE985L Using
+3V_S5
R102
A A
+3V_S5
5
R2358 15_4
R103 15_4
R105 15_4
R106 15_4
R108 15_4
R110 1K_4
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_IO2
*10K_4
PCH_SPI_CS0#_RPCH_SPI_CS0#
PCH_SPI_CLK_R
PCH_SPI_SI_R
PCH_SPI_SO_R
PCH_SPI_WP#
PCH_SPI_CS0#_R
PCH_SPI_SO_R
PCH_SPI_CLK_R
PCH_SPI_SI_R
U3
1
CE#
6
SCK
5
SI
2
SO
3
WP#
W25Q64FVSSIQ
VDD
HOLD#
VSS
SPI FLASH
+3V_S5
C72 0.1u/10V/X5R_4
8
R104 1K_4
7
PCH_SPI_HOLD#
4
4
+3V_S5
R107 15_4
PCH_SPI_IO3
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green Partners.
3
R92 1K/F_4
R94 1K/F_4
2
SMB_NFC_CLK 17
SMB_NFC_DAT 17
C71 0.1U/10V/X5R_4
R99 10K/J_4
MBCLK16,19,34
MBDATA16,19,34
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Date: Sheet of
Date: Sheet of
Q6
5
2
6
2N7002DW
HSW PCH(CLK/LPC/SPI/SMB)
HSW PCH(CLK/LPC/SPI/SMB)
HSW PCH(CLK/LPC/SPI/SMB)
R100 2.2K_4
43
SMB_ME1_CLK
R101 2.2K_4
1
SMB_ME1_DAT
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
FI3
FI3
FI3
10 40
10 40
10 40
of
+3V_S5+3V_S5
+3V_S5
1C
1C
1C
5
GPIO27
With Intel LAN:
Connect to LANW AKE# pin on the LAN
Without Intel LAN:
Used to wake event f rom DSx
EVT-2013-04-28
D D
LAN_RST#22
LAN_ISOLATE#22
EVT-2013-04-28
2013-03-21
2013-04-01
EVT-2013-04-28
HDD_PW_EN18
C C
R315 *100K_4
+3V
DEVSLEEP18
2013-0318
MP-1
+3V
EVT-2013-05-10
PCH_LAN_WAKE#22
SIO_WAKE_GPIO27#16
WLAN_RST#21
WAKE#_WLAN21
PEX_RST#9
SENSOR_RST#23
+3V_S5
+3V
TS_5V_PWR_EN17
SENSOR_PWR_EN23
NFC_DETECT#17
+3V
SPKR8,22
R283 100K_4
DB_DET18
NFC_RST#17
NFC-IRQ17
R_CAM_ON18
R295 100K_4
R300 100K_4
SENSOR_INT23
TS_PWR_EN17
EC_EXT_SCI#16
R313 100K_4
+3V
R317 100K_4
GPIO76
LAN_RST#
LAN_ISOLATE#
DB_DET
BOARD_ID3
PCH_LAN_WAKE#
SIO_WAKE_GPIO27#
NFC_RST#
NFC-IRQ
WLAN_RST#
WAKE#_WLAN
PEX_RST#
R_CAM_ON
SENSOR_RST#
GPIO47
BOARD_ID0
BOARD_ID1
BOARD_ID2
GPIO71
HDD_PW_EN
SENSOR_INT
TS_PWR_EN
TS_5V_PWR_EN
SENSOR_PWR_EN
NFC_DETECT#
EC_EXT_SCI#
DEVSLEEP
BOARD_ID4
GPIO39
Haswell ULT(GPIO,LPIO,MISC)
U1J
P1
BMBUSY/GPIO76
AU2
GPIO8
AM7
LAN_PHY_PWR_CTRL/GPIO12
AD6
TP87
GPIO70
C73
*100P
AD5
AN5
AD7
AN3
AG6
AP1
AL4
AT5
AK4
AB6
AT3
AH4
AM4
AG5
AG3
AM3
AM2
Y1
T3
U4
Y3
P3
Y2
P2
C4
L2
N5
V2
GPIO15*
GPIO16
GPIO17
GPIO24
GPIO27
GPIO28
GPIO26
GPIO56
GPIO57
GPIO58
GPIO59
GPIO44
GPIO47
GPIO48
GPIO49
GPIO50
HSIOPC/GPIO 71
GPIO13
GPIO14
GPIO25
GPIO45
GPIO46
GPIO9
GPIO10
DEVSLP0/GPIO3 3
SDIO_POWER_EN/ GPIO70
DEVSLP1/GPIO3 8
DEVSLP2/GPIO3 9
SPKR/GPIO81*
+3V_S5
+3V
+3V
+3V_S5
DSW
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V
+3V
+3V
+3V_S5
+3V_S5
DSW
+3V_S5
+3V_S5
+3V_S5
+3V_S5
4
+3V
+3V_S5
+3V
+3V
+3V
+3V
+3V
GPIO
DSW
+3V
CPU/
MISC
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
SDIO I2C UART GSP
+3V
+3V
THRMTRIP
+3V
RCIN/GPIO82
SERIRQ
PCH_OPI_RCOMP
RSVD
RSVD
SERIAL
GSPI0_CS/GPIO83
IO
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
*GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO9 1
UART0_TXD/GPIO9 2
UART0_RTS/GPIO9 3
UART0_CTS/GPIO9 4
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO6 4
SDIO_CMD/GPIO65
SDIO_D0/GPIO6 6
SDIO_D1/GPIO6 7
SDIO_D2/GPIO6 8
SDIO_D3/GPIO6 9
D60
PCH_THRMTRIP#
V4
EC_RCIN#
T4
SERIRQ#
AW15
PCH_OPIRCOMP
AF20
AB21
R6
DGPU_PRSNT#
L6
KBBL_PRESENT#
N6
GPIO85
L8
BBS
R7
GPIO87
L5
DMIC_DETECT
N7
GPU_PW_EN
K2
GPIO90
J1
CR_PW_EN
K3
GPIO92
J2
GPIO93
G1
GPIO94
K4
GPIO0
G2
GPIO1
J3
GPIO2
J4
GPIO3
F2
I2C0 _SDA_ R
F3
I2C0 _SCL_ R
G4
DAT_TP_SIO_L
F1
CLK_TP_SIO_L
E3
GPIO64
F4
GPIO65
D3
GPIO66
E4
GPIO67
C3
GPIO68
E2
GPIO69
3
+V1.05S_VCCST
R113
1K_4
R115 100K_4
R296 100K_4
R298 100K_4
R299 100K_4
R301 100K_4
R303 100K_4
R305 100K_4
R307 100K_4
R309 100K_4
R312 100K_4
R314 100K_4
R316 *100K_4
R318 100K_4
R319 100K_4
R320 100K_4
R111
1K_4
Q7
2
MMBT3904
1 3
EC_RCIN# 16
SERIRQ# 16
KBBL_PRESENT# 21
TP151
+3V
2013-04-01
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
2013-03-21
SHDN# 19,25,28,34
DMIC_DETECT:
High : Single DMIC
Low : Dual DMIC
GPU_PW_EN 31,32
CR_PW_EN 22
EVT-2013-04-29
2013-03-18
GPIO66
High
NC
ENABLE
DISABLE(Default)
2
EVT-2013-05-05
EVT-2013-04-28
DVT
EVT-2013-05-01
EVT-2013-05-10
2013-05-05
EVT-2013-04-28
1
GPIO Pull-up/Pull-down(CLG)
R_CAM_ON
WLAN_RST#
WAKE#_WLAN
SENSOR_INT
SENSOR_RST#
SENSOR_PWR_EN
TS_5V_PWR_EN
LAN_RST#
EC_EXT_SCI#
NFC_RST#
NFC_DETECT#
PEX_RST#
PCH_LAN_WAKE#
DB_DET
EC_RCIN#
SERIRQ#
GPIO87
DMIC_DETECT
KBBL_PRESENT#
GPU_PW_EN
CR_PW_EN
GPU_PW_EN
CR_PW_EN
NFC-IRQ
PCH_OPIRCOMP
HDD_PW_EN
EVT-2013-05-03
LAN_ISOLATE#
SIO_WAKE_GPIO27#
+3V
TS_PWR_EN
R123
*1K_4
DAT_TP_SIO_L
CLK_TP_SIO_L
R293 *100K_4
R290 100K_4
R291 100K_4
R304 *100K_4
R294 100K_4
R310 100K_4
R308 *100K_4
R284 100K_4
R112 100K_4
R288 *100K_4
R311 100K_4
R292 100K_4
R287 100K_4
R285 100K_4
R116 100K_4
R117 100K_4
R118 100K_4
R119 100K_4
R286 100K_4
R289 *100K_4
R297 *100K_4
R24463 100K_4
R24462 100K_4
R120 100K_4
R121 49.9/F_4
R302 100K_4
R114 100K_4
R122 100K_4
R306 *100K_4
1
3
RP6 10K_x2
BBS
R124
*1K_4
+3V_S5
+3V
+3V_S5_DSW
+3V
2
4
11
Q28
5
R2401 2.2K_4
+3V
R2399 2.2K_4
B B
+3V
R125 I@100K_4
R127 *100K_4
R129 *100K_4
R131 *100K_4
R133 *100K_4 R134 100K_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
R126 E@100K_4
R128 100K_4
R130 100K_4
R132 100K_4
I2C0 _SCL_ R
I2C0 _SDA_ R
4 3
1
2N7002DW
PUPDLPC
No Reboot Strap(GPIO81)
NC
PU
R127(Low)
R128(High)
Board ID1
Mule
A A
FI1
HuronSHA1
FI2
HuronSHB1
FI3_UMA
HuronSHB1
FI3_DGPU
0
0
5
R125(Low)
R126(High)
Board ID0
0
1
01
11
+3V
R135 E@100K/J_4
PCBA SKU Discrete
R135(Pull High)
R136(Pull Low)
4
DGPU_PRSNT#
Stuff
No Stuff
R136 I@100K/J_4
UMA
No Stuff
Stuff
TLS CONFIDENTIALITY STRAP(GPIO15)
NC
PU
Size Document Number Rev
Size Document Number Rev
1.Level 1 Environment-related Substances Should Never be Used.
3
2.Recycled Resin and Coated Wire should be procured from Green Partners.
2
Size Document Number Rev
Date: Sheet
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Date: Sheet of
Date: Sheet of
+3V
I2C0 _SCL 2 3
2
+3V
6
I2C0 _SDA 2 3
GPIO86
SPI (Default IPD)
Default
EN
Default
EN
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
HSW PCH(GPIO/MISC)
HSW PCH(GPIO/MISC)
HSW PCH(GPIO/MISC)
1
FI3
FI3
FI3
11 40
11 40
11 40
1C
1C
1C
of
5
+1.05V
Codec I/O use this power net
D D
C C
VCCUSB3PLL
VCCSATA3PLL
54mA
+1.05V
+1.05V
(VCCHSIO 1.8 4A)
+1.05V
+3V_S5_DSW
L4 2.2uH_8
L5 2.2uH_8
4
+V1.05DX_MODPHY
+V1.05S_AUSB3PLL
C76 47u/6.3V/X5R_8
C78 10/u/6.3V/X5R_6
C81 1u/6.3V/X5R_4
L1 2.2uH_8
L2 2.2uH_8
C84 10/u/6.3V/X5R_6
C85 47u/6.3V/X5R_8
C86 1u/6.3V/X5R_4
L3 2.2uH_8
C88 10/u/6.3V/X5R_6
C89 47u/6.3V/X5R_8
C90 1u/6.3V/X5R_4
+3V_S5
+3V_S5
+3V
+1.05V
+1.05V
TP123
C94 0.1u/10V/X5R_4
TP124
C96 10/u/6.3V/X5R_6
C97 0.1u/10V/X5R_4
C100 1u/6.3V/X5R_4
C101 10/u/6.3V/X5R_6
C102 10/u/6.3V/X5R_6
C103 47u/6.3V/X5R_8
C105 1u/6.3V/X5R_4
C107 10/u/6.3V/X5R_6
C108 47u/6.3V/X5R_8
C109 1u/6.3V/X5R_4
C74 1u/6.3V/X5R_4
C75 1u/6.3V/X5R_4
+1.05V
+V1.05S_AUSB3PLL
+V1.05S_ASATA3PLL
+V1.05S_ASATA3PLL
+V1.05S_APLLOPI
+1.05V_SUS_USB3
+1.05V_SUS_USB2-HDA
+V1.05S_AXCK_DCB
+V1.05S_AXCK_LCPLL
C111 1u/6.3V/X5R_4
C112 1u/6.3V/X5R_4
+3V_S5
AA21
W21
AH14
AH13
AC9
AH10
M20
AE20
AE21
L10
B18
B11
Y20
AA9
K19
A20
R21
T21
K18
V21
K9
M9
N8
P9
J13
V8
W9
J18
J17
U1M
VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL
RSVD
VCCAPLL
VCCAPLL
DCPSUS3
VCCHDA
DCPSUS2
VCCSUS3_3
VCCSUS3_3
VCCDSW3_3
VCC3_3
VCC3_3
VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3
HSIO
OPI
USB3
HDA
VRM
GPIO
LPC
LPT LP
POWER
3
RTC
SPI
CORE
THERMAL
SENSOR
SERIAL
IO
SUS
OSCILLATOR
USB2
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCASW
VCCASW
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
VCCTS1_5
VCC3_3
VCC3_3
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
VCCSUS3
129mA
C79 1u/6.3V/X5R_4
AH11
AG10
AE7
+VCCRTCEXT
C87 0.1u/10V/X5R_4
Y8
AG14
+1.05V
AG13
J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
J15
K14
K16
U8
T9
AB8
AC20
AG16
AG17
C91 1u/6.3V/X5R_4
C92 1u/6.3V/X5R_4
C93 10/u/6.3V/X5R_6
DCPSUSBYP
C98 1u/6.3V/X5R_4
C99 22u/6.3V/X5R_6
+V1.05V_SUS
C104 0.1u/10V/X5R_4
+V3.3S_PTS
C106 0.1u/10V/X5R_4
C110 1u/6.3V/X5R_4
+V1.05V_SUS_AOSCSUS
C113 1u/6.3V/X5R_4
2
+3V_S5
C83 0.1u/10V/X5R_4
+3V_S5
C475 0.47u/10V/X5R_4
C95 1u/6.3V/X5R_4
TP125
R138 *short_4
+1.05V
C77 1u/6.3V/X5R_4
C80 0.1u/10V/X5R_4
C82 0.1u/10V/X5R_4
VCC1_05
+1.05V
2.6A
+1.05V
VCCASW
473mA
+1.5V
+3V
+V3.3S_1.8S_LPSS_SDIO
R139 *short_4
TP126
1
12
+3V_RTC
+3V_S5_DSW
PVT
PVT
+3V
B B
DEEP STANDBY
VIN
+3V_S5_DSW
R140
A A
DEEP_EC_EN16
2
5
1M_4
3
R143
1M_4
Q9
2N7002W(SOT323)
1
15VPCU
R142
1M_4
R141
22_6
5
1
4 3
Q10
2N7002DW
C114
2200P/50V/X7R_4
4
DEEP_EN
6
2
+3V_WAKE
DEEP_EN
EVT_2013-05-10
Q8
NTTFS4C10N
5
3
2
1
4
+3V_S5_DSW
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
1.Level 1 Environment-related Substances Should Never be Used.
3
2.Recycled Resin and Coated Wire should be procured from Green Partners.
2
Size Document Number Rev
Date: Sheet
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Tuesday, October 08, 2013
Date: Sheet of
Date: Sheet of
PROJECT :
HSW PCH(Power)
HSW PCH(Power)
HSW PCH(Power)
1
FI3
FI3
FI3
12 40
12 40
12 40
1C
1C
1C
of
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