SONY STR DE1015 Service Manual
STR-DE1015G
SERVICE MANUAL
US Model
Canadian Model
SPECIFICATIONS
— Continued on next page —
MICROFILM
FM STEREO FM-AM RECEIVER
— 1 —
— 2 —
TABLE OF CONTENTS
SAFETY CHECK-OUT
1. SERVICING NOTE
.......................................................... 4
2. GENERAL .......................................................................... 5
3. DISASSEMBLY
3-1. Front Panel .......................................................................... 26
3-2. Balance Board, Display Board and Volume Board............. 26
4. TEST MODE ..................................................................... 27
5. ELECTRICAL ADJUSTMENTS ............................... 28
6. DIAGRAMS
6-1. IC Pin Functions................................................................. 30
6-2. Circuit Boards Location ...................................................... 47
6-3. Block Diagrams
• Input/Output Section........................................................ 49
• Power Amp Section ......................................................... 51
• DA Section....................................................................... 53
• DSP Section ..................................................................... 55
• AC-3 (RF) Section........................................................... 57
• OSD Section .................................................................... 59
• OSD Control Section ....................................................... 61
• Panel Section ................................................................... 63
• Power Section .................................................................. 65
6-4. Printed Wiring Board — Input/Output Section — ............. 68
6-5. Schematic Diagram — Input/Output Section — ................ 71
6-6. Schematic Diagram — Power Amp Section —.................. 75
6-7. Printed Wiring Board — Power Amp Section — ............... 79
6-8. Printed Wiring Board — Digital Section — ....................... 83
6-9. Schematic Diagram — Digital (D/A) Section — ............... 87
6-10. Schematic Diagram — Digital (Control) Section — ....... 91
6-11. Schematic Diagram
— Digital (Dolby AC-3) Section —................................. 95
6-12. Printed Wiring Board — Panel Section —....................... 98
6-13. Schematic Diagram — Panel Section — ....................... 101
6-14. Schematic Diagram — OSD Section — ........................ 105
6-15. Printed Wiring Board — OSD Section —...................... 109
6-16. IC Block Diagrams......................................................... 112
After correcting the original service problem, perform the following safety checks before releasing the set to the customer:
Check the antenna terminals, metal trim, “metallized” knobs, screws,
and all other exposed metal parts for A C leakage. Check leakage as
described below.
LEAKAGE
The AC leakage from any exposed metal part to earth Ground and
from all exposed metal parts to any exposed metal part having a
return to chassis, must not exceed 0.5 mA (500 microampers). Leakage current can be measured by any one of three methods.
1. A commercial leakage tester, such as the Simpson 229 or RCA
WT-540A. Follow the manufacturers’ instructions to use these
instruments.
2. A battery-operated AC milliammeter. The Data Precision 245
digital multimeter is suitable for this job.
3. Measuring the voltage drop across a resistor by means of a VOM
or battery-operated A C v oltmeter. The “limit” indication is 0.75
V, so analog meters must have an accurate low-voltage scale.
The Simpson 250 and Sanwa SH-63Trd are examples of a passive VOM that is suitable. Nearly all battery operated digital
multimeters that have a 2V AC range are suitable. (See Fig. A)
To Exposed Metal
Parts on Set
0.15µF
1.5k
Ω
Earth Ground
AC
voltmeter
(0.75V)
Fig. A. Using an AC voltmeter to check AC leakage.
7. EXPLODED VIEWS
7-1. Case Section...................................................................... 117
7-2. Front panel Section ........................................................... 118
7-3. OSD Board Section........................................................... 119
7-4. Chassis Section ................................................................. 120
8. ELECTRICAL PARTS LIST ...................................... 121
Notes on chip component replacement
• Never reuse a disconnected chip component.
• Notice that the minus side of a tantalum capacitor may be
damaged by heat.
SAFETY-RELATED COMPONENT WARNING !!
COMPONENTS IDENTIFIED BY MARK ! OR DO TTED LINE
WITH MARK ! ON THE SCHEMATIC DIAGRAMS AND IN
THE PARTS LIST ARE CRITICAL TO SAFE OPERATION.
REPLACE THESE COMPONENTS WITH SONY PARTS
WHOSE PART NUMBERS APPEAR AS SHOWN IN THIS
MANUAL OR IN SUPPLEMENTS PUBLISHED BY SONY.
MODEL IDENTIFICATION
— BACK PANEL —
Parts No.
4-989-885-4
4-989-885-5
ATTENTION AU COMPOSANT AYANT RAPPORT
LES COMPOSANTS IDENTIFIÉS P AR UNE MARQUE ! SUR
LES DIAGRAMMES SCHÉMATIQUES ET LA LISTE DES
PIÈCES SONT CRITIQUES POUR LA SÉCURITÉ DE
FONCTIONNEMENT. NE REMPLA CER CES COMPOSANTS
QUE PAR DES PIÈCES SONY DONT LES NUMÉROS
SONT DONNÉS DANS CE MANUEL OU DANS LES
SUPPLÉMENTS PUBLIÉS PAR SONY.
US model
Canadian model
À LA SÉCURITÉ!!
Model
— 3 —
Parts No.
SECTION 1
SERVICING NOTE
ALL CLEAR
Mode which erases all the user memories registered in this unit and
sets to setting at shipment.
Procedure:
1. With the power turned OFF, press the POWER button while
pressing the MODE button, AUDIO FUNCTION > and
VIDEO FUNCTION > button simultaneously to turn ON the
power.
2. ALL CLEAR 3/5 will be displayed on the fluorescent indicator
tube, and ALL CLEAR will be executed.
FACTORY SET
Mode which sets the memory of the unit to the setting of adjustment and check at factory. (Not used for servicing.)
Procedure:
1. With the power turned OFF, press the POWER button while
pressing the MODE button and AUDIO FUNCTION > button
simultaneously to turn ON the power.
2. FACTORY SET will be displayed on the fluorescent indicator
tube, and FACTORY SET will be executed.
Note: In case you return the unit to the customer, do not perform
FACTRY SET. If you do it, perform ALL CLEAR.
Fluorescent indicator tube, LED all lit mode
Adjustment of OSD Screen Position
The position of the screen can be adjusted freely to correct the deviation of the OSD screen caused by the monitor type that users are
using.
1. Move the cursor of the remote commander supplied as an accessory, and display the OSD screen.
2. Click the SET UP of the OSD screen.
3. Next click TV SET.
4. Next click GRAPHIC POSITION SET.
5. The screen for adjusting the OSD screen position will be displayed. Adjust the position with the remote commander supplied
as an accessory.
6. Click EXIT to end.
AM Tuning Step 9 kHz/10 kHz Selection
Method:
1. Turn ON the power, set the AUDIO FUNCTION to AM, and
turn OFF the power.
2. While pressing the TUNING + button or PRESET TUNING +
button, press the POWER button.
3. “AM 9K STEP” or “AM 10k STEP” will be displayed on the FL
display tube.
Procedure:
1. With the power turned OFF, press the POWER button while
pressing the MODE button and VIDEO FUNCTION > b utton
simultaneously to turn ON the power.
2. The fluorescent display tubes and LEDs will all light up. Release the buttons in the order of VIDEO FUNCTION > , and
MODE .
3. The Fluorescent indicator tube display changes as follows by
pressing the DPC MODE .
(Pressing the other buttons will exit this mode.)
9
Fluorescent indicator tubes, LEDs are all lit
DIGITAL
12345
AC-3 RF
SOUND FIELD
DISCRETE PRO LOGIC MONO STEREO
• Press DPC MODE button.
9
Partial lighting of fluorescent indicator tube 1, LEDs are OFF *1
• Press DPC MODE button.
9
Partial lighting of fluorescent indicator tube 2, LEDs are OFF *1
MEMORY
• Press DPC MODE button.
9
Fluorescent indicator tube and all LEDs are OFF
• Press DPC MODE button.
9
*1 Those other than the POWER LED go OFF.
4. To exit the mode, press the POWER button to turn OFF the
power.
— 4 —
SECTION 3
DISASSEMBLY
Note: Follow the disassembly procedure in the numerical order given.
3-1. FRONT PANEL
3
Flat type wire (19 core)
(CNS701)
1
Three screws
(BVTP3x8)
2
Screw
(BVTP3x8)
4
Flat type wire (CNJ203)
6
Three screws
(BVTP3x8)
7
Front panel
3-2. BALANCE BOARD, DISPLAY BOARD AND VOLUME BOARD
8
0
DISPLAY board
Four screws
(BVTP2.6x8)
9
Remove the four claws.
5
Flat type wire (21 core)
(CN3301)
8
Flat type wire (19 core)
(CNS402)
2
Nut
1
Knob
(Volume)
3
Knob
(Balance)
7
Two screws
(BVTP2.6x8)
6
— 26 —
Bracket
5
BALANCE board and
VOLUME board
4
Two screws
(BVTP2.6x8)
SECTION 4
TEST MODE
Self-Diagnosis and Test Mode
This unit is provided with a “self-diagnosis and self-recovery function” which detects DSP errors and automatically recovers the unit,
and a test mode for performing operation checks during repairs.
1. MAIN FUNCTIONS
• DSP self-diagnosis program for servicing and operation check
mode.
2. ENTERING THE TEST MODE
While pressing the MODE button and AUDIO FUNCTION <
button simultaneously in the power OFF state, press the POWER
button.
3. Self-diagnosis Mode for Servicing/Display of DSP
Errors
3-1. Self-diagnosis Mode for Servicing
Before entering the test mode, DSP self-diagnosis program for servicing will be run.
• When an error is detected:
The error message is displayed on the fluorescent display tube.
When several errors occur at the same time, only the last error
detected will be displayed.
4. OPERATION CHECK MODE
Outputs the Lch LD/DVD OPTICAL signal to the FRONT Lch,
REAR Lch, CENTER, and the Rch to the FRONT Rch, REAR Rch,
and CENTER.
5. NOTE AFTER USING THE TEST MODE
Be sure to unplug the AC plug after the test mode is performed.
• When no error is detected:
First, “DSP ERROR” will be displayed, then “DSP NO ERROR”
will be displayed, and the operation check mode will be set.
Table-1:
Error Message/Fluorescent Display Tube
DSP ERROR
When a DSP error is detected, after this display, the contents of “3-2. Display of DSP Operations” will be displayed.
Possible Reasons
3-2. Display of DSP Operations
Display of error Possible cause
1
1 DSP BOOT
2
ERROR
1
2 DSP HREQ
2
ERROR
1
3 DSP VRFY
2
ERROR
4 DSP 1 RPLY
Mostly due to faulty connection (soldering) between
DSP and microprocessor
Faulty DSP clock (X3501 and onwards), faulty DSP
part, etc.
Overrunning of DSP due to heat, microprocessor
bugging, or IC3409 (DIGIT AL board PLL) is faulty
Faulty DSP part, or faulty microprocessor part, etc.
— 27 —
SECTION 5
r
ELECTRICAL ADJUSTMENT
TUNER SECTION
No adjustment is needed due to a tuner unit (TU401).
OSD SECTION
OSD WIDTH Adjustment
Note: Perform “ALL CLEAR” before this adjustment.
(Refer to Servicing note on page 4)
Connection:
MONITOR OUT
SET
Procedure:
1. Press the POWER button and turn ON the power.
2. The OSD function frame will be displayed on the monitor. This
screen will disappear in a few seconds automatically when the
input of codes using the remote commander stops.
If it disappears during adjustments, move the cursor of the remote commander supplied as an accessory. The screen will appear again.
3. While watching the monitor screen, adjust CT201 of the OSD
(V) board so that the following adjustment standard is satisfied.
monitor screen
Monitor
OSD COLOR BURST Adjustment
Connection:
frequency counte
OSD (V) board
JW232
+
–
Procedure:
1. Without anything connected to the external input terminal, press
the POWER button and turn ON the power.
2. Adjust CT202 of the OSD (V) board so that the reading on the
frequency counter becomes 3.579545 MHz ± 10 MHz.
OSD PICTURE Adjustment
Connection:
Connection 1:
Vectorscope
set
MONITOR OUT
Connection 2:
Monitor
FUNCTION SOUND SETUP
F1
A
OSD function frame
INPUT SUB USER
FPFpF)F(F0
F=
F™
F+
B
Adjustment standard:
Adjust so that the width B becomes one and a half times of width A.
1.5A = B
NOTE:
Extra margin is provided in this adjustment in consideration of the
deviation of the screen according to the type of monitor used.
Consequently, the user is able to adjust the position of the screen
freely. (For details, refer to “Adjustment of OSD Screen Position”
in 1. Servicing note. Refer to page 4.)
Monitor
VTR etc.
VIDEO 1 IN
Vectorscope
set
MONITOR OUT
Procedure 1:
1. Without anything connected to the external input terminal (connection 1), press the POWER button and turn ON the power.
2. Check that the OSD function frame screen is displayed on the
monitor. If no OSD function frame screen is displayed, move
the cursor button of the remote commander supplied as an accessory provided to display the screen.
3. Observe the vectorscope, and adjust RV201 of the OSD (V) board
so that the light dots converge in the BLUE area.
4. Connect a dynamic picture video device to the external input
terminal (VIDEO 1 IN jack) of this unit (Connection 2).
5. Press the VIDEO FUNCTION button and set the input source
to VIDEO 1.
6. Move the cursor of the remote commander supplied as an accessory provided, and display the OSD function frame.
7. Observe the vectorscope. Check that the light dots in the BLUE
range and the light dots adjusted at 3 are coinciding.
8. If they do not coincide, disconnect the external video device,
and adjust RV201 of the OSD (V) board again.
9. If the light dots when an external video device is connected and
not connected coincide, it indicates the end of the adjustment.
— 28 —
Procedure 2: (When no vectorscope is used)
monitor screen
FUNCTION SOUND SETUP
INPUT SUB USER
F™
F+
F=
FPFpF)F(F0
F1
OSD function frame
Blue area
Green area
Connection:
VTR etc. Monitor
VIDEO 1 IN
set
MONITOR OUT
Monitor
1. Connect a dynamic picture video device to the VIDEO 1 IN
jack of the unit.
2. Press the VIDEO FUNCTION button, and set the input source
to VIDEO 1.
3. Move the cursor of the remote commander supplied as an accessory provided, and display the OSD function frame.
4. Take note of the blue and green screens at the bottom left of the
OSD function frame.
5. Disconnect the video device connected at 1.
6. Adjust RV201 of the OSD (V) board so that the blue and green
parts at the bottom left of the OSD function frame to the same
color as the images checked at 4.
Note) Perform this adjustment when disconnecting the external video de-
vice. If the external video device is connected, there is no meaning
in performing this adjustment due to the use of the color burst of the
external device instead of the internal sync signal.
Adjustment Location
[OSD (V) BOARD] (Component side)
OSD COLOR BURST
JW232
OSD WIDTH
OSD PICTURE
IC215
CT201
CNP202
CT202
IC205
RV201
— 29 —
6-1. IC PIN FUNCTIONS
• IC103 Mode controller (MB90673PF)
Pin No. Pin Name
MBUS-V2
1
MBUS-MON
2
MBUS-STATUS-OUT
3
—
4
—
5
—
6
LED STANDBY
7
LED SURR
8
LED TONE
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
LED INDEX
VSS
LED CD
LED DAT/MD
LED TAPE
LED TV
LED LD
LED V3
LED V2
LED V1
RX (SIN)
TX (SOUT)
BUSY
FL CLEAR
FL DATA
FL CLK
FL LAT
SIRCS
VCC (A)
+AVR
–AVR
GND (D)
AD KEY IN 1
AD KEY IN 2
VSS (D)
AD KEY IN 3
AD KEY IN 4
AD KEY IN 5
AD VERSION
VOL +
VOL –
SECTION 6
DIAGRAMS
I/O
–
Not used
–
Not used
–
Not used
–
Not used
–
Not used
–
Not used
O
STANDBY indicator drive signal output
O
SURROUND indicator drive signal output
O
TONE indicator drive signal output
O
INDEX indicator drive signal output
–
Ground
O
CD indicator drive signal output
O
DAT/MD indicator drive signal output
O
TAPE indicator drive signal output
O
TV indicator drive signal output
O
LD indicator drive signal output
O
VIDEO3 indicator drive signal output
O
VIDEO2 indicator drive signal output
O
VIDEO1 indicator drive signal output
O
Serial data output to OSD controller
I
Serial data input from OSD controller
I/O
Serial clock input/output with OSD controller
O
FL clear signal output to FL driver “H” : active
O
FL data output to FL diver
O
FL clock output to FL diver
O
FL latch output to FL driver “H” : active
I
Remote control signal input
–
+5V power supply (Back-up)
I
Reference voltage input (+) (+5V)
I
Reference voltage input (–) (Ground)
–
Ground
I
Key input 1
I
Key input 2
–
Ground
I
Key input 3
I
Key input 4
I
Key input 5
I
AD version setting input
O
Volume motor control signal output
O
Volume motor control signal output
Function
Function
• Abbreviation
OSD : On Screen Display
FL : Fluorescent indicator tube
— 30 —
Pin No. Pin Name
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
MODE0
MODE1
MODE2
STANBY
STOP
U-RESET
U-SREQ
U-MREQ
U-DATA
U-CLOCK
(GND)
AUBUS IN
AUBUS OUT
(GND)
FUNCTION-B
FUNCTION-A
UP/DOWN-B
UP/DOWN-A
LEFT/RIGHT-B
LEFT/RIGHT-A
—
RESET
VSS (D)
XO
XI
VCC (D)
LED TUNER
LED PHONO
LED MUTE
LED LEARNING
LED D. PASS
LED INPUT
LED VOL
LED BASS B
SP-A
SP-B
PW-SW
—
—
MBUS-V1
I/O
I
Mode setting pin (Fixed at “H”)
I
Mode setting pin (Fixed at “H”)
I
Mode setting pin (Fixed at “L”)
I
Stanby signal input (Fixed at “H”)
I
STOP signal input “L” : active
O
Reset output to system controller “L” : reset
I
Slave data request signal input from system controller
O
Master request signal output to system controller
O
Master data output to system controller
O
Master clock output to system controller
–
Ground
–
Not used
–
Not used
–
Ground
–
Not used
–
Not used
–
Not used
–
Not used
–
Not used
–
Not used
–
Not used (Ground)
I
Reset signal input “L” : reset
–
Ground
O
Clock output (4MHz)
I
Clock input (4MHz)
–
+5V power supply (Back-up)
O
TUNER indicator drive signal output
O
PHONO indicator drive signal output
O
MUTE indicator drive signal output
O
LEARNING indicator drive signal output
O
DIRECT PASS indicator drive signal output
O
INPUT indicator drive signal output
O
Volume indicator drive signal output “H” : active
O
Bass boost indicator drive signal output “H” : active
O
Speaker select control signal output
O
Speaker select control signal output
I
Power on detect signal input
–
Not used
–
Not used
–
Not used
Function
Function
— 31 —
• IC205 OSD (MB90095PF-G-186-BND)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Pin Name
YIN
CIN
VIN
AVCC
FSCO
VBLK
VCC
EXS
XS
HSYNC
VSYNC
EXHSYN
EXVSYN
GND
EXD
XD
VOB
VOC 2
VOC 1
VOC 0
TEST
S. CLK
S. DATA
CS
VOUT
COUT
YOUT
AGND
I/O
I
Luminous signal input for superimpose displays
I
Chroma signal input for superimpose displays
I
Composite signal input for superimpose displays
–
Power supply (+5V) (Analog)
O
Color burst phase signal output
O
Vertical blanking period output (Not used)
–
Power supply (+5V)
I
External circuit of the clock generator for color burst signals (14.3MHz)
O
External circuit of the clock generator for color burst signals (Not used)
O
H. SYNC/COMPOSIT SYNC singal output
O
V. SYNC signal output (Not used)
I
External H. SYNC signal input
I
External V. SYNC signal input
–
Ground
I
External circuit of the display dot clock generator
O
External circuit of the display dot clock generator
O
Character and background period signal output (Not used)
O
Chroma signal output (Not used)
O
Chroma signal output (Not used)
O
Chroma signal output (Not used)
I
Test pin (Fixed at “H”)
I
Shift clock input for serial transmission
I
Serial data input
I
Chip select input
O
Composite video signal output
O
Chroma signal output
O
Luminous signal output
–
Ground (Analog)
Function
• Abbreviation
OSD : On Screen Display
— 32 —
• IC209 OSD Controller (MB90672PF-G-125-BND)
Pin No.
1, 2
3 to 6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin Name
AD14, AD15
A16 to A19
PCE
PCLK
PDATA OUT
PDATA IN
GND
ALE
RDX
WRLX
WRHX
MONITOR
VIDEO 2
STATUS-OUT
VIDEO 1
RX (SIN)
TX (SOT)
P PRES
TEST 1
DATA (OSD)
CLK (OSD)
LAT (OSD)
—
AVCC
AVR +
AVR –
AVSS
VOLA/D
PREADY
GND
PSTATUS
OK
MEMORY FULL
BACK UP NG
NG
P-IR
I/O
Address bus and data bus input/output
I/O
Address bus output
O
Chip Enable output to RC controller (For communication using personal computers)
O
Clock output to RC controller (For communication using personal computers)
O
Data output to RC controller (For communication using personal computers)
O
Data input from RC controller (For communication using personal computers)
I
Ground
–
Address latch enable output
O
Read strobe output to data bus
O
O
Write strobe output to data bus
O
Control-S input (Monitor) (Fixed at “L”)
I
Control-S input (VIDEO 2)
I
Control-S status output
O
Control-S input (VIDEO 1)
I
Serial data input from mode control (U-ART0 reception)
I
Serial data output to mode control (U-ART0 transmission)
O
Reset output (For communication using personal computers)
O
Test port (Not used)
O
Serial data output to OSD
O
Serial clock output to OSD
O
Latch output to OSD
O
Not used
–
Power supply (+5.6V)
–
Power supply (+5V)
–
–
Ground
–
Volume control signal input (Not used)
I
Learning code reception ready signal input “L” : nothing
I
Ground
–
Infrared rays transmission data status signal input from to RC controller
I
Learning OK signal input from RC controller
I
Memory full signal input from RC controller
I
Back up NG signal input from RC controller
I
Learning NG signal input from RC controller
I
Input to the integral calculus circuit of the remote control reception signal
I
Function
• Abbreviation
RC: Remote Commander
OSD: On Screen Display
— 33 —
Pin No.
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67 to 100
Pin Name
MODE 0
MODE 1
MODE 2
HSTX
STOP
IR-IN (A6)
—
—
AUBUS IN
V. SIGNAL
SIRCS-IN
VD
AUBUS OUT
F. SW
VIDEO-MUT
—
—
—
—
IR ON/OFF
BUSY
RESET
GND
XO
XI
VCC
AD00 to AD13
I/O
Mode setting (Fixed at “H”)
I
Mode setting (Fixed at “L”)
I
Mode setting (Fixed at “L”)
I
Hardware standby (Fixed at “H”)
I
Request input of reset interrupt
I
IR sensor remote control input (Not used)
I
Not used
–
Not used
–
S-LINK control A1 signal input
I
H-sync switching signal input
I
SIRCS signal input
I
PAL: 60 [flame/s]/ NTSC: 50 [flame/s] signal detect VD input
I
S-LINK control A1 signal output
O
To control output into monitor (Not used)
O
Image mute output (Not used)
O
Not used
–
Not used
–
Not used
–
Not used
–
IR remote control ON/OFF output “H” off
O
Input/output to communicate with the mode control
I/O
Reset signal input
I
Ground
–
Clock (4 MHz)
O
Clock (4 MHz)
I
Power supply (+5.6V)
–
Address bus and data bus input/output
I/O
Function
— 34 —
• IC215 RC Controller (LC86F5864A-5F53)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin Name
P70/INT0
P71/INT1
P72/INT 2/TOIN
P73/INT 3/TOIN
P30
P31
P32
P33
P34
P35
P36
P37
P40
P41
P42
P43
P44
P45
P46
P47
P50/SDA
P51/SCL
VSS2
VDD2
P20/SDA
P21/SCL
P22/TXD
P23/PXD
P24/UCLK
P25
P26
P27
P00
P01
P02
P03
P04
P05
P06
P07
I/O
I
Chip enable input from OSD controller
I
Chip enable input (For on-board) (Not used)
I
Not used (Fixed at “L”)
I
SIRCS signal input
I
Power supply normality signal input
O
Infrared rays transmission data status signal output to OSD controller “L” nothing
O
Learning NG signal output to OSD controller
O
Back-up NG signal output to OSD controller
O
Memory-full signal output to OSD controller
O
Learning OK signal output to OSD controller
O
Data reception ready signal output to OSD controller
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
–
Ground
–
+5V power supply
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
O
Not used (Fixed at “L”)
Function
• Abbreviation
RC: Remote Commander
OSD: On Screen Display
— 35 —
Pin No.
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Pin Name
P10/SOO
P11/SI0/SB0
P12/SCKO
P13/SO1
P14/SI1
P15/SCK1
P16/BUZ
P17/PWM
TEST1
RES
XT1/P74
XT2
VSS1
CF1
CF2
VDD1
P80/AN0
P81/AN1
P82/AN2
P83/AN3
P84/AN4
P85/AN5
P86/AN6
P87/AN7
I/O
O
Serial data output to OSD controller
I
Serial data input to OSD controller
I
Serial clock input from OSD controller
–
Serial data output (For on-board) (Not used)
I
Serial data input (For on-board) (Not used)
I
Serial clock input (For on-board) (Not used)
O
Not used (Fixed at “L”)
O
SIRCS signal output (Carrier = PWM output)
O
Not used
I
Reset input “L” reset
–
Not used (Fixed at “H”)
–
Not used
–
Ground
I
Clock input (6MHz)
O
Clock output (6MHz)
–
+5V power supply
I
Not used (Fixed at “L”)
I
Not used (Fixed at “L”)
I
Not used (Fixed at “L”)
I
Not used (Fixed at “L”)
I
Not used (Fixed at “L”)
I
Not used (Fixed at “L”)
I
Not used (Fixed at “L”)
I
Not used (Fixed at “L”)
Function
• Abbreviation
OSD: On Screen Display
— 36 —
• IC3104 A/D Converter (CXD8681M-TP)
Pin No. Pin Name
VRL+
1
VRL–
2
VCML
3
AINL+
4
AINL–
5
ZCAL
6
VD
7
DGND
8
CAL
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
RST
SMODE2
SMODE1
LRCK
SCLK
SDATA
FSYNC
MCLK
CMODE
SEL24/20
TEST
BGND
AGND
VA
AINR–
AINR+
VCMR
VRR–
VRR+
I/O
O
O
O
I
I
I
–
–
O
I
I
I
I/O
I/O
O
I/O
I
I
I
I
–
–
–
I
I
O
O
O
Function
Function
L-ch reference voltage (+) output (+3.75V)
L-ch reference voltage (–) output (+1.25V)
L-ch common voltage (+) output (+2.5V)
L-ch analog voltage (+) input
L-ch analog voltage (–) input
Zero calibraton input (Fixed at “H”)
+5.5V power supply (Digital)
Ground (Digital)
Calibration status signal output
Reset input “L” : reset
Serial interface mode selection input (Fixed at “L”)
Serial interface mode selection input (Fixed at “L”)
L/R channel selection clock input/output
Serial data clock input/output
Serial data output
Frame sync clock input/output (Fixed at “H”)
Master clock input (12.288MHz)
Master clock selection input “L” : MCLK : 256Fs, “H” : MCLK : 384Fs (Fixed at “L”)
Output data range selection input “L” : 20 bit, “H” ; 24 bit (Fixed at “H”)
Test pin (Fixed at “L”)
Ground
Ground (Analog)
+5V power supply (Analog)
R-ch analog (–) input
R-ch analog (+) input
R-ch common voltage output (+2.5V)
R-ch reference voltage (–) output (+1.25V)
R-ch reference voltage (+) output (+3.75V)
— 37 —
• IC3308 DOLBY AC-3 demodulator (SN-PM4007A)
Pin No. Pin Name
GND
1
VDD
2
RESET
3
OSCON
4
DATA
5
MCK
6
MLTB
7
IDST
8
IDCK
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
IDO
TM0
ECCK
DEN
DRY
MSYC
TM1
A0
A1
A2
A3
A4
A5
TM2
TM3
XOUT
XIN
NEXT
GND
VDD
A6
A7
GND
VDD
A12
A14
WE
A13
A8
A9
GND
A11
OE
A10
D7
D6
D5
D4
D3
D2
D1
I/O
–
Ground
–
+5V power supply
I
System reset input “L” : reset
I
Oscillation control signal input “H” : ON (Fixed at “H”)
I
Test pin (Fixed at “L”)
I
Test pin (Fixed at “L”)
I
Test pin (Fixed at “L”)
O
Test pin (Not used)
O
Test pin (Not used)
O
Test pin (Not used)
I
Test pin (Fixed at “L”)
O
Test pin (Not used)
O
Test pin (Not used)
O
Test pin (Not used)
O
Test pin (Not used)
I
Test pin (Fixed at “L”)
O
Address data output to SRAM
O
Address data output to SRAM
O
Address data output to SRAM
O
Address data output to SRAM
O
Address data output to SRAM
O
Address data output to SRAM
I
Test pin (Fixed at “L”)
I
Test pin (Fixed at “L”)
O
Test pin (Not used)
I
Test pin (Fixed at “L”)
I
Test pin (Fixed at “L”)
–
Ground
–
+5V power supply
O
Address data output to SRAM
O
Address data output to SRAM
–
Ground
–
+5V power supply
O
Address data output to SRAM
O
Address data output to SRAM
O
Write enable signal output to SRAM “L” : active
O
Address data output to SRAM
O
Address data output to SRAM
O
Address data output to SRAM
–
Ground
O
Address data output to SRAM
O
Output enable output to SRAM
O
Address data output to SRAM
I/O
Data bus input/output with SRAM
I/O
Data bus input/output with SRAM
I/O
Data bus input/output with SRAM
I/O
Data bus input/output with SRAM
I/O
Data bus input/output with SRAM
I/O
Data bus input/output with SRAM
I/O
Data bus input/output with SRAM
Function
Function
— 38 —
Pin No. Pin Name
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
D0
VDD
GND
TI1
VIN
VOUT
TI2
TI3
TLD8
TCK
TRP
TD0
PD0
TI4
PDDI5
MUTO
TI5
VLDY
DASYO
DAOUT
DAIN
DAIN
TI8
C2F1
C2F0
C1F1
C1F0
MUTI
VDD
GND
AVDD
CPIN
CMIN
AGND
TM4
VDD
DIN
DOUT
DOUTB
C9M
GND
WINGT
SYST0
SYST1
ADST0
ADST1
TM5
BUNRI
AGND
AVDD
Function
I/O
I/O
Data bus input/output with SRAM
–
+5V power supply
–
Ground
I
Test pin (Fixed at “H”)
I
VCXO input (18.432MHz)
O
VCXO output (18.432MHz)
I
Test pin (Fixed at “L”)
I
Test pin (Fixed at “L”)
I
Test pin (Fixed at “L”)
I
Test pin (Fixed at “L”)
O
Test pin (Not used)
O
Test pin (Not used)
O
Output of internal phase comparator (3 state)
I
Test pin (Fixed at “L”)
I
PDO output control input “L” : output ON
O
Mute signal output “H” : mute
I
Test pin (Fixed at “L”)
O
Test pin (Not used)
O
Test pin (Not used)
O
Digital-out signal output (Serial data stream output)
I
Dgital external input Through out to DAOUT when DASEL is “H” (Not used)
I
Digital-out selection input (Fixed at “L”)
I
Test pin (Fixed at “L”)
O
C2 error correction state display Outputs if corrected properly (Not used)
O
C2 error correction state display Outputs number of errors at C2 (Not used)
O
C2 error correction state display Outputs whether error is present at C1 (Not used)
O
C2 error correction state display Outputs number of errors at C1 (Not used)
I
Muting input “H” mute
–
+5V power supply
–
Ground
–
+5V power supply (Analog)
I
Comparator input (+) (QPSK input)
I
Comparator input (–)
–
Ground (Analog)
I
Test pin (Fixed at “L”)
–
+5V power supply
I
Test pin (Fixed at “L”)
O
Comparate output
O
Comparate inverted output
O
9.216MHz output (Not used)
–
Ground
O
Test pin (Not used)
O
Test pin (Not used)
O
Test pin (Not used)
O
Test pin (Not used)
O
Test pin (Not used)
I
Test pin (Fixed at “L”)
I
Test pin (Fixed at “L”)
–
Ground (Analog)
–
+5V power supply (Analog)
Function
— 39 —
• IC3311 Digital Audio Interface Receiver (CXD8521M)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
I/O
DIN1
1
DIN2
2
E/DOUT
3
VDD
4
R
5
VIN
6
VCO
7
GND
8
CKSEL
9
XMODE
AVOCK
TST1
TST2
SCLK
XLAT
SWDT
SRDT
DQSY
CKOUT
FS128
BCK
LRCK
DA TAO
EROR
I
Data input with built-in amplifier (Responding to the coaxial optical module)
I
Data input (Responding to the optical module)
O
Emphasis, input bi-phase, validity flag output
–
Power supply (+5V)
I
VCO gain control input (Fixed at “H”)
I
VCO freerunning frequency setting input
O
LPF setting of PLL (Fixed at “L”)
–
Ground
I
System clock select input (384fs, 512fs) (Connected to the power supply.)
I
Reset input
I
Clock input for preventing PLL lock failure
I
Test input (Normally “L”)
I
I
Microcomputer IF clock input
I
Microcomputer IF latch/chip enable input
I
Microcomputer IF write data input
O
Microcomputer IF read data output
O
Microcomputer IF Sub-Q sync and ID sync output (Not used)
O
VCO clock output (Freerunning, 384fs, 512fs) (Not used)
O
128fs clock output (Not used)
O
Bit clock output
O
L/R clock output
O
Audio data output
O
PLL lock error mute output
Function
FunctionPin No. Pin Name
• Abbreviation
VCO: Voltage Controlled Oscillator
PLL: Phase Locked Loop
— 40 —
• IC3410 DOLBY AC-3 decoder (DSP56009FJ88)
Pin No. Pin Name
AGND
1
MCS0
2
MA15
3
MA14
4
MA13
5
AVCC
6
MA12
7
AGND
8
QVCC
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
QGND
MA11
MA10
MA9
MA8
AGND
MA7
AVCC
MA6
MA5
MA4
AGND
MA3
MA2
MA1
MA0
SCK/SCL
EXTAL
QVCC
QGND
PINIT
PGND
PCAP
PVCC
SGND
MISO/SDA
RESET
MODA/IRQA
MODB/IRQB
MODC/NMI
SVCC
I/O
–
Address buffer ground
O
Chip select 0 output to S-RAM (Not used)
O
O
Address data output to S-RAM (Not used)
O
–
Address bus buffer power supply (+5V)
O
Address data output to S-RAM(Not used)
–
Ground for address bus buffer
–
Power supply for internal logic (+5V)
–
Ground for internal logic
O
O
Address data output to S-RAM (Not used)
O
O
Ground for address bus buffer
–
Address data output to S-RAM (Not used)
O
Power supply for address bus buffer (+5V)
–
O
Address data output to S-RAM (Not used)
O
O
Ground for address bus buffer
–
O
O
Address data output to S-RAM (Not used)
O
O
SPI serial clock signal input from system controller
I
External frequency input (3 MHz)
I
Power supply for internal logic (+5V)
–
Ground for internal logic
–
PLL initialize input (Fixed at “L”)
I
Ground for PLL
–
PLL filter input (Connected to 0.01 µF capacitor)
I
Power supply for PLL (+5V)
–
Ground for serial port
–
Master data signal input from system controller
I
Reset signal input from system controller
I
Mode select A (Fixed at “H”)
I
Mode select B (Fixed at “L”)
I
Mode select C (Fixed at “H”)
I
Power supply for serial port (+5V)
–
Function
Function
• Abbreviation
PLL: Phase Locked Loop
— 41 —
Pin No. Pin Name
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
MOSI/HA0
SS/HA2
HREQ
SGND
SDO2
SDO1
SDO0
SVCC
SCKT
WST
SCKR
QGND
QVCC
SGND
WSR
SDI1
SDI0
DSO
DSI/OS0
DSCK/OS1
DR
MD7
MD6
MD5
MD4
DGND
MD3
MD2
MD1
DVCC
MD0
DGND
GPIO3
GPIO2
GPIO1
GPIO0
MRD
MWR
MA15/MCS1
MA16/MCS2/MCAS
Function
I/O
O
Master data signal output to system controller
I
SPI slave select signal input from system controller
I
Host request signal input from system controller
–
Ground for serial port
O
Audio serial data 2 signal output (Not used)
O
Audio serial data 1 signal output
O
Audio serial data 0 signal output
–
Power supply for serial port (+5V)
O
Serial clock transmission
O
Word select transmission
I
Serial clock reception
–
Ground for internal logic
–
Power supply for internal logic (+5V)
–
Ground for serial port
I
Word select reception
I
Audio serial data 1 signal input
I
Audio serial data 0 signal input
O
Debug serial signal output (Not used)
I
Debug serial signal input (Not used)
I
Debug serial clock signal input (Not used)
I
Debug request input (Fixed at “H”)
I/O
I/O
Data input/output with S-RAM (Not used)
I/O
I/O
Ground for data bus buffer
–
I/O
Data input/output with S-RAM (Not used)
I/O
I/O
Power supply for data bus buffer (+5V)
–
Data input/output with S-RAM (Not used)
I/O
Ground for data bus buffer
–
I/O
I/O
General DSP input/output (Not used)
I/O
I/O
Write strobe signal output to S-RAM (Not used)
O
Read strobe signal output to S-RAM (Not used)
O
Low address strobe signal output to S-RAM (Not used)
O
Column address strobe signal output to S-RAM (Not used)
O
Function
— 42 —
• IC3412 DOLBY Surround Digital Signal Processor (SSP424023FJ88)
Pin No. Pin Name
AGND
1
MCS0
2
MA15
3
MA14
4
MA13
5
AVCC
6
MA12
7
AGND
8
QVCC
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
QGND
MA11
MA10
MA9
MA8
AGND
MA7
AVCC
MA6
MA5
MA4
AGND
MA3
MA2
MA1
MA0
SCK/SCL
EXTAL
QVCC
QGND
PINIT
PGND
PCAP
PVCC
SGND
MISO/SDA
RESET
MODA/IRQA
MODB/IRQB
MODC/NMI
SVCC
I/O
–
Address buffer ground
O
Chip select 0 output to S-RAM (Not used)
O
O
Address data output to S-RAM
O
–
Address bus buffer power supply (+5V)
O
Address data output to S-RAM
–
Ground for address bus buffer
–
Power supply for internal logic (+5V)
–
Ground for internal logic
O
O
Address data output to S-RAM
O
O
Ground for address bus buffer
–
Address data output to S-RAM
O
Power supply for address bus buffer (+5V)
–
O
Address data output to S-RAM
O
O
Ground for address bus buffer
–
O
O
Address data output to S-RAM
O
O
SPI serial clock signal input from system controller
I
External frequency input (3 MHz)
I
Power supply for internal logic (+5V)
–
Ground for internal logic
–
PLL initialize input (Fixed at “L”)
I
Ground for PLL
–
PLL filter input (Connected to 0.01 µF capacitor)
I
Power supply for PLL (+5V)
–
Ground for serial port
–
Master data signal input from system controller
I
Reset signal input from system controller
I
Mode select A (Fixed at “H”)
I
Mode select B (Fixed at “L”)
I
Mode select C (Fixed at “H”)
I
Power supply for serial port (+5V)
–
Function
Function
• Abbreviation
PLL: Phase Locked Loop
— 43 —
Pin No. Pin Name
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
MOSI/HA0
SS/HA2
HREQ
SGND
SDO2
SDO1
SDO0
SVCC
SCKT
WST
SCKR
QGND
QVCC
SGND
WSR
SDI1
SDI0
DSO
DSI/OS0
DSCK/OS1
DR
MD7
MD6
MD5
MD4
DGND
MD3
MD2
MD1
DVCC
MD0
DGND
GPIO3
GPIO2
GPIO1
GPIO0
MRD
MWR
MA15/MCS1
MA16/MCS2/MCAS
I/O
O
Master data signal output to system controller
I
SPI slave select signal input from system controller
I
Host request signal input from system controller
–
Ground for serial port
O
Audio serial data 2 signal output
O
Audio serial data 1 signal output
O
Audio serial data 0 signal output
–
Power supply for serial port (+5V)
O
Serial clock transmission
O
Word select transmission
I
Serial clock reception
–
Ground for internal logic
–
Power supply for internal logic (+5V)
–
Ground for serial port
I
Word select reception
I
Audio serial data 1 signal input
I
Audio serial data 0 signal input
O
Debug serial signal output (Not used)
I
Debug serial signal input (Not used)
I
Debug serial clock signal input (Not used)
I
Debug request input (Fixed at “H”)
I/O
I/O
Data input/output with S-RAM
I/O
I/O
Ground for data bus buffer
–
I/O
Data input/output with S-RAM
I/O
I/O
Power supply for data bus buffer (+5V)
–
Data input/output with S-RAM
I/O
Ground for data bus buffer
–
I/O
General DSP input/output (Not used)
I/O
I/O
General DSP output to system controller
O
Write strobe signal output to S-RAM
O
Read strobe signal output to S-RAM
O
Low address strobe signal output to S-RAM (Not used)
O
Column address strobe signal output to S-RAM
O
Function
Function
— 44 —
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