![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bg1.png)
A
Page Title of schematic page Rev. Date
01
Page List
02
Block Diagram
03
Change List
04
4 4
3 3
2 2
1 1
SNB 1/4(HOST&PCIE)
05
SNB 2/4(DDR3 I/F)
06
SNB 3/4(POWER)
07
SNB 4/4(GND/Strap)
08
PCH 1/6(DMI/FDI/VIDEO)
09
PCH 2/6(SATA/RTC/HDA/LPC)
10
PCH 3/6(PCIE/USB/CLK/NV)
11
PCH 4/6(GPIO/CPU/STRAP)
12
PCH 5/6(POWER)
13
PCH 6/6 (GND)
14
DDR3 DIMM-0-STD
15
DDR3 DIMM-1-STD
16
WPCE791L & FLASH
17
CRT/LVDS/CAMERA
18
CARD READER(RTS5209)
19
HDMI Conn/BT/THERMAL
20
USB/TP/FAN
21
LAN (RTL8111E)
22
WLAN/HOLE
23
HDD/ODD/EMI
24
Audio CX20671
25
LED/RF/KB/PS
26
POWER +VCC_CORE (ISL95831)
27
POWER 3VPCU&5VPCU(PM6686)
28
POWER 1.5VSUS/VTT_MEM
29
POWER +1.05V(UP6128A)-15A
30
POWER +0.85V(APE8858)-6A
31
POWER VGA_CORE(OZ8111)--15A
32
POWER VCC1.8/Thermal
POWER(ADAPTER IN / CONN)
33
POWER CHARGER (ISL88731C)
34
NVIDIA GS2-64 PCIE&PW 1/4
35
NVIDIA GS2-64 TMDS&DAC 2/4
36
NVIDIA GS2-64 VRAM 3/4
37
NVIDIA GS2-64 VRAM 4/4
38
IO PORT LIST
39
B
1A
C
* : No mount
E@ : For DIS GFX only
I@ : For INT GFX only
D
E
1
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
A
B
C
D
E
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bg2.png)
5
4
3
2
1
HK1 BLOCK DIAGRAM
02
intel
VRAM
1GB / 512MB
P37 ~ P38
PCIE4
Card Reader
RTS5209RTL8111E
MS
SD-XC
1
P18
PCIE6
NVIDIA
N12M-GS2/N12P-GV
PCI-Express Gen2
P35 ~ P38
P17
P19
PCIE1
iGFX
Interfaces
PCIE
5GT/s
INT_CRT
INT_LVDS
INT_HDMI
5GT/s
Package type GB1b-64
P17
D D
DDR III
P14~P15
Bluetooth
PORT5
Camera
PORT4
C C
WiMax
PORT9
USB I/O
PORT0
USB I/O
PORT1
USB I/O
PORT2
USB I/O
PORT3
P19
P17
P22
P20
P20
P20
P20
USB 2.0
Dual Channel
1066/1333 MHz
P21
HDD
P21
ODD
SATA0
SATA3
2.7GT/s
SATA Gen3
SATA Gen2
USB
SandyBridge
SYSTEM
MEMORY
FDI
rPGA 988
(37.5mm X 37.5mm)
FDI
DDR
intel
<PCH>
CougarPoint 0.7
mBGA 989
(25mm X 25mm)
DMI
DMIFDI
DMI
X4
5GT/s
PCI-E
X16
P4~P7
Giga-LAN
B B
HP Jack
Audio CODEC
CX20671
MIC Jack
SPK
P24
DMIC
Azalia
SPI ROM
4MB
P9
Wireless Switch
P24
A A
Note:
HM65 does not support USB 6 & 7
HM65 does not support SATA 2 & 3
P24
5
P24
P24
4
HDA
SPI
SPI ROM
2MB
P25
Touch Pad
P20
Keyboard
P25
P6~P11
LPC
EC
NPCE791L/NPCE795L
3
P16
RJ45
Power LED
Sleep LED
SATA LED
Battery LED
RF LED
SCROLED
CAPSLED
NUMLED
CARD LED
P21
WLAN/Widi/BT
BT Combo : Atheros WB195
WiMAX : Kelsey Peak KSP(612BNXHWG)
802.11bgn/Intel/KsP_1x2_BBY
P21
P22
Button
QWA#
VAIO#
ASSIST#
Power SW
2
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bg3.png)
Change List from PVT to MP
HK1_MB_SCH_PVT_001
P19-- R345 change to 48.7K.
Reason : Change thermal sensor temperature to 55 degree.
Possible Risk: No.
5
4
3
2
1
03
P19-- R208 change to 27.4K for UMA.
Reason : Change thermal sensor temperature to 82 degree.
Possible Risk: No.
HK1_MB_SCH_PVT_002
D D
P16-- KR27 change value from 10K to 4.7K.
P33-- PD7 change value from uClamp3301D to CDSOD323-T03C.
Reason : for Battery ESD protact.
Possible Risk: No.
C C
B B
A A
Quanta Computer Inc.
1
Huron River
3 39
2A
Size Document Number Rev
Wednesday, April 06, 2011
5
4
3
2
Date: Sheet of
PROJECT :
Change List
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bg4.png)
5
Sandy Bridge Processor (DMI,PEG,FDI) Sandy Bridge Processor (CLK,MISC,JTAG)
U17A
DMI_TXN0(8)
DMI_TXN1(8)
DMI_TXN2(8)
DMI_TXN3(8)
DMI_TXP0(8)
D D
C C
R328 24.9/F_4
+1.05V
B B
DMI_TXP1(8)
DMI_TXP2(8)
DMI_TXP3(8)
DMI_RXN0(8)
DMI_RXN1(8)
DMI_RXN2(8)
DMI_RXN3(8)
DMI_RXP0(8)
DMI_RXP1(8)
DMI_RXP2(8)
DMI_RXP3(8)
FDI_TXN0(8)
FDI_TXN1(8)
FDI_TXN2(8)
FDI_TXN3(8)
FDI_TXN4(8)
FDI_TXN5(8)
FDI_TXN6(8)
FDI_TXN7(8)
FDI_TXP0(8)
FDI_TXP1(8)
FDI_TXP2(8)
FDI_TXP3(8)
FDI_TXP4(8)
FDI_TXP5(8)
FDI_TXP6(8)
FDI_TXP7(8)
FDI_FSYNC0(8)
FDI_FSYNC1(8)
FDI_INT(8)
FDI_LSYNC0(8)
FDI_LSYNC1(8)
eDP_COMP
TP11
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
CPU-989P-rPGA
DMIIntel(R) FDI
eDP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
4
PEG_COMP
PEG_TXN15_C
PEG_TXN14_C
PEG_TXN13_C
PEG_TXN12_C
PEG_TXN11_C
PEG_TXN10_C
PEG_TXN9_C
PEG_TXN8_C
PEG_TXN7_C
PEG_TXN6_C
PEG_TXN5_C
PEG_TXN4_C
PEG_TXN3_C
PEG_TXN2_C
PEG_TXN1_C
PEG_TXN0_C
PEG_TXP15_C
PEG_TXP14_C
PEG_TXP13_C
PEG_TXP12_C
PEG_TXP11_C
PEG_TXP10_C
PEG_TXP9_C
PEG_TXP8_C
PEG_TXP7_C
PEG_TXP6_C
PEG_TXP5_C
PEG_TXP4_C
PEG_TXP3_C
PEG_TXP2_C
PEG_TXP1_C
PEG_TXP0_C
R175 24.9/F_4
PEG_RXN15 (35)
PEG_RXN14 (35)
PEG_RXN13 (35)
PEG_RXN12 (35)
PEG_RXN11 (35)
PEG_RXN10 (35)
PEG_RXN9 (35)
PEG_RXN8 (35)
PEG_RXN7 (35)
PEG_RXN6 (35)
PEG_RXN5 (35)
PEG_RXN4 (35)
PEG_RXN3 (35)
PEG_RXN2 (35)
PEG_RXN1 (35)
PEG_RXN0 (35)
PEG_RXP15 (35)
PEG_RXP14 (35)
PEG_RXP13 (35)
PEG_RXP12 (35)
PEG_RXP11 (35)
PEG_RXP10 (35)
PEG_RXP9 (35)
PEG_RXP8 (35)
PEG_RXP7 (35)
PEG_RXP6 (35)
PEG_RXP5 (35)
PEG_RXP4 (35)
PEG_RXP3 (35)
PEG_RXP2 (35)
PEG_RXP1 (35)
PEG_RXP0 (35)
C209 E@0.1U/10V/X5R_4
C201 E@0.1U/10V/X5R_4
C194 E@0.1U/10V/X5R_4
C187 E@0.1U/10V/X5R_4
C182 E@0.1U/10V/X5R_4
C179 E@0.1U/10V/X5R_4
C174 E@0.1U/10V/X5R_4
C171 E@0.1U/10V/X5R_4
C169 E@0.1U/10V/X5R_4
C167 E@0.1U/10V/X5R_4
C162 E@0.1U/10V/X5R_4
C157 E@0.1U/10V/X5R_4
C155 E@0.1U/10V/X5R_4
C153 E@0.1U/10V/X5R_4
C150 E@0.1U/10V/X5R_4
C148 E@0.1U/10V/X5R_4
C202 E@0.1U/10V/X5R_4
C197 E@0.1U/10V/X5R_4
C188 E@0.1U/10V/X5R_4
C183 E@0.1U/10V/X5R_4
C180 E@0.1U/10V/X5R_4
C175 E@0.1U/10V/X5R_4
C172 E@0.1U/10V/X5R_4
C170 E@0.1U/10V/X5R_4
C168 E@0.1U/10V/X5R_4
C163 E@0.1U/10V/X5R_4
C159 E@0.1U/10V/X5R_4
C156 E@0.1U/10V/X5R_4
C154 E@0.1U/10V/X5R_4
C151 E@0.1U/10V/X5R_4
C149 E@0.1U/10V/X5R_4
C147 E@0.1U/10V/X5R_4
0.22uF AC coupling Caps for PCIE GEN1/2/3
+1.05V
H_PROCHOT#
PEG_TXN15 (35)
PEG_TXN14 (35)
PEG_TXN13 (35)
PEG_TXN12 (35)
PEG_TXN11 (35)
PEG_TXN10 (35)
PEG_TXN9 (35)
PEG_TXN8 (35)
PEG_TXN7 (35)
PEG_TXN6 (35)
PEG_TXN5 (35)
PEG_TXN4 (35)
PEG_TXN3 (35)
PEG_TXN2 (35)
PEG_TXN1 (35)
PEG_TXN0 (35)
PEG_TXP15 (35)
PEG_TXP14 (35)
PEG_TXP13 (35)
PEG_TXP12 (35)
PEG_TXP11 (35)
PEG_TXP10 (35)
PEG_TXP9 (35)
PEG_TXP8 (35)
PEG_TXP7 (35)
PEG_TXP6 (35)
PEG_TXP5 (35)
PEG_TXP4 (35)
PEG_TXP3 (35)
PEG_TXP2 (35)
PEG_TXP1 (35)
PEG_TXP0 (35)
3
R190 56/J_4
PM_SYNC(8)
H_PWRGOOD(11)
CPU_PLTRST#
TP15
TP14
EC_PECI(16)
H_SNB_IVB#(9)
SKTOCC#
TP_CATERR#
H_PROCHOT#_R
PM_THRMTRIP#(7,11)
R332 *0_4S
C457 0.1U/10V/X5R_4
R333 22/J_4
R334 10K/J_4
PM_DRAM_PWRGD_R
R336 43_4
R338 75/J_4
CPU_PLTRST#
AN34
AL33
AN33
AL32
AN32
AM34
AP33
AR33
+1.05V
6
1
U17B
C26
PROC_SELECT#
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
PM_SYNC
UNCOREPWRGOOD
V8
SM_DRAMPWROK
RESET#
CPU-989P-rPGA
+3V_S5
R337
1K_4
2
4 3
PLTRST# (10,16,18,21,22)
5
Q21
2N7002DW
MISCTHERMAL
PWR MANAGEMENT
2
CLOCKS
DDR3
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
MISC
JTAG & BPM
BCLK
BCLK#
PRDY#
PREQ#
TCK
TMS
TRST#
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
1
04
A28
A27
A16
A15
R8
AK1
A5
A4
AP29
AP27
AR26
AR27
AP30
AR28
TDI
AP26
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
CLK_CPU_BCLKP (10)
CLK_CPU_BCLKN (10)
R329 E@1K_4
R330 E@1K_4
CPU_DRAMRST# (5)
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO
R331 *0_4S
TP24
TP25
TP23
TP22
TP17
TP20
TP21
TP18
+1.05V
CLK_DPLL_SSCLKP (10)
CLK_DPLL_SSCLKN (10)
+1.05V
R185 140/F_4
R324 25.5/F_4
R325 200/F_4
R199 *51_4
R201 51_4
R200 51_4
R335 51_4
R339 51_4
TP19
XDP_DBRST# (8)
R187
62_4
H_PROCHOT#
3
+1.05V
+1.05V
+1.05V
H_PROCHOT# (26)
SNB_IVB#:
- It is NC when using Sandy Bridge.(1.05V)
- For next generation processor it will be grounded in package.(1.0V)
A A
ALL_SYS_PWRGD(8,16,26,28,30,31,32)
FDI Disabling (Discrete Only)
-FDI_FSYNC (J18/J17/J19/H17) can gang all these
4 signals together and tie them with only one
1K resistor to GND (DG V0.5 Ch2.2.9).
- FDI_INT connect to GND with 1K ohm.
5
PM_DRAM_PWRGD(8)
4
+3V
C380 0.1U/10V/X5R_4
2
U7
74AHC1G09
1
3 5
4
R169 *39
+1.5V
R157
200/F_4
R158 130/F_4
3
Q7 *2N7002
2
3
PM_DRAM_PWRGD_R
1
MAING (27,28,31,32)
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green Partners.
2
PROCHOT(16)
Size Document Number Rev
Date: Sheet of
2
2N7002
1
R202
*100K/F_4
Sandy Bridge 1/4
Sunday, April 03, 2011
Q10
C278
43P/50V/NPO_4
Quanta Computer Inc.
PROJECT :
Huron River
4 39
1
1A
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bg5.png)
5
Sandy Bridge Processor (DDR3)
U17C
AB6
SA_CLK[0]
M_A_DQ[63:0](14)
D D
C C
B B
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_BS#0(14)
M_A_BS#1(14)
M_A_BS#2(14)
M_A_CAS#(14)
M_A_RAS#(14)
M_A_WE#(14)
F10
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AK8
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
AE8
AD9
AF9
C5
D5
D3
D2
D6
C6
C2
C3
F8
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N8
N7
M9
N9
M7
AJ5
AJ6
AJ8
AJ9
V6
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
CPU-989P-rPGA
+1.5V_SUS
RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]
RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]
RSVD_TP[7]
RSVD_TP[8]
RSVD_TP[9]
RSVD_TP[10]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
DDR SYSTEM MEMORY A
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
4
M_B_DQ[63:0](15)
M_A_CLKP0 (14)
M_A_CLKN0 (14)
M_A_CKE0 (14)
M_A_CLKP1 (14)
M_A_CLKN1 (14)
M_A_CKE1 (14)
M_A_CS#0 (14)
M_A_CS#1 (14)
M_A_ODT0 (14)
M_A_ODT1 (14)
M_A_DQSN[7:0] (14)
M_A_DQSP[7:0] (14)
M_A_A[15:0] (14)
3
U17D
AE2
SB_CLK[0]
AD2
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS#0(15)
M_B_BS#1(15)
M_B_BS#2(15)
M_B_CAS#(15)
M_B_RAS#(15)
M_B_WE#(15)
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AP6
AN8
AR6
AR5
AR9
AJ11
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA10
D10
K10
AT5
AT6
AT8
AT9
AA9
AA7
AB8
AB9
C9
A7
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
R6
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
CPU-989P-rPGA
SB_CLK#[0]
SB_CKE[0]
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]
RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]
SB_CS#[0]
SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]
SB_ODT[0]
SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
R9
AE1
AD1
R10
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
AE4
AD4
AD5
AE5
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_CLKP0 (15)
M_B_CLKN0 (15)
M_B_CKE0 (15)
M_B_CLKP1 (15)
M_B_CLKN1 (15)
M_B_CKE1 (15)
M_B_CS#0 (15)
M_B_CS#1 (15)
M_B_ODT0 (15)
M_B_ODT1 (15)
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
2
M_B_DQSN[7:0] (15)
M_B_DQSP[7:0] (15)
M_B_A[15:0] (15)
1
05
R170
A A
R160 1K/F_4
DRAMRST_CNTRL_PCH(10)
DRAMRST_CNTRL_EC(16)
5
1K/F_4
R172 *0_4S
R171 *0_4
R165 *0_4
3
2
C161
0.047U/10V_4
Q8
2N7002
1
4
R161
4.99K/F_4
CPU_DRAMRST# (4)DDR3_DRAMRST#(14,15)
Quanta Computer Inc.
1.Level 1 Environment-related Substances Should Never be Used.
3
2.Recycled Resin and Coated Wire should be procured from Green Partners.
2
Size Document Number Rev
Sunday, April 03, 2011
Date: Sheet of
PROJECT :
Sandy Bridge 2/4
Huron River
5 39
1
1A
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bg6.png)
5
Sandy Bridge Processor (POWER)
4
3
2
1
06
Sandy Bridge Processor (GRAPHIC POWER)
R195
75/J_4
2
POWER
SENSE
GRAPHICS
DDR3 -1.5V RAILS
SA RAIL VREFMISC
1.8V RAIL
+1.05V
R218
54.9/F_4
(50 ohm)
Close to VR
R347
130/F_4
(50 ohm)
R197 *0_4S
(50 ohm)
VAXG_SE NSEVAXG1
VSSAXG_ SENSE
LINES
SM_VREF
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA_SE NSE
FC_C22
VCCSA_VID1
SVID CLK
Close to VR
SVID DATA
SVID ALERT
AK35AT24
AK34
+VDDR_REF_CPU
AL1
CAD Note: +VDDR_REF_CPU should
have 10 mil trace width
(4A)
AF7
+1.5V
AF4
AF1
C279 *330 U/2V_73 43
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
VR_SVID_CLK (26)
VR_SVID_DATA (26)
VR_SVID_ALERT# (26)
SNB:6A
C199 10U/6.3V/X 5R_6
C207 10U/6.3V/X 5R_6
C192 10U/6.3V/X 5R_6
C195 *10U/6.3V_ 6
H_FC_C22
VCCSA_SE L (30)
C266 10U/6.3V/X5R_6
C215 10U/6.3V/X5R_6
C239 10U/6.3V/X5R_6
C210 10U/6.3V/X5R_6
C249 10U/6.3V/X5R_6
+0.85V
R168 10K/J_4
R191 I@10/F_4
R198 I@10/F_4
+VDDR_REF_CPU
+
(For +0.85V)
VCCUSA_SENSE (30)
+VCC_GFX
VCC_AXG_ SENSE (26)
VSS_AXG_SENSE (26)
Quanta Computer Inc.
Size Document Number Rev
Monday, February 21, 2011
Date: Sheet of
PROJECT :
Sandy Bridge 3/4
1
Huron River
6 39
1A
POWER
U17F
+VCC_GFX
(1.2A)
+1.8V
C164
10U/6.3V/X5R_6
+VDDR_REF_CPU+SMDDR_VREF
1
Q22
2N7002K
2
R340
100K/J_4
C246
330U/2V/7343/ES R=9
C253 *22U/6.3V /X5R_8
C262 10U/6.3V/X5R_8
C387 10U/6.3V/X5R_8
C225 10U/6.3V/X5R_8
C390 10U/6.3V/X5R_8
C393 10U/6.3V/X5R_8
C388 10U/6.3V/X5R_8
C275 *22U/6.3V /X5R_8
C252 *22U/6.3V /X5R_8
C277 22U/6.3V/X5R_8
C399 10U/6.3V/X5R_8
C243 10U/6.3V/X5R_8
C236 22U/6.3V/X5R_8
C396 10U/6.3V/X5R_8
C276 22U/6.3V/X5R_8
C206 10U/6.3V/X5R_8
C204 10U/6.3V/X5R_6
C237 10U/6.3V/X5R_6
C254 10U/6.3V/X5R_6
C263 10U/6.3V/X5R_6
C248 10U/6.3V/X5R_6
C238 10U/6.3V/X5R_6
C219 10U/6.3V/X5R_6
C218 10U/6.3V/X5R_6
C234 10U/6.3V/X5R_6
C217 10U/6.3V/X5R_6
HOLE1
*intel-CPU-bracket
CPU Core Power
SNB:55A
SNB:55A
+
+
C228
330U/2V/7343/ES R=9
34
5
+VCC_CORE
C251
330U/2V/7343/ES R=9
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
CPU-989P-rP GA
8.5A
AH13
VCCIO1
AH10
VCCIO2
AG10
VCCIO3
AC10
VCCIO4
Y10
VCCIO5
U10
VCCIO6
P10
VCCIO7
L10
VCCIO8
J14
VCCIO9
J13
VCCIO10
J12
VCCIO11
J11
VCCIO12
H14
VCCIO13
H12
VCCIO14
H11
VCCIO15
G14
VCCIO16
G13
VCCIO17
G12
VCCIO18
F14
VCCIO19
F13
VCCIO20
F12
VCCIO21
F11
VCCIO22
E14
VCCIO23
E12
VCCIO24
E11
VCCIO25
D14
VCCIO26
D13
VCCIO27
D12
VCCIO28
D11
VCCIO29
C14
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
4
PEG AND DDRSENSE LINES SVID
CORE SUPPLY
+1.05V
+
C198 *470 U/2V_73 43
C402 10U/6.3V/X 5R_6
C397 10U/6.3V/X 5R_6
C391 10U/6.3V/X 5R_6
C211 10U/6.3V/X 5R_6
C385 10U/6.3V/X 5R_6
C386 10U/6.3V/X 5R_6
C227 10U/6.3V/X 5R_6
C260 10U/6.3V/X 5R_6
C384 10U/6.3V/X 5R_6
C392 10U/6.3V/X 5R_6
C389 1U/10V/X5R_4
C247 1U/10V/X5R_4
C270 1U/10V/X5R_4
C250 1U/10V/X5R_4
C231 1U/10V/X5R_4
C220 1U/10V/X5R_4
C408 1U/10V/X5R_4
C406 1U/10V/X5R_4
C400 1U/10V/X5R_4 C229 10U/6.3V/X5R_6
C398 1U/10V/X5R_4
C395 1U/10V/X5R_4
C241 1U/10V/X5R_4
C264 1U/10V/X5R_4
C191 1U/10V/X5R_4
C224 1U/10V/X5R_4
C208 1U/10V/X5R_4
C255 1U/10V/X5R_4
C242 1U/10V/X5R_4
C274 1U/10V/X5R_4
R174 *0_4S
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
+1.05V
R183 100_4
R188 100_4
VCCP_SENSE (29)
VSSP_SE NSE (29)
+VCC_CORE
VCC_SENSE (26)
VSS_SENSE (26)
MAIND(27,28)
R341 *0_8
3
MAIND
3
D D
+
C221
330U/2V/7343/ES R=9
+
12
+
PC415
390U/2.5V/6.3X6/ESR=10/SVPE
C C
B B
A A
1 2
22A
+
C268 I@330U/2V_7343
+
C411 I@330U/2V_7343
+
C409 *I@33 0U/2V_7 343
C404 I@10U/6.3V/X5R_8
C403 I@10U/6.3V/X5R_8
C407 I@10U/6.3V/X5R_8
C280 I@22U/6.3V/X5R_8
C283 I@22U/6.3V/X5R_8
C291 I@22U/6.3V/X5R_8
C401 I@10U/6.3V/X5R_8
C284 *I@2 2U/6.3V_8
C290 I@22U/6.3V/X5R_8
C297 I@22U/6.3V/X5R_8
C405 I@10U/6.3V/X5R_8
C410 *I@2 2U/6.3V_8
R181 E@0_4
+
C166
1U/10V/X5R_4
Layout note: need routing
together and ALERT need
between CLK and DATA
H_CPU_SVIDCLK
Place PU resistor close to CPU
H_CPU_SVIDDAT
C186
*330U/2V_7343
C165
1U/10V/X5R_4
+1.05V +1.05V
Place PU resistor close to CPU
H_CPU_SVIDALRT#
U17G
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
CPU-989P-rP GA
R189 *0_4 S
R184
130/F_4
R186 *0_4S
+1.05V
R192 43_4
1.Level 1 Environment-related Substances Should Never be Used.
2.Rec ycled Resin and Coated Wire should be procured from Green Partners.
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bg7.png)
5
4
3
2
1
Sandy Bridge Processor (GND)
U17H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
AT13
VSS9
AT10
D D
C C
B B
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
CPU-989P-rPGA
Processor Strapping
CFG2
A A
(PEG Static Lane Reversal)
CFG4
(DP Presence Strap)
CFG7
(PEG Defer Training)
AJ22
VSS81
AJ19
VSS82
AJ16
VSS83
AJ13
VSS84
AJ10
VSS85
AJ7
VSS86
AJ4
VSS87
AJ3
VSS88
AJ2
VSS89
AJ1
VSS90
AH35
VSS91
AH34
VSS92
AH32
VSS93
AH30
VSS94
AH29
VSS95
AH28
VSS96
AH26
VSS97
AH25
VSS98
AH22
VSS99
AH19
VSS100
AH16
VSS101
AH7
VSS102
AH4
VSS103
AG9
VSS104
AG8
VSS105
AG4
VSS106
AF6
VSS107
AF5
VSS108
AF3
VSS109
AF2
VSS110
AE35
VSS111
AE34
VSS112
AE33
VSS113
AE32
VSS114
AE31
VSS115
AE30
VSS116
AE29
VSS117
AE28
VSS118
AE27
VSS119
AE26
VSS120
AE9
VSS121
AD7
VSS122
AC9
VSS123
AC8
VSS124
AC6
VSS125
AC5
VSS126
AC3
VSS127
AC2
VSS128
AB35
VSS129
AB34
VSS130
AB33
VSS131
AB32
VSS132
AB31
VSS133
AB30
VSS134
AB29
VSS135
AB28
VSS136
AB27
VSS137
AB26
VSS138
Y9
VSS139
Y8
VSS140
Y6
VSS141
Y5
VSS142
Y3
VSS143
Y2
VSS144
W35
VSS145
W34
VSS146
W33
VSS147
W32
VSS148
W31
VSS149
W30
VSS150
W29
VSS151
W28
VSS152
W27
VSS153
W26
VSS154
U9
VSS155
U8
VSS156
U6
VSS157
U5
VSS158
U3
VSS159
U2
VSS160
The CFG signals have a default value of '1' if not terminated on the board.
Normal Operation
Disable; No physical DP attached to eDP
PEG train immediately following
xxRESETB de assertion
5
U17I
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
CPU-989P-rPGA
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
CFG2
CFG4
CFG7
1 0
Lane Reversed
Enable; An ext DP device is connected to eDP
PEG wait for BIOS training
4
SMDDR_VREF_DQ0_M3(14)
SMDDR_VREF_DQ1_M3(15)
H_SNB_IVB#_PWRCTRL(29)
R210 1K/F_4
R209 *1K/F_4
R196 *1K/F_4
Sandy Bridge Processor (RESERVED, CFG)
U17E
L7
RSVD28
AG7
TP13
TP12
TP16
R326
*1K_4
R327 *0_4
AK28
CFG[0]
AK29
CFG2
CFG4CFG4
CFG5
CFG6
CFG7CFG7
R173
*1K_4
CFG5
CFG6
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
B4
RSVD6
D1
RSVD7
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
A19
VCCIO_SEL
J15
RSVD27
CPU-989P-rPGA
PM_THRMTRIP#(4,11)
R194 *1K/F_4
R193 *1K/F_4
CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - X16 PEG interface
10: PEG x8 x8 bifurcation enableddisabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
1.Level 1 Environment-related Substances Should Never be Used.
3
2.Recycled Resin and Coated Wire should be procured from Green Partners.
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RESERVED
RSVD51
RSVD52
VCC_DIE_SENSE
RSVD54
RSVD55
RSVD56
RSVD57
RSVD58
KEY
R212 330/F_4
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AH27
AN35
AM35
AT2
AT1
AR1
B1
Q12
MMBT3904
+5V
R214
200K/F_4
3
2
C317
1
0.1U_4
2
07
SHDN# (16,19,27,32)
6
2
5
1
4 3
Size Document Number Rev
Monday, February 21, 2011
Date: Sheet of
C474
*1000P_4
Q11
2N7002DW
Sandy Bridge 4/4
R366 22/J_4
IMVP_PWRGD (8,16,26)
Quanta Computer Inc.
PROJECT :
Huron River
7 39
1
1A
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bg8.png)
5
DMI_RXN0(4)
DMI_RXN1(4)
DMI_RXN2(4)
DMI_RXN3(4)
DMI_RXP0(4)
DMI_RXP1(4)
DMI_RXP2(4)
D D
R321 49.9/F_4
+1.05V
R145 750/F_4
SUS_PWR_ACK
SUSACK#(16)
XDP_DBRST#(4)
C C
IMVP_PWRGD(7,16,26)
PCH_PWROK_EC(16)
PM_DRAM_PWRGD(4)
B B
R255 *0_4S
R257 *0_4
R365 22/J_4
C473 1000P/50V/X7R/10%_4
R37 *0_4S
ALL_SYS_PWRGD(4,16,26,28,30,31,32)
RSMRST#(16)
SUS_PWR_ACK(16)
EC_PWRBTN#(16)
AC_PRESENT(16)
DMI_RXP3(4)
DMI_TXN0(4)
DMI_TXN1(4)
DMI_TXN2(4)
DMI_TXN3(4)
DMI_TXP0(4)
DMI_TXP1(4)
DMI_TXP2(4)
DMI_TXP3(4)
DMI_COMP
DMI2RBIAS
XDP_DBRST#
PWROK_R
R38 *0_4S
R28 *0_4
PM_DRAM_PWRGD
RSMRST#
SUS_PWR_ACK
AC_PRESENT
PM_BATLOW#
PM_RI#
Cougar Point (DMI,FDI,PM)
U16C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
SUSACK#_R
SYS_PWROK
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
CougarPoint_R1P0
DMI
+3V
+3V_S5
+3V_S5
+3V_S5
System Power Management
DSW
+3V_S5
+3V_S5
4
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
+3V_S5
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN# / GPIO29
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVREN
DPWROK
PCIE_WAKE#
CLKRUN#
FDI_TXN0 (4)
FDI_TXN1 (4)
FDI_TXN2 (4)
FDI_TXN3 (4)
FDI_TXN4 (4)
FDI_TXN5 (4)
FDI_TXN6 (4)
FDI_TXN7 (4)
FDI_TXP0 (4)
FDI_TXP1 (4)
FDI_TXP2 (4)
FDI_TXP3 (4)
FDI_TXP4 (4)
FDI_TXP5 (4)
FDI_TXP6 (4)
FDI_TXP7 (4)
R69 *0_4S
T1
R278 *0_4S
T3
T6
T4
T2
PM_SYNC (4)
R360 *10K/J_4
FDI_INT (4)
FDI_FSYNC0 (4)
FDI_FSYNC1 (4)
FDI_LSYNC0 (4)
FDI_LSYNC1 (4)
PCIE_WAKE# (21)
+3V_S5
+3V
RSMRST#
PCH_SUSCLK (16)
SLP_S5# (16)
SLP_S4# (16)
SLP_S3# (16)
SLP_SUS# (16)
3
R54 2.2K_4
R50 2.2K_4
INT_LVDS_BLON(16)
INT_LVDS_VDDEN(17)
INT_LVDS_BRIGHT(17)
INT_EDIDCLK(17)
INT_EDIDDAT(17)
R116 I@2.37K/F_4
INT_TXLCLKOUTN(17)
INT_TXLCLKOUTP(17)
INT_TXLOUTN0(17)
INT_TXLOUTN1(17)
INT_TXLOUTN2(17)
INT_TXLOUTP0(17)
INT_TXLOUTP1(17)
INT_TXLOUTP2(17)
INT_CRT_BLU(17)
INT_CRT_GRE(17)
INT_CRT_RED(17)
INT_DDCCLK(17)
INT_DDCDAT(17)
INT_CRT_HSYNC(17)
INT_CRT_VSYNC(17)
+3V
INT_EDIDCLK
INT_EDIDDAT
INT_EDIDCLK
INT_EDIDDAT
R92 2.2K_4
R94 2.2K_4
LVDS_IBG
T7
INT_TXLCLKOUTN
INT_TXLCLKOUTP
INT_TXLOUTN0
INT_TXLOUTN1
INT_TXLOUTN2
INT_TXLOUTP0
INT_TXLOUTP1
INT_TXLOUTP2
INT_CRT_BLU
INT_CRT_GRE
INT_CRT_RED
DAC_IREF
R103
1K/F_4
2
Cougar Point (LVDS,DDI)
U16D
AF37
AF36
AE48
AE47
AK39
AK40
AN48
AM47
AK47
AJ48
AN47
AM49
AK49
AJ47
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43
J47
M45
P45
T40
K47
T45
P39
N48
P49
T49
T39
M40
M47
M49
T43
T42
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
CougarPoint_R1P0
R90 I@150/F_4
R95 I@150/F_4
R100 I@150/F_4
LVDS
Digital Display Interface
CRT
R place close to PCH
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPD_CTRLCLK
DDPD_CTRLDATA
INT_CRT_BLU
INT_CRT_GRE
INT_CRT_RED
SDVO_INTN
SDVO_INTP
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
INT_HDMI_TXDN2_C
INT_HDMI_TXDP2_C
INT_HDMI_TXDN1_C
INT_HDMI_TXDP1_C
INT_HDMI_TXDN0_C
INT_HDMI_TXDP0_C
INT_HDMI_TXCN_C
INT_HDMI_TXCP_C
INT_HDMI_SCL (19)
INT_HDMI_SDA (19)
INT_HDMI_HPD_Q (19)
C378 I@0.1U/10V/X5R_4
C379 I@0.1U/10V/X5R_4
C365 I@0.1U/10V/X5R_4
C366 I@0.1U/10V/X5R_4
C368 I@0.1U/10V/X5R_4
C369 I@0.1U/10V/X5R_4
C375 I@0.1U/10V/X5R_4
C373 I@0.1U/10V/X5R_4
1
08
INT_HDMI_TXDN2 (19,36)
INT_HDMI_TXDP2 (19,36)
INT_HDMI_TXDN1 (19,36)
INT_HDMI_TXDP1 (19,36)
INT_HDMI_TXDN0 (19,36)
INT_HDMI_TXDP0 (19,36)
INT_HDMI_TXCN (19,36)
INT_HDMI_TXCP (19,36)
INT. DP
INT. HDMI
15VPCU
5
R8
1M_4
+3V_S5
6
2
Q1
2N7002DW
1
4 3
+3V_S3
2
Size Document Number Rev
Sunday, April 03, 2011
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Cougar Point 1/6
Huron River
1
8 39
1A
2
1
3
+3V_S5
U25
*TC7SH08FU
3 5
SYS_PWROK
4
SUSG(27)
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green Partners.
PCH Pull-high/low(CLG)
+3V
CLKRUN#
XDP_DBRST#
RSMRST#
A A
PWROK_R
R93 8.2K/J_4
R78 10K/J_4
R71 *1K_4
R70 47K_4
R30 47K_4
PM_RI#
PM_BATLOW#
PCIE_WAKE#
SUS_PWR_ACK
AC_PRESENT
PM_DRAM_PWRGD
5
R256 10K/J_4
R35 8.2K/J_4
R253 10K/J_4
R34 10K/J_4
R13 *10K/J_4
R7 200/F_4
+3V_S5
On Die DSW VR Enable
+3V_S3
High = Enable (Default)
Low = Disable
DSWVREN
+3V_RTC
4
R241
330K/J_4
R239
*330K/J_4
IMVP_PWRGD(7,16,26)
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
C475 *0.1U/10V/X5R_4
R367 *22/J_4
PCH_PWROK_EC(16)
R132 E@1K_4
R139 E@1K_4
R144 E@1K_4
R131 E@1K_4
R138 E@1K_4
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bg9.png)
5
RTC Circuitry(RTC)
20mils
20MIL
20MIL
CON16
AAA-BAT-054-K01
2 1
D19 SW1010CPT
2 3
D18 BAS70
+3VPCU
D D
+3V_RTC_1
R344
1K/J_4
12
PCH SPI (CLG)
C C
PCH_SPI_SO
3VPGD(16,27)
+3V_SPI
ACZ_SYNC(24)
R120 *0_4S
R123 3.3K_4
PCH Strap Table
B B
SPKR
GNT3# / GPIO55
INTVRMEN
GNT1# / GPIO51
GPIO19
HDA_SDO
A A
DF_TVS
+3V_RTC
R238 20K/J_4
30mils
R236 20K/J_4
C425
1U/10V/X5R_4
MX25L3205DM2I-12G: AKE39FP0Z00
W25X32VSSIG: AKE39ZP0N00
C37 0.1U/10V/X5R_4
PCH_SPI_CS0#
R49 33K/J_4
+5V
R21 33/J_4
F_CS0#_PCH(16)
F_SDI_PCH(16)
SCK_PCH(16)
SD0_PCH(16)
U3
1
VDD
/CS
2
/HOLD
DO
3 6
/WP CLK
4
GND
DI
W25X32VSSIG
2
1
R22 *0_4
R121 *0_4S
R67 *0_4S
R65 *0_4S
R122 *0_4S
For NPCE795L Using
Strap descriptionPin Name
No reboot mode setting
Top-Block Swap Override
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
Flash Descriptor Security
DMI/FDI Termination voltage
C351
1U/10V/X5R_4
C350
1U/6.3V_4
8
7
5
3
Q2
2N7002
+3V_SPI
R61 *0_4S
R62 *0_4
R63 3.3K_4
R64 *0_4S
R66 *0_4S
C23
*33P_4
ACZ_SYNC_R
PCH_SPI_CS0#
PCH_SPI_SO
PCH_SPI_CLK
PCH_SPI_SI
Sampled
PWROK
PWROK
ALWAYSIntegrated 1.05V VRM enable
PWROK
PWROK
PWROK
PWROK
4
C349 18P/50V_4
RTC_RST#
12
J2
*SHORT_ PAD1
SRTC_RST#
12
J1
*SHORT_ PAD1
+3V_S5
+3V
PCH_SPI_CLK
PCH_SPI_SI
C352 18P/50V_4
+3V_SPI
Configuration
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
Should be always pull-up
GNT1# GNT0#
1 1
0
0 = Default (weak pull-down 20K)
1 = Enabled
0 = Set to Vss
1 = Set to Vcc (weak pull-down 20K)
0
ACZ_BITCLK(24)
ACZ_RST#(24)
ACZ_SDOUT(24)
ACZ_SDOUT_R(16)
Boot Location
SPI
LPC
41
2 3
+3V_RTC
Y1
32.768KHZ
R235
10M/J_4
R79 1M/J_4
R52 33/J_4
SPKR(24)
R247 33/J_4
ACZ_SDIN0(24)
R251 33/J_4
TP39
HK1/HK2 note
R105 *1K_4
+3V
R270 *1K_4
R242 330K/J_4
+3V_RTC
Default weak pull-up on GNT0/1#
[Need external pull-down for LPC BIOS]
*
R266 *1K_4
R289 *1K_4
R250 *1K_4
+3V
R140 2.2K_4
R320 1K_4
3
RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_BITCLK_R
ACZ_SYNC_R
SPKR
ACZ_RST#_R
TP4
ACZ_SDOUT_R
TP1
TP8
PCH_JTAG_TCK_R
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_SI
PCH_SPI_SO
BBS_BIT0
ACZ_SDOUT_R
+1.8V
2
Cougar Point (HDA,JTAG,SATA)
U16A
SPKR
PCI_GNT3# (10)
PCH_INVRMEN
BBS_BIT1 (10)
NV_CLE (11)
H_SNB_IVB# (4)
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CougarPoint_R1P0
RTCIHDA
JTAG
SPI
+3V
+3V
FWH4 / LFRAME#
+3V
LDRQ1# / GPIO23
SATA 6G
+3V
SATA LPC
+3V_S5
SATAICOMPO
SATA3RCOMPO
SATA3COMPI
SATA0GP / GPIO21
SATA1GP / GPIO19
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
SATAICOMPI
SATA3RBIAS
LDRQ0#
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATALED#
C38
A38
B37
C37
D36
E36
K36
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
PCH_DRQ#0
PCH_DRQ#1
SERIRQ
SATA_TXN0_C
SATA_TXP0_C
SATA_TXN3_C
SATA_TXP3_C
SATA_COMP
SATA3_COMP
SATA3_RBIAS
GPIO21
BBS_BIT0
SERIRQ
GPIO21
LPC_AD0 (16,22)
LPC_AD1 (16,22)
LPC_AD2 (16,22)
LPC_AD3 (16,22)
LPC_FRAME# (16,22)
TP3
TP6
SERIRQ (16)
C102 0.01U/25V_4
C108 0.01U/25V_4
C363 0.01U/25V_4
C364 0.01U/25V_4
R106 37.4/F_4
R114 49.9/F_4
R308 750/F_4
SATA_ACT# (25)
1
+3V
R293 8.2K/J_4
R104 10K_4
SATA_RXN0 (23)
SATA_RXP0 (23)
SATA_TXN0 (23)
SATA_TXP0 (23)
SATA HDD/SSD RAID
SATA_RXN3 (23)
+1.05V
SATA_RXP3 (23)
SATA_TXN3 (23)
SATA_TXP3 (23)
SATA ODD
PCH JTAG Debug (CLG)
+3V_S5
R43
R55
210/F_4
210/F_4
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TCK_R
R271
51/J_4
R51
100/F_4
R42
100/F_4
09
GPIO28
HDA_SYNC
On-die PLL Voltage Regulator
On-Die PLL VR Voltage Select
5
RSMRST#
RSMRST
0 = Disable
1 = Enable (Default)
0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V
4
R91 *1K_4
+3V_S5
R29 1K_4
3
PLL_ODVR_EN (11)
ACZ_SYNC_R
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green Partners.
2
Quanta Computer Inc.
Size Document Number Rev
Sunday, April 03, 2011
Date: Sheet of
PROJECT :
Cougar Point 2/6
Huron River
1
9 39
1A
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bga.png)
5
4
3
2
1
10
Cougar Point-M (PCI,USB,NVRAM)
WLAN
PCIE_RXN4_CARD(18)
PCIE_RXP4_CARD(18)
PCIE_TXN4_CARD(18)
PCIE_TXP4_CARD(18)
PCIE_RXN1(22)
PCIE_RXP1(22)
PCIE_TXN1(22)
PCIE_TXP1(22)
PCIE_RXN6_LAN(21)
PCIE_RXP6_LAN(21)
PCIE_TXN6_LAN(21)
PCIE_TXP6_LAN(21)
Express CARD
LAN
3
PCIE_CLKREQ_WLAN#(22)
USB 3.0
Card
PCIE_REQ_CARD#(18)
PCIE_CLKREQ_LAN#(21)
+3V_S5
C130 0.1U/10V/X5R_4
C129 0.1U/10V/X5R_4
C131 0.1U/10V/X5R_4
C132 0.1U/10V/X5R_4
C110 0.1U/10V/X5R_4
C112 0.1U/10V/X5R_4
CLK_PCIE_WLANN(22)
CLK_PCIE_WLANP(22)
SMBus/Pull-up(CLG)CLK_REQ/Strap Pin(CLG)
MBCLK(16,25,34)
MBDATA(16,25,34)
R232 2.2K_4
R20 2.2K_4
+3V_S5
R258 1K/J_4
R33 10K/J_4
R262 2.2K_4
R31 2.2K_4
R14 10K/J_4
U16E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
PIRQF#
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
TP21
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CougarPoint_R1P0
RSVD
PCI
+3V
+3V
+3V
USB
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
PCI/USBOC# Pull-up(CLG)
+3V_S5
10
USB_OC2#
USB_OC5#
USB_OC3#
USB_OC0#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PIRQF#
EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH
9
8
7 4
B21
M20
AY16
BG46
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
K40
K38
H38
G38
C46
C44
E40
D47
TP31
E42
F46
G42
G40
C42
D44
K10
C6
H49
H43
J48
K42
MPC Switch Control
MPC_PWR_CTRL#
MPC_PWR_CTRL#
D D
C C
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
BBS_BIT1(9)
PCI_GNT3#(9)
CLK_PCI_FB
R82 22/J_4
CLK_PCI_LPC(22)
CLK_PCI_EC(16)
B B
C470
R88 22/J_4
*33P/50V/NPO_4
R72 22/J_4
TP5
PCI_GNT3#
MPC_PWR_CTRL#
EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH
PCI_PME#
PCI_PLTRST#
CLK_PCI_FB_R
CLK_PCI_LPC_R
CLK_PCI_EC_R
PLTRST#(CLG)
+3V_S5
C46
E@0.1U/10V/X5R_4
PCI_PLTRST#
A A
R80
100K/J_4
2
1
U15
3 5
E@TC7SH08FU
R73 *0_4S
4
PLTRST# (4,16,18,21,22)
C354
*0.1U/10V/X5R_4
5
R60
E@100K/J_4
PLTRST_DIS# (35)
AY7
RSVD1
AV7
RSVD2
AU3
RSVD3
BG4
RSVD4
AT10
RSVD5
BC8
RSVD6
AU2
RSVD7
AT4
RSVD8
AT3
RSVD9
AT1
RSVD10
AY3
RSVD11
AT5
RSVD12
AV3
RSVD13
AV1
RSVD14
BB1
RSVD15
BA3
RSVD16
BB5
RSVD17
BB3
RSVD18
BB7
RSVD19
BE8
RSVD20
BD4
RSVD21
BF6
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14CLKOUT_PCI4
R243
10KX8
R57 8.2K/J_4
R53 8.2K/J_4
R56 8.2K/J_4
R59 8.2K/J_4
R58 10K/J_4
R265 10K/J_4
R267 10K/J_4
Low = MPC ON
High = MPC OFF (Default)
R77 *1K_4
R76 10K/J_4
NV_ALE
AV5
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
USB Ports 6/7 disable in
B29
N28
12sku.
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
USB_BIAS
C33
B33
USB_OC0#
A14
USB_OC1#
K20
USB_OC2#
B17
USB_OC3#
C16
USB_OC4#
L16
USB_OC5#
A16
USB_OC6#
D14
USB_OC7#
C14H40
USB_OC1#
1
USB_OC4#
2
USB_OC7#
3
USB_OC6#
56
4
TP9
USBP0- (20)
USBP0+ (20)
USBP1- (20)
USBP1+ (20)
USBP2- (20)
USBP2+ (20)
USBP4- (20)
USBP4+ (20)
USBP9- (17)
USBP9+ (17)
USBP12- (22)
USBP12+ (22)
USBP13- (19)
USBP13+ (19)
R252 22.6/F_4
USB_OC0# (20)
USB_OC1# (20)
USB_OC2# (20)
USB_OC3# (20)
OC USB Port
OC0#
0,1
OC1#
2,3
OC2#
4,5
OC3#
6,7
OC4#
8,9
OC5#
10,11
OC6#
12,13
OC7#
GPIO
+3V
+3V
WLAN
DMC
USB 3.0
Card
Express CARD
LAN
USB0
USB1
USB2
USB3
EHCI1
Camera
WiMAX
BlueTooth
+3V_S5
EHCI2
+3V_S5
R272 10K/J_4
R254 10K/J_4
R36 10K/J_4
R11 10K/J_4
R264 10K/J_4
R291 10K/J_4 C432 *10P_4
R32 10K/J_4
+3V
R280 10K/J_4
R113 10K/J_4
R87 I@10K/J_4
R83 *10K_4
PCIE_CLKREQ_WLAN#
PCIE_REQ_CARD#
PCIE_CLKREQ4#
PCIE_CLKREQ_EXPRESSCARD#
CLK_PEGB_REQ#
PCIE_CLKREQ_LAN#
CLK_PCIE_REQ7#
PCIE_CLKREQ_DMC#
PCIE_CLKREQ_USB3#
PCIE_CLKREQ_PEG#
Cougar Point-M (PCI-E,SMBUS,CLK)
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN4_LAN_C
PCIE_TXP4_LAN_C
PCIE_TXN6_LAN_C
PCIE_TXP6_LAN_C
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_DMC#
PCIE_CLKREQ_USB3#
CLK_PCIE_CARDN(18)
CLK_PCIE_CARDP(18)
PCIE_REQ_CARD#
PCIE_CLKREQ4#
PCIE_CLKREQ_EXPRESSCARD#
CLK_PEGB_REQ#
CLK_PCIE_LANN(21)
CLK_PCIE_LANP(21)
PCIE_CLKREQ_LAN#
CLK_PCIE_REQ7#
Q19
5
+3V_S5
2
+3V_S5 +3V_S5
6
2N7002DW
SMB_PCH_CLK
SMB_PCH_DAT
DRAMRST_CNTRL_PCH
SMBALERT#
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R
U16B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
CougarPoint_R1P0
R10 2.2K_4
SMB_ME1_CLK
43
R9 2.2K_4
SMB_ME1_DAT
1
Q18
R240 4.7K/J_4
5
43
R231 4.7K/J_4
2
6
1
2N7002DW
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green Partners.
+3V_S5
PCI-E*
+3V_S5
+3V
+3V
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
SMB_RUN_CLK (14,15)
SMB_RUN_DAT (14,15)
2
+3V_S5
SMBALERT# / GPIO11
+3V_S5
SML0ALERT# / GPIO60
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
+3V_S5
+3V_S5
Link
+3V_S5
PEG_A_CLKRQ# / GPIO47
CLOCKS
CLKIN_PCILOOPBACK
+3V
CLKOUTFLEX0 / GPIO64
+3V
CLKOUTFLEX1 / GPIO65
+3V
CLKOUTFLEX2 / GPIO66
+3V
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
CLK_PCIE_WLANN
CLK_PCIE_WLANP
+3V+3V
+3V+3V
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK / GPIO58
SML1DATA / GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
C431 *10P_4
SMBALERT#
E12
SMB_PCH_CLK
H14
SMB_PCH_DAT
C9
DRAMRST_CNTRL_PCH
A12
SMB_ME0_CLK
C8
SMB_ME0_DAT
G12
SML1ALERT#_R
C13
SMB_ME1_CLK
E14
SMB_ME1_DAT
M16
M7
T11
P10
PCIE_CLKREQ_PEG#
M10
CLK_PCIE_VGAN
AB37
CLK_PCIE_VGAP
AB38
AV22
AU22
CLK_DPLL_SSCLKN_R
AM12
CLK_DPLL_SSCLKP_R
AM13
CLK_BUF_PCIE_3GPLLN
BF18
CLK_BUF_PCIE_3GPLLP
BE18
CLK_BUF_BCLKN
BJ30
CLK_BUF_BCLKP
BG30
CLK_BUF_DREFCLKN
G24
CLK_BUF_DREFCLKP
E24
CLK_BUF_DREFSSCLKN
AK7
CLK_BUF_DREFSSCLKP
AK5
CLK_PCH_14M
K45
CLK_PCI_FB
H45
XTAL25_IN
V47
XTAL25_OUT
V49
XCLK_RCOMP
Y47
K43
F47
H47
K49
R286 90.9/F_4
TP37
TP38
DRAMRST_CNTRL_PCH (5)
PCIE_CLKREQ_PEG# (35)
CLK_PCIE_VGAN (35)
CLK_PCIE_VGAP (35)
RP5 I@0X2
3
241
R148 10K/J_4
R149 10K/J_4
R152 10K/J_4
R153 10K/J_4
R74 10K/J_4
R75 10K/J_4
R127 10K/J_4
R128 10K/J_4
R85 10K/J_4
C360 12P_4
21
R281
1M/J_4
C359 12P_4
+1.05V
Y2
25MHz/30ppm/12PF
Quanta Computer Inc.
Size Document Number Rev
Tuesday, April 05, 2011
Date: Sheet of
PROJECT :
Cougar Point 3/6
1
For LAN
For EC
CLK_CPU_BCLKN (4)
CLK_CPU_BCLKP (4)
CLK_DPLL_SSCLKN (4)
CLK_DPLL_SSCLKP (4)
Y2 Cann't create 2nd by
TXC
Huron River
10 39
1A
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bgb.png)
5
4
3
2
1
Cougar Point (GPIO,VSS_NCTF,RSVD)
R282 *0_4
R285 1K/F_4
+3V
EC_EXT_SMI#(16)
D D
EC_EXT_SCI#(16)
+3V_S5
R359 10K/J_4
Need Check
C C
CRIT_TEMP_REP#(16)
B B
EC_EXT_SMI#
BOARD_ID1
EC_EXT_SCI#
LAN_DISABLE#
BOARD_ID0
BOARD_ID2
BIOS_REC
GPIO27
PLL_ODVR_EN(9)
STP_PCI#
R305 *0_4S
S_GPIO
HOST_ALERT#1_R
TP2
BOARD_ID3
GPIO36
FDI_OVRVLTG
MFG_MODE
DGPU_PRSNT#
TEST_SET_UP
SV_DET
U16F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
D40
E16
V13
A44
A45
A46
B47
BD1
BD49
BE1
BE49
BF1
BF49
+3V_S5
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
+3V_S5
GPIO15
U2
SATA4GP / GPIO16
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24 / MEM_LED
DSW
GPIO27
P8
K1
K4
V8
M5
N2
M3
V3
D6
A4
A5
A6
B3
+3V_S5
GPIO28
STP_PCI# / GPIO34
+3V
GPIO35
SATA2GP / GPIO36
SATA3GP / GPIO37
SLOAD / GPIO38
SDATAOUT0 / GPIO39
SDATAOUT1 / GPIO48
SATA5GP / GPIO49
+3V_S5
GPIO57
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
CougarPoint_R1P0
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V_S5
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V_S5
GPIO
NCTF
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
EC_RCIN#
R248 1.5K/F_4
R259 1.5K/F_4
R249 1.5K/F_4
PCH_THRMTRIP#
R319 *0_4S
EC_A20GATE (16)
EC_RCIN# (16)
H_PWRGOOD (4)
R155 390/J_4
R364 *10K_4
NV_CLE (9)
+3V
GPIO Pull-up/Pull-down(CLG)
PM_THRMTRIP# (4,7)
+1.05V
SV_SET_UP
High = Strong (Default)
TEST_SET_UP
R109 10K/J_4
R112 *0_4
Board ID2
(VRAM 1G/512M)
+3V
LAN_DISABLE#
EC_EXT_SMI#
EC_EXT_SCI#
STP_PCI#
EC_A20GATE
EC_RCIN#
CRIT_TEMP_REP#
GPIO27
+3V
R244 *10K_4
Board ID0
(N12M/N12P)
R294
N12M N12P
Stuff
No StuffR297
Board ID1
(VRAM Vendor)
R47
Samaung Hynix
Stuff
No StuffR48
1G 512M
R39
Stuff
No StuffR27
R297 *10K/J_4
R48 *10K/J_4
R27 *10K/J_4
R362 10K/J_4 R363 *10K/J_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
SV_DET
R268 10K/J_4
R45 10K/J_4
R46 10K/J_4
R273 *10K_4
R89 10K/J_4
R97 10K/J_4
R304 10K/J_4
R12 10K_4
R245 100K/J_4
No Stuff
Stuff
No Stuff
Stuff
No Stuff
Stuff
R294 *10K_4
R47 *10K_4
R39 *10K/J_4
11
+3V_S5
+3V
+3V
HOST_ALERT#1_R
Intel ME Crypto Transport Layer
Security (TLS) cipher suite
Low = Disable (Default)
A A
R84 100K/J_4
FDI TERMINATION
VOLTAGE
OVERRIDE
FDI_OVRVLTG GPIO36 BIOS_REC
R81 *1K/F_4
LOW - Tx, Rx terminated
to same voltage
5
DMI TERMINATION
VOLTAGE OVERRIDE
R295 *200K/F_4
Low = Tx, Rx terminated to
same voltage (DC Coupling Mode)
(DEFAULT)
4
+3V+3V +3V
R101 10K/J_4
R99 *0_4
BIOS RECOVERY
High = Disable (Default)
Low = Enable
3
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green Partners.
High = Enable
MFG-TEST
MFG_MODE
R269 1K/J_4
R287 10K/J_4
R284 *0_4
2
+3V_S5
+3V
+3V
Size Document Number Rev
Date: Sheet of
PCBA SKU
R277 E@10K/J_4
Cougar Point 4/6
Tuesday, April 05, 2011
Discrete
R277
R275
Stuff
No Stuff
DGPU_PRSNT#
Quanta Computer Inc.
PROJECT :
UMA
No Stuff
Stuff
R275 *I@100K/J_4
Huron River
11 39
1
1A
![](/html/6e/6e3f/6e3fe2034bff2b6f3d6c8edb203e5d6c1f11b79daaf06aaaccc8ab3da4e7c6b9/bgc.png)
5
PCH5(CLG) COUGAR POINT (POWER)
VccCORE =1.3 A(60mils)
+1.05V
C91 10U/6.3V/X5R_6
C97 1U/10V/X5R_4
C81 1U/10V/X5R_4
C73 1U/10V/X5R_4
D D
+1.05V
TP29
+1.05V
C89 1U/10V/X5R_4
C111 1U/10V/X5R_4
C106 1U/10V/X5R_4
C128 1U/10V/X5R_4
C107 10U/6.3V/X5R_6
(VccIO =2.925A (140mils))
C C
+3V
C121
0.1U/10V/X5R_4
+1.5V
+VCCAFDI_VRM
TP10
+1.05V
+1.05V
+VCCAFDI_VRM
R98 *0_6S
+VCCAFDI_VRM
B B
A A
U16G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29 AG17
VCC3_3[3] VCCDFTERM[2]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
CougarPoint_R1P0
VCCVRM: 1.8V (Destop) 02/20 del for Pre-ES1
1.5V (Mobile)
POWER
VCC CORE
VCCIO
FDI
CRTLVDS
DMI
DFT / SPI HVCMOS
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[3]
VCCDFTERM[4]
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AJ16
AJ17
VCCSPI = 20mA(8mils)
V1
4
1mA(8mils)
+3V_VCCADAC
1mA(8mils)
C99 0.1U/10V/X5R_4
VCCDMI = 42mA(10mils)
L9 180ohm/5A_6
C356 10U/6.3V/X5R_6
C358 0.1U/10V/X5R_4
C357 0.01U/25V_4
+3V_VCCALVDS
60mA(10mils)
+1.8V_VCCTX_LVDS
C70 0.1U/10V/X5R_4
+VCCAFDI_VRM
C98 1U/10V/X5R_4
R117 I@0_4
C104 I@0.1U/10V/X5R_4/E@0_4
R130 I@0_4
C114 I@10U/6.3V/X5R_8
C103 I@0.01U/25V_4
C101 I@0.01U/25V_4/E@0_4
+3V
+VCCAFDI_VRM
VCCCLKDMI = 20mA(8mils)
C74 *10U/6.3V_6
C72 1U/10V/X5R_4
VCCPNAND = 190 mA(15mils)
+1.8V
C96 0.1U/10V/X5R_4
+3V_SPI
C361 1U/10V/X5R_4
+3V
+3V
+1.8V
+1.05V
+1.05V
65mA(10mils)
8mA(8mils)
VCCDIFFCLKN= 55mA(10mils)
VCCSSC= 95mA(10mils)
1mA(8mils)
VCCRTC<1mA(8mils) VCCSUSHDA= 10mA(8mils)
+3V_S5
R102 *0_6S
+3V
L6 10uH/100mA
+1.05V
L7 10uH/100mA
+1.05V
+1.05V
+1.05V
+1.05V
3
+VCCAFDI_VRM
+1.05V
R299 *0_6S
R302 *0_6S
+1.05V
+3V_RTC
VCCDSW3_3= 3mA
C63 0.1U/10V/X5R_4
C67 *0.1U/10V_4
C78 10U/6.3V/X5R_6
C65 1U/10V/X5R_4
R126 *0_4S
+1.05V
C92 *1U/10V/X5R_4
VccASW =1.01 A(60mils)
C76 10U/6.3V/X5R_6
C83 10U/6.3V/X5R_6
C82 1U/10V/X5R_4
C69 1U/10V/X5R_4
C75 1U/10V/X5R_4
C56 0.1U/10V/X5R_4
+VCCAFDI_VRM
+1.05V_VCCA_A_DPL
C120 22U/6.3V/X5R_8
C117 1U/10V/X5R_4
C118 10U/6.3V/X5R_6
+1.05V_VCCA_B_DPL
C136 22U/6.3V/X5R_8
C122 1U/10V/X5R_4
C127 10U/6.3V/X5R_6
C86 1U/10V/X5R_4
+1.05V_VCCDIFFCLKN
C84 1U/10V/X5R_4
+V1.05V_SSCVCC
C95 1U/10V/X5R_4
C66 0.1U/10V/X5R_4
+1.05V_VCCSUS
C59 *1U/10V/X5R_4
C123 0.1U/10V/X5R_4
C124 0.1U/10V/X5R_4
C134 4.7U/6.3V_6
C39 0.1U/10V/X5R_4
C24 0.1U/10V/X5R_4
C35 1U/10V/X5R_4
TP27
PCH_VCCDSW
+3V_SUS_CLKF33
TP30
+VCCDPLL_CPY
+VCCSUS1
+VCCRTCEXT
+VCCSST
Cougar Point-M (POWER)
2
AD49
BH23
AL29
AL24
AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31
W21
W23
W24
W26
W29
W31
W33
BD47
BF47
AF17
AF33
AF34
AG34
AG33
T16
V12
T38
N16
Y49
V16
T17
V19
BJ8
A22
U16J
VCCACLK
VCCDSW3_3
DCPSUSBYP
VCC3_3[5]
VCCAPLLDMI2
VCCIO[14]
DCPSUS[3]
VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]
DCPRTC
VCCVRM[4]
VCCADPLLA
VCCADPLLB
VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
VCCSSC
DCPSST
DCPSUS[1]
DCPSUS[2]
V_PROC_IO
VCCRTC
CougarPoint_R1P0
POWER
Clock and Miscellaneous
CPURTC
PCI/GPIO/LPCMISC
SATA USB
HDA
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCAPLLSATA
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
+1.05V
C60
1U/10V/X5R_4
C57 0.1U/10V/X5R_4
C53 0.1U/10V/X5R_4
+1.05V
+5V_S5_PCH_VCC5REFSUS
+VCCA_USBSUS
+5V_PCH_VCC5REF
+VCCAFDI_VRM
C105 *1U/10V/X5R_4
+3V_S5
+3V_S5
C47 1U/10V/X5R_4
C71 0.1U/10V/X5R_4
VCCPCORE = 28mA(10mils)
+3V
+3V
C64
0.1U/10V/X5R_4
C90 0.1U/10V/X5R_4
+1.05V
C88 1U/10V/X5R_4
TP28
VCCVRM= 114mA(15mils)
C80
1U/10V/X5R_4
VCCME = 1.01A(60mils)
+1.05V
+3V_S5
C50 0.1U/10V/X5R_4
C28 *1U/10V/X5R_4
1
VCCSUS3_3 = 119mA(15mils)
+3V_S5
VCC5REFSUS=1mA
R246 10/F_4
D1 RB500V-40
C48 0.1U/10V/X5R_4
R44 10/F_4
D16 RB500V-40
C52 1U/10V/X5R_4
VCCSUS3_3 = 119mA(15mils)
+3V
+1.05V
V5REF= 1mA
+5V
+3V
12
+5V_S5
+3V_S5
Quanta Computer Inc.
1
Huron River
1A
12 39
1.Level 1 Environment-related Substances Should Never be Used.
5
4
3
2.Recycled Resin and Coated Wire should be procured from Green Partners.
2
Size Document Number Rev
Tuesday, April 05, 2011
Date: Sheet of
PROJECT :
Cougar Point 5/6