Sony MX2 Schematics

Page 1
HGFEDCBA
P264: MXM-II, G3, 256MB, 128-bit,
1
4/8Mx32DDR
LVDS,DVI_A, DVI_B,TV_OUT,VGA
HISTORY:
INITIAL VERSION -
A00:
3/18/04 - Started P264 from P263 design
600-10264-00xx-000
1
2
3
4
VARIANT ASSEMBLY
SKU
B
SKU000
1 2
SKU001 SKU002
3
<UNDEFINED>
4
<UNDEFINED>
5
<UNDEFINED>
6
<UNDEFINED>
7
<UNDEFINED>
8
<UNDEFINED>
9
<UNDEFINED>
10
5
<UNDEFINED>
11
<UNDEFINED>
12
<UNDEFINED>
13
<UNDEFINED>
14
<UNDEFINED>
15
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
NVPN
600-10264-xxxx-vvv 600-10264-0000-000 600-10264-0001-000 600-10264-0002-000 <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
AB D F H
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
NV41M 400/350 256MB(128bit) DDR1 8Mx32 144BGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA
NV41M 400/350 128MB(128bit) DDR1 8Mx32 144BGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA
NV41M 400/350 128MB(128bit) DDR1 4Mx32 144BGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA
<UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED> <UNDEFINED>
ASSEMBLY PAGE
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<XR_PAGE_TITLE>
DATE
2
3
4
5
7-MAY-2004
Page 2
7<> 6<>
U9B
U9B
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
5<> 4<>
1
2
3
5< 4< 4<>
5<> 4<>
FBAD[63..0]
BI
FBADQM[7..0]
OUT
FBADQS[7..0]
BI
FBAD0
0
FBAD1
1
FBAD2
2
FBAD3
3
FBAD4
4
FBAD5
5
FBAD6
6
FBAD7
7
FBAD8
8
FBAD9
9
FBAD10
10
FBAD11
11
FBAD12
12
FBAD13
13
FBAD14
14
FBAD15
15
FBAD16
16
FBAD17
17
FBAD18
18
FBAD19
19
FBAD20
20
FBAD21
21
FBAD22
22
FBAD23
23
FBAD24
24
FBAD25
25
FBAD26
26
FBAD27
27
FBAD28
28
FBAD29
29
FBAD30
30
FBAD31
31
FBAD32
32
FBAD33
33
FBAD34
34
FBAD35
35
FBAD36
36
FBAD37
37
FBAD38
38
FBAD39
39
FBAD40
40
FBAD41
41
FBAD42
42
FBAD43
43
FBAD44
44
FBAD45
45
FBAD46
46
FBAD47
47
FBAD48
48
FBAD49
49
FBAD50
50
FBAD51
51
FBAD52
52
FBAD53
53
FBAD54
54
FBAD55
55
FBAD56
56
FBAD57
57
FBAD58
58
FBAD59
59
FBAD60
60
FBAD61
61
FBAD62
62
FBAD63
63
FBADQM0
0
FBADQM1
1
FBADQM2
2
FBADQM3
3
FBADQM4
4
FBADQM5
5
FBADQM6
6
FBADQM7
7
FBADQS0
0
FBADQS1
1
FBADQS2
2
FBADQS3
3
FBADQS4
4
FBADQS5
5
FBADQS6
6
FBADQS7
7
4
FBVDD
C583
C583 *0.022U
*0.022U
R554
R554 10K
10K
16V
1%
1%
FBVREF1
C579
C579 *0.022U
*0.022U
16V
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
GND
12_mil
R541
R541 10K
10K
1%
1%
N27 M27 N28 L29 K27 K28 J29 J28 P30 N31 N30 N32 L31 L30 J30 L32 H30 K30 H31 F30 H32 E31 D30 E30 H28 H29 E29 J27 F27 E27 E28
F28 AD29 AE29 AD28 AC28 AB29 AA30
Y28 AB30 AM30 AF30 AJ31 AJ30 AJ32 AK29 AM31 AL30 AE32 AE30 AE31 AD30 AC31 AC32 AB32 AB31 AG27 AF28 AH28 AG28 AG29 AD27 AF27 AE28
M29
M30
G30
F29 AA29 AK30 AC30 AG30
L28
K31
G32
G28 AB28 AL32 AF32 AH30
M28
K32
G31
G27 AA28 AL31 AF31 AH29
E32
COMMON
2/14 FBA
2/14 FBA
FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63
FBADQM0 FBADQM1 FBADQM2 FBADQM3 FBADQM4 FBADQM5 FBADQM6 FBADQM7
FBADQS_WP0 FBADQS_WP1 FBADQS_WP2 FBADQS_WP3 FBADQS_WP4 FBADQS_WP5 FBADQS_WP6 FBADQS_WP7
FBADQS_RN0 FBADQS_RN1 FBADQS_RN2 FBADQS_RN3 FBADQS_RN4 FBADQS_RN5 FBADQS_RN6 FBADQS_RN7
FB_VREF1
FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD FBVDD
FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
RFU RFU
FBA_DEBUG
FBA_REFCLK FBA_REFCLK
FBA_PLLVDD
FBA_PLLAVDD
FBA_PLLGND
A12 A15 A18 A21 A24 A27 A3 A30 A6 A9 AA32 AD32 AG32 AK32 C32 F32 J32 M32 R32 V32
AA25 AA26 AB25 AB26 G11 G12 G15 G18 G21 G22 H11 H12 H15 H18 H21 H22 L25 L26 M25 M26 R25 R26 V25 V26
P32 U27 P31 U30 Y31 W32 W31 T32 V27 T28 T31 U32 W29 W30 T27 V28 V30 U31 R27 V29 T30 W28 R29 R30 P29 U28 Y32
P28 R28 Y27 AA27
Y30 AC26
AC27
D32 D31
G23
G25
G24
C592
C592 4700P
4700P
C623
C623
0.022U
0.022U
C620
C620
0.022U
0.022U
C677
C677 4700P
4700P
25V 16V16V 10V16V 10V
C669
C669 1U
1U
0603
0603
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBACS1* FBACS0* FBAWE* FBA_CMD10 FBACKE
FBA_CMD13 FBA_CMD14 FBARAS* FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBACAS*
NET_NAME NET_SPACING_TYPE
FBACLK0 FBACLK0* FBACLK1 FBACLK1*
FBA_PLLVDD
FBA_PLLAVDD
GND
0 1 2 3 4 5 6
10
13 14
16 17 18 19 20 21 22 23 24
DIFF_PAIR
10MIL_G2G_20MILFBACLK0 TMDS/PCIE/CLK 10MIL_G2G_20MILFBACLK0 TMDS/PCIE/CLK 10MIL_G2G_20MILFBACLK1 TMDS/PCIE/CLK 10MIL_G2G_20MILFBACLK1 TMDS/PCIE/CLK
12_mil
C590
C590 470P
470P
50V
GND
12_mil
C595
C595 470P
470P
50V 10V16V
GND
C582
C587
C587
0.022U
0.022U
16V 16V
C622
C622
0.022U
0.022U
C607
C607
0.022U
0.022U
C570
C570
0.022U
0.022U
C571
C571
0.022U
0.022U
16V10V
C582
0.022U
0.022U
C668
C668
0.1U
0.1U
C567
C567
0.1U
0.1U
C568
C568
0.022U
0.022U
C588
C588
0.022U
0.022U
16V 10V25V
C616
C616
0.022U
0.022U
16V16V 10V16V 10V
C695
C695
0.022U
0.022U
16V16V 10V16V 10V
C670
C670
0.022U
0.022U
C651
C651 1U
1U
10V 0603
0603
GND
FBA_CMD[26..0]
OUT OUT OUT
OUT
OUT
OUT
C589
C589
0.022U
0.022U
16V 10V
GND
C584
C584
0.022U
0.022U
GND
NET_PHYSICAL_TYPE
ASSEMBLY PAGE
DETAIL
OUT
4<>4<
4<4<>
5<4<>4<
5<4<>4<
5<4<>4<
5<4<>4<
LB501
LB501
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C552
C552 1U
1U
0603
0603
GND
LB504
LB504
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C638
C638 1U
1U
0603
0603
GND
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
OUT OUT OUT OUT
C667
C667
0.1U
0.1U
C572
C572
0.1U
0.1U
C559
C559
0.1U
0.1U
C596
C596
0.1U
0.1U
7< 6< 6<>
7<> 6<>
FBVDD
GND
GND
C569
C569
0.1U
0.1U
5<4<4<>
5<4< 5<4< 5<4< 5<4<
3V3RUN
NVVDD
BI
GND
GND
FBCDQM[7..0]
OUT
FBCDQS[7..0]
BI
C558
C558 *0.022U
*0.022U
16V
C557
C557 *0.022U
*0.022U
16V
GND
E GC
FBCD[63..0]
FBVDD
HGFEDCBA
U9C
U9C
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
3/14 FBC
B7
FBCD0
A7
FBCD1
C7
FBCD2
A2
FBCD3
B2
FBCD4
C4
FBCD5
A5
FBCD6
B5
FBCD7
F9
FBCD8
F10
FBCD9
D12
FBCD10
D9
FBCD11
E12
FBCD12
D11
FBCD13
E8
FBCD14
D8
FBCD15
E7
FBCD16
F7
FBCD17
D6
FBCD18
D5
FBCD19
D3
FBCD20
E4
FBCD21
C3
FBCD22
B4
FBCD23
C10
FBCD24
B10
FBCD25
C8
FBCD26
A10
FBCD27
C11
FBCD28
C12
FBCD29
A11
FBCD30
B11
FBCD31
B28
FBCD32
C27
FBCD33
C26
FBCD34
B26
FBCD35
C30
FBCD36
B31
FBCD37
C29
FBCD38
A31
FBCD39
D28
FBCD40
D27
FBCD41
F26
FBCD42
D24
FBCD43
E23
FBCD44
E26
FBCD45
E24
FBCD46
F23
FBCD47
B23
FBCD48
A23
FBCD49
C25
FBCD50
C23
FBCD51
A22
FBCD52
C22
FBCD53
C21
FBCD54
B22
FBCD55
E22
FBCD56
D22
FBCD57
D21
FBCD58
E21
FBCD59
E18
FBCD60
D19
FBCD61
D18
FBCD62
E19
FBCD63
A4
FBCDQM0
E11
FBCDQM1
F5
FBCDQM2
C9
FBCDQM3
C28
FBCDQM4
F24
FBCDQM5
C24
FBCDQM6
E20
FBCDQM7
C5
FBCDQS_WP0
E10
FBCDQS_WP1
E5
FBCDQS_WP2
B8
FBCDQS_WP3
A29
FBCDQS_WP4
D25
FBCDQS_WP5
B25
FBCDQS_WP6
F20
FBCDQS_WP7
C6
FBCDQS_RN0
E9
FBCDQS_RN1
E6
FBCDQS_RN2
A8
FBCDQS_RN3
B29
FBCDQS_RN4
E25
FBCDQS_RN5
A25
FBCDQS_RN6
F21
FBCDQS_RN7
A28
FB_VREF2
3/14 FBC
FBCD0
0
FBCD1
1
FBCD2
2
FBCD3
3
FBCD4
4
FBCD5
5
FBCD6
6
FBCD7
7
FBCD8
8
FBCD9
9
FBCD10
10
FBCD11
11
FBCD12
12
FBCD13
13
FBCD14
14
FBCD15
15
FBCD16
16
FBCD17
17
FBCD18
18
FBCD19
19
FBCD20
20
FBCD21
21
FBCD22
22
FBCD23
23
FBCD24
24
FBCD25
25
FBCD26
26
FBCD27
27
FBCD28
28
FBCD29
29
FBCD30
30
FBCD31
31
FBCD32
32
FBCD33
33
FBCD34
34
FBCD35
35
FBCD36
36
FBCD37
37
FBCD38
38
FBCD39
39
FBCD40
40
FBCD41
41
FBCD42
42
FBCD43
43
FBCD44
44
FBCD45
45
FBCD46
46
FBCD47
47
FBCD48
48
FBCD49
49
FBCD50
50
FBCD51
51
FBCD52
52
FBCD53
53
FBCD54
54
FBCD55
55
FBCD56
56
FBCD57
57
FBCD58
58
FBCD59
59
FBCD60
60
FBCD61
61
FBCD62
62
FBCD63
63
FBCDQM0
0
FBCDQM1
1
FBCDQM2
2
FBCDQM3
3
FBCDQM4
4
FBCDQM5
5
FBCDQM6
6
FBCDQM7
7
FBCDQS0
0
FBCDQS1
1
FBCDQS2
2
FBCDQS3
3
FBCDQS4
4
FBCDQS5
5
FBCDQS6
6
FBCDQS7
7
R530
R530 10K
10K
1%
1%
FB_VREF2
12_mil
R529
R529 10K
10K
1%
1%
FBVTT
FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT FBVTT
FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8
FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26
FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1
RFU RFU
FBC_DEBUG
FBC_REFCLK FBC_REFCLK
FBC_PLLVDD
FBC_PLLAVDD
FBC_PLLGND
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
AA23 AB23 H16 H17 J10 J23 J24
GND
J9 K11 K12 K21 K22 K24 K9 L23 M23 T25 U25
GND
GND
FBC_CMD0
C13
FBC_CMD1
A16
FBC_CMD2
A13
FBC_CMD3
B17
FBC_CMD4
B20
FBC_CMD5
A19
FBC_CMD6
B19
FBCCS1*
B14
FBCCS0*
E16
FBCWE*
A14
FBC_CMD10
C15
FBCCKE
B16 F17
FBC_CMD13
C19
FBC_CMD14
D15
FBCRAS*
C17
FBC_CMD16
A17
FBC_CMD17
C16
FBC_CMD18
D14
FBC_CMD19
F16
FBC_CMD20
C14
FBC_CMD21
C18
FBC_CMD22
E14
FBC_CMD23
B13
FBC_CMD24
E15
FBCCAS*
F15 A20
FBCCLK0
E13
FBCCLK0*
F13
FBCCLK1
F18
FBCCLK1*
E17
C20 D1
F12
B1 C1
12_mil
G8
12_mil
G10
G9
GND
FBCAL_PD_VDDQ
K26
FBCAL_PU_GND
H26
FBCAL_TERM_GND
J26
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
ID PAGE NAME
4700P
4700P
4700P
4700P
GND
C599
C599
C600
C600
4700P
4700P
4700P
4700P
25V 6.3V10V25V 10V
GND
C678
C678
C605
C605
4700P
4700P
25V
0.1U
0.1U
10V
GND
FBC_CMD[26..0]
0 1 2 3 4 5 6
10
13 14
16 17 18 19 20 21 22 23 24
NET_SPACING_TYPENET_NAME
DIFF_PAIR
FBCCLK0 10MIL_G2G_20MIL TMDS/PCIE/CLK FBCCLK0 10MIL_G2G_20MIL TMDS/PCIE/CLK
10MIL_G2G_20MIL TMDS/PCIE/CLKFBCCLK1 10MIL_G2G_20MIL TMDS/PCIE/CLKFBCCLK1
C591
C591 470P
470P
50V 16V 10V
GND
FBC_PLLVDD
FBC_PLLAVDD
12_mil
C580
C580 470P
470P
50V 16V 10V
GND
12_mil
R553 37.4
R553 37.4
12_mil
R565 0R565 0
600-10264-xxxx-vvv
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
C598
C598
C601
C601
C658
C658
0.1U
0.1U
GND
C603
C603
0.1U
0.1U
GND
6<>6<
OUT
6<>6<
OUT OUT
OUT
OUT
6<> 7<6<
OUT
NET_PHYSICAL_TYPE
C581
C581
0.022U
0.022U
GND
C585
C585
0.022U
0.022U
GND
R563 37.4
R563 37.4
1%
1%
GND
GND
GND
GND
7<6<>6<
7<6<>6<
7<6<>6<
GND
GND
DATE
C632
C632
0.1U
0.1U
10V25V 10V25V 6.3V
C597
C597
0.1U
0.1U
OUT
OUT OUT OUT OUT
LB503
LB503
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C554
C554 1U
1U
0603
0603
LB502
LB502
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C560
C560 1U
1U
0603
0603
FBVDD
1%
1%
7-MAY-2004
GND
GND
C586
C586
4.7U
4.7U
0603
0603
C652
C652
4.7U
4.7U
0603
0603
7<
3V3RUN
NVVDD
1
2
6<>6<
3
7<6< 7<6< 7<6< 7<6<
4
5
Page 3
MEMORY 128/256MB, 8Mx32DDR, PARTITION A, BANK 0 PLACE ALL DISCRETE COMPONENTS AS NEAR AS POSSIBLE
TO MEMORY
1
Stuff for stacked die
FBACS1*
3>4<>
IN
Stuff for monolithic die
FBVDD
2
R62 120R62 120
R63 120R63 120
R57 120R57 120
R58 120R58 120 R527 120R527 120
R525 120R525 120
R526 120R526 120 C88
R524 120R524 120
3
4
GND
FBADQM0
3>4<>5<
IN
FBADQM1
3>4<>5<
IN
FBADQM2
3>4<>5<
IN
FBADQM3
3>4<>5<
IN
FBADQM4
3>4<>5<
IN
FBADQM5
3>4<>5<
IN
FBADQM6
3>4<>5<
IN
FBADQM7
3>4<>5<
IN
FBADQS0
3<>4<>5<>
BI
FBADQS1
3<>4<>5<>
BI
FBADQS2
3<>4<>5<>
BI
FBADQS3
3<>4<>5<>
BI
FBADQS4
3<>4<>5<>
BI
FBADQS5
3<>4<>5<>
BI
FBADQS6
3<>4<>5<>
BI
FBADQS7
3<>4<>5<>
BI
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
R576 *0R576 *0 R574 0R574 0
FBA_B0_CS1*
FBA_B1_CS1*
FBACLK1
FBACLK1*
FBACLK0
FBACLK0*
U10B
U7B
4< 4<>
OUT
4<> 5<
OUT
FBA_CMD[26..0]
3>4<>4<5<
IN
R60
R60 619
619
1%
1%
R17
R17 619
619
1%
1%
3<>4<>5<>
BI
FBARAS* FBARAS*
3>4<>5<
IN
FBACAS* FBACAS*
3>4<>5<
IN
FBAWE* FBAWE*
3>4<>5<
IN
FBACS0* FBACS0*
3>4<>
IN
FBA_B0_CS1* FBA_B0_CS1* FBA_B0_CS1*
4>4<>
IN
FBA_CMD1 FBA_CMD1
1
FBA_CMD3 FBA_CMD3
3
FBA_CMD2
2
FBA_CMD0
0
FBA_CMD24
24
FBA_CMD22
22
FBA_CMD21 FBA_CMD21
21
FBA_CMD23 FBA_CMD23
23
FBA_CMD19 FBA_CMD19
19
FBA_CMD20 FBA_CMD20
20
FBA_CMD17 FBA_CMD17
17
FBA_CMD16 FBA_CMD16
16
FBA_CMD14 FBA_CMD14
14
FBA_CMD10 FBA_CMD10
10
FBA_CMD18 FBA_CMD18
18
FBACKE FBACKE
3>4<>5<
IN
FBACLK0
3>5<
IN
FBACLK0*
3>5<
IN
FBAD[63..0]
FBAD6
6
FBAD7
7
FBAD5
5
FBAD4
4
FBAD2
2
FBAD3
3
FBAD1
1
FBAD0
0
FBADQM0 FBADQS0
FBAD[63..0]
FBAD15
15
FBAD13
13
FBAD14
14
FBAD12
12
FBAD11
11
FBAD9
9
FBAD10
10
FBAD8
8
FBADQM1 FBADQS1
U7B
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
M2
RAS
L2
CAS
L3
WE
N2
CS<0>
M4
CS<1>/TBD.
N5
A<0>
N6
A<1>
M6
A<2>
N7
A<3>
N8
A<4>
M9
A<5>
N9
A<6>
N10
A<7>
N11
A/AP<8>
M8
A<9>
L6
A<10>
M7
A<11>
L9
A<12>/TBD.
N4
BA<0>
M5
BA<1>
M10
BA<2>/TBD.
N12
CKE
M11
CLK
M12
CLK
R573
R573 10K
10K
GND
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
M13
Must be GND
GND
U7A
U7A
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
B5
DQ<0>
C6
DQ<1>
B6
DQ<2>
B7
DQ<3>
D2
DQ<4>
D3
DQ<5>
C2
DQ<6>
E2
DQ<7>
B3
DQM
B2
DQS
U7E
U7E
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
G3
DQ<0>
K3
DQ<1>
J3
DQ<2>
F3
DQ<3>
J2
DQ<4>
G2
DQ<5>
F2
DQ<6>
K2
DQ<7>
H3
DQM
H2
DQS
2/4/8MX32
NC
NC
C4
C11
FBVDD
D7
VDD2/4/8MX32
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
FBVDD
L11
VDD
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
B4
VSSQ
B11
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E6
VSSQ
E9
VSSQ
F5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5
VSSQ
J10
VSSQ
K5
VSSQ
K10
VSSQ
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
N13
Vref
NC
NC
NC
NC
NC
H4
N3
M3
L12NCL13
H11
GND
U7D
U7D
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
FBAD22
22
FBAD23
23
FBAD20
20
FBAD21
21
FBAD19
19
FBAD18
18
FBAD16
16
FBAD17
17
FBADQM2 FBADQS2
FBAD31
31
FBAD29
29
FBAD30
30
FBAD28
28
FBAD27
27
FBAD25
25
FBAD26
26
FBAD24
24
FBADQM3 FBADQS3
COMMON
K13 G13 G12 J13 F13 K12 F12 J12
H12 H13
U7C
U7C
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
D12 D13 E13
C9
B10
B8
C13
B9
B12 B13
FBA_CMD[26..0]
3>4<>4<
IN
5<
1 3
FBA_CMD13
13
FBA_CMD4
4
FBA_CMD5
5
FBA_CMD6
6 21 23 19 20 17 16 14
10 18
FBACLK1
3>5<
IN
FBACLK1*
3>5<
IN
FBVDD
R23
R23 10K
10K
1%
FBAREF1
12_mil
1%
R25
R25
6.81K
6.81K
C79
C79
1%
1%
0.1U
0.1U
10V 10V
GND
FBAD39
DQ<0> DQ<1> DQ<2> DQ<3> DQ<4> DQ<5> DQ<6> DQ<7>
DQM DQS
DQ<0> DQ<1> DQ<2> DQ<3> DQ<4> DQ<5> DQ<6> DQ<7>
DQM DQS
39 37 38 36 35 33 34 32
46 47 45 44 42 43 41 40
ASSEMBLY PAGE
DETAIL
FBAD37 FBAD38 FBAD36 FBAD35 FBAD33 FBAD34 FBAD32
FBADQM4 FBADQS4
FBAD46 FBAD47 FBAD45 FBAD44 FBAD42 FBAD43 FBAD41 FBAD40
FBADQM5 FBADQS5
U10B
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
GND
N10 N11
M10
N12 M11 M12
M13
M2 L2 L3 N2 M4
N5 N6 M6 N7 N8 M9 N9
M8 L6 M7 L9
N4 M5
F6 F7 F8 F9 G6 G7 G8 G9 H6 H7 H8 H9 J6 J7 J8 J9
RAS CAS WE CS<0> CS<1>/TBD.
A<0> A<1> A<2> A<3> A<4> A<5> A<6> A<7> A/AP<8> A<9> A<10> A<11> A<12>/TBD.
BA<0> BA<1> BA<2>/TBD.
CKE CLK CLK
THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM THERM
Must be GND
NC
C4
2/4/8MX32
NC
NC
NC
H4
C11
H11
D7
VDD2/4/8MX32
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
B4
VSSQ
B11
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E6
VSSQ
E9
VSSQ
F5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5
VSSQ
J10
VSSQ
K5
VSSQ
K10
VSSQ
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
N13
Vref
NC
NC
NC
N3
M3
L12NCL13
GND
U10A
U10A
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
D13
DQ<0>
C13
DQ<1>
E13
DQ<2>
D12
DQ<3>
B8
DQ<4>
C9
DQ<5>
B10
DQ<6>
B9
DQ<7>
B12
DQM
B13
DQS
U10E
U10E
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
G2
DQ<0>
J2
DQ<1>
F2
DQ<2>
G3
DQ<3>
K3
DQ<4>
F3
DQ<5>
J3
DQ<6>
K2
DQ<7>
H3
DQM
H2
DQS
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
FBAD55
55
FBAD53
53
FBAD54
54
FBAD52
52
FBAD51
51
FBAD49
49
FBAD50
50
FBAD48
48
FBADQM6 FBADQS6
FBAD62
62
FBAD63
63
FBAD60
60
FBAD61
61
FBAD59
59
FBAD58
58
FBAD56
56
FBAD57
57
FBADQM7 FBADQS7
E GC
FBVDD
FBVDD
FBVDD
FBAREF0
12_mil
C100
C100
0.1U
0.1U
U10D
U10D
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
G13
DQ<0>
F13
DQ<1>
K13
DQ<2>
J13
DQ<3>
F12
DQ<4>
J12
DQ<5>
K12
DQ<6>
G12
DQ<7>
H12
DQM
H13
DQS
U10C
U10C
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
B5
DQ<0>
B7
DQ<1>
C6
DQ<2>
B6
DQ<3>
D2
DQ<4>
D3
DQ<5>
E2
DQ<6>
C2
DQ<7>
B3
DQM
B2
DQS
GND
Decoupling for left MEMORY
FBVDD
Place around the MEM
C104
C104
C80
C77
C77
0.1U
0.1U
10V
GND
FBVDD
C66
C66
4.7U
4.7U
6.3V 0603
0603
GND
R47
R47 10K
10K
1%
1%
R44
R44
6.81K
6.81K
1%
1%
C80
0.1U
0.1U
0.1U
0.1U
10V 25V 25V
10V 10V 25V
C76
C76
C81
C81
0.1U
0.1U
0.1U
0.1U
10V 10V 10V 10V
Decoupling for right MEMORY
Place around the MEM
FBVDD
C124
C124
C127
C127
0.1U
0.1U
4.7U
4.7U
6.3V 10V 10V 10V 0603
0603
GND
FBVDD
C114
C114
C125
C125
0.1U
0.1U
0.1U
0.1U
10V 10V 10V 10V
GND
Diffpair NET_SPACING_RULE
NET
FBAD[63..0]
3<>4<>5<>
BI
FBADQM[7..0]
3>4<5<
BI
FBADQS[7..0]
3<>4<>5<>
BI
FBA_CMD[26..0]
3>4<5<
BI
FBARAS*
3>4<5<
BI
FBACAS*
3>4<5<
BI
FBAWE*
3>4<5<
BI
FBACS0*
3>4<
BI
FBACS1*
3>4<
BI
FBACKE
3>4<5<
BI
4>4<
BI
FBA_B1_CS1*
4>5<
BI
C70
C75
C75
C91
C91
0.1U
0.1U
0.01U
0.01U
C84
C84
C85
C85
0.01U
0.01U
0.1U
0.1U
25V 10V 10V 10V 10V 10V 10V
C120
C120
C118
C118
0.01U
0.01U
0.1U
0.1U
25V 10V 10V 10V 25V
C102
C102
C101
C101
0.1U
0.1U
0.1U
0.1U
C70
C68
C68
0.01U
0.01U
0.01U
0.01U
C93
C89
C89
C78
C78
0.1U
0.1U
0.1U
0.1U
C87
C87
0.1U
0.1U
10V 25V 25V10V 10V
C121
C121
C106
C106
0.1U
0.1U
0.1U
0.1U
C112
C112
C98
C98
0.01U
0.01U
0.01U
0.01U
25V 25V 25V10V 10V
C108
C108
C113
C113
0.01U
0.01U
0.1U
0.1U
10V 10V 10V25V 25V
C93
C88
0.1U
0.1U
0.1U
0.1U
C82
C82
C73
C73
0.01U
0.01U
0.1U
0.1U
C107
C107
C117
C117
0.1U
0.1U
0.1U
0.1U
C97
C97
C99
C99
0.1U
0.1U
0.1U
0.1U
C123
C123
C116
C116
0.01U
0.01U
0.1U
0.1U
GND
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE
<CON_PAGE_NUM> OF
NAME
<CON_TOTAL_PAGES>
HGFEDCBA
10MIL 10MIL 10MIL
10MIL
10MIL 10MIL 10MIL 10MIL 10MIL
10MIL 10MIL 10MIL
1
2
C71
C71
C72
C72
C90
0.1U
0.1U
C69
C69
0.01U
0.01U
C90
0.1U
0.1U
0.1U
0.1U
C94
C94
C92
C92
0.1U
0.1U
0.01U
0.01U
25V
3
GND
C96
C96
0.01U
0.01U
4
C122
C122
0.01U
0.01U
C95
C95
0.1U
0.1U
5
DATE
7-MAY-2004
Page 4
MEMORY 128/256MB, 8Mx32DDR, PARTITION A, BANK 1 PLACE ALL DISCRETE COMPONENTS AS NEAR AS POSSIBLE
TO MEMORY
need to hook up bank 1 signal
1
3>4<4<> 3>4<4<> 3>4<4<> 4>4<>
FBA_CMD[26..0]
3>4<>4<5<
IN
2
3>4<4<> 3>4< 3>4<
3
FBADQM0
3>4<>4<
IN
FBADQM1
3>4<>4<
IN
FBADQM2
3>4<>4<
IN
FBADQM3
3>4<>4<
IN
FBADQM4
3>4<>4<
IN
FBADQM5
3>4<>4<
4
IN
FBADQM6
3>4<>4<
IN
FBADQM7
3>4<>4<
IN
FBADQS0
3<>4<>
BI
FBADQS1
3<>4<>
BI
FBADQS2
3<>4<>
BI
FBADQS3
3<>4<>
BI
FBADQS4
3<>4<>
BI
FBADQS5
3<>4<>
BI
FBADQS6
3<>4<>
BI
FBADQS7
3<>4<>
BI
5
3<>4<>
BI
U504B
U504B
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
FBARAS* FBARAS*
IN
FBACAS* FBACAS*
IN
FBAWE* FBAWE*
IN
FBA_B1_CS1* FBA_B1_CS1*
IN
FBA_CMD23 FBA_CMD23
23
FBA_CMD21 FBA_CMD21
21
FBA_CMD22
22
FBA_CMD24
24
FBA_CMD0
0
FBA_CMD2
2
FBA_CMD3 FBA_CMD3
3
FBA_CMD1 FBA_CMD1
1
FBA_CMD16 FBA_CMD16
16
FBA_CMD17 FBA_CMD17
17
FBA_CMD20 FBA_CMD20
20
FBA_CMD19 FBA_CMD19
19
FBA_CMD14 FBA_CMD14
14
FBA_CMD18 FBA_CMD18
18
FBA_CMD10 FBA_CMD10
10
FBACKE FBACKE
IN
FBACLK0
IN
FBACLK0*
IN
FBAD[63..0]
FBAD6
6
FBAD7
7
FBAD5
5
FBAD4
4
FBAD2
2
FBAD3
3
FBAD1
1
FBAD0
0
FBADQM0 FBADQS0
FBAD[63..0]
FBAD15
15
FBAD13
13
FBAD14
14
FBAD12
12
FBAD11
11
FBAD9
9
FBAD10
10
FBAD8
8
FBADQM1 FBADQS1
COMMON
M2
RAS
L2
CAS
L3
WE
N2
CS<0>
M4
CS<1>/TBD.
N5
A<0>
N6
A<1>
M6
A<2>
N7
A<3>
N8
A<4>
M9
A<5>
N9
A<6>
N10
A<7>
N11
A/AP<8>
M8
A<9>
L6
A<10>
M7
A<11>
L9
A<12>/TBD.
N4
BA<0>
M5
BA<1>
M10
BA<2>/TBD.
N12
CKE
M11
CLK
M12
CLK
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
M13
Must be GND
NC
GND
C4
U504A
U504A
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
B10
DQ<0>
C9
DQ<1>
B9
DQ<2>
B8
DQ<3>
D13
DQ<4>
D12
DQ<5>
C13
DQ<6>
E13
DQ<7>
B12
DQM
B13
DQS
U504E
U504E
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
G12
DQ<0>
K12
DQ<1>
J12
DQ<2>
F12
DQ<3>
J13
DQ<4>
G13
DQ<5>
F13
DQ<6>
K13
DQ<7>
H12
DQM
H13
DQS
2/4/8MX32
NC
NC
NC
H4
C11
H11
22 23 20 21 19 18 16 17
31 29 30 28 27 25 26 24
NC
NC
NC
N3
M3
L12NCL13
FBAD22 FBAD23 FBAD20 FBAD21 FBAD19 FBAD18 FBAD16 FBAD17
FBADQM2 FBADQS2
FBAD31 FBAD29 FBAD30 FBAD28 FBAD27 FBAD25 FBAD26 FBAD24
FBADQM3 FBADQS3
D7
VDD2/4/8MX32
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
B4
VSSQ
B11
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E6
VSSQ
E9
VSSQ
F5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5
VSSQ
J10
VSSQ
K5
VSSQ
K10
VSSQ
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
N13
Vref
GND
FBVDD
FBA_CMD[26..0]
3>4<>
IN
4<5<
FBVDD
FBAREF3
12_mil
C615
C615
0.1U
0.1U
10V 10V
U504D
U504D
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
K2
DQ<0>
G2
DQ<1>
G3
DQ<2>
J2
DQ<3>
F2
DQ<4>
K3
DQ<5>
F3
DQ<6>
J3
DQ<7>
H3
DQM
H2
DQS
U504C
U504C
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
D3
DQ<0>
D2
DQ<1>
E2
DQ<2>
C6
DQ<3>
B5
DQ<4>
B7
DQ<5>
C2
DQ<6>
B6
DQ<7>
B3
DQM
B2
DQS
FBVDD
GND
HGFEDCBA
1
U505B
U505B
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
M2
RAS
2/4/8MX32
L2
CAS
L3
WE
N2
CS<0>
M4
CS<1>/TBD.
N5
23 21
FBA_CMD6
6
FBA_CMD5
5
FBA_CMD4
4
FBA_CMD13
13 3 1 16 17 20 19 14
18 10
FBACLK1
3>4<
IN
FBACLK1*
3>4<
IN
R564
R564 10K
10K
1%
1%
R568
R568
6.81K
6.81K
1%
1%
FBAD39
39
FBAD37
37
FBAD38
38
FBAD36
36
FBAD35
35
FBAD33
33
FBAD34
34
FBAD32
32
FBADQM4 FBADQS4
FBAD46
46
FBAD47
47
FBAD45
45
FBAD44
44
FBAD42
42
FBAD43
43
FBAD41
41
FBAD40
40
FBADQM5 FBADQS5
A<0>
N6
A<1>
M6
A<2>
N7
A<3>
N8
A<4>
M9
A<5>
N9
A<6>
N10
A<7>
N11
A/AP<8>
M8
A<9>
L6
A<10>
M7
A<11>
L9
A<12>/TBD.
N4
BA<0>
M5
BA<1>
M10
BA<2>/TBD.
N12
CKE
M11
CLK
M12
CLK
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
M13
Must be GND
GND
U505A
U505A
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
D2
DQ<0>
C2
DQ<1>
E2
DQ<2>
D3
DQ<3>
B7
DQ<4>
C6
DQ<5>
B5
DQ<6>
B6
DQ<7>
B3
DQM
B2
DQS
U505E
U505E
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
G13
DQ<0>
J13
DQ<1>
F13
DQ<2>
G12
DQ<3>
K12
DQ<4>
F12
DQ<5>
J12
DQ<6>
K13
DQ<7>
H12
DQM
H13
DQS
NC
NC
NC
NC
NC
NC
NC
C4
H4
N3
M3
L12NCL13
C11
H11
FBAD55
55
FBAD53
53
FBAD54
54
FBAD52
52
FBAD51
51
FBAD49
49
FBAD50
50
FBAD48
48
FBADQM6 FBADQS6
FBAD62
62
FBAD63
63
FBAD60
60
FBAD61
61
FBAD59
59
FBAD58
58
FBAD56
56
FBAD57
57
FBADQM7 FBADQS7
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
Vref
D7
VDD2/4/8MX32
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11
B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
N13
GND
FBVDD
FBVDD
FBVDD
FBAREF4
12_mil
C728
C728
0.1U
0.1U
U505D
U505D
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
G2
DQ<0>
F2
DQ<1>
K2
DQ<2>
J2
DQ<3>
F3
DQ<4>
J3
DQ<5>
K3
DQ<6>
G3
DQ<7>
H3
DQM
H2
DQS
U505C
U505C
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
B10
DQ<0>
B8
DQ<1>
C9
DQ<2>
B9
DQ<3>
D13
DQ<4>
D12
DQ<5>
E13
DQ<6>
C13
DQ<7>
B12
DQM
B13
DQS
Decoupling for left MEMORY
FBVDD
Place around the MEM
C736
C736
C729
C729
C732
C732
C604
C604
C726
C726
0.1U
0.1U
0.1U
0.1U
10V10V 10V
0.1U
0.1U
0.1U
0.1U
10V 25V 10V 10V 10V
GND
FBVDD
C733
C733
C730
C730
0.01U
0.01U
0.1U
0.1U
10V 10V 10V 10V 25V
25V 10V 25V 10V
C735
C735
C725
C725
0.1U
0.1U
0.1U
0.1U
GND
R594
R594 10K
10K
1%
1%
Decoupling for right MEMORY
Place around the MEM
R588
R588
FBVDD
6.81K
6.81K
1%
1%
C610
C610
C573
C573
C574
0.1U
0.1U
10V 10V 25V
GND
C574
0.1U
0.1U
0.1U
0.1U
10V 10V 10V 10V
GND
FBVDD
C578
C578
C556
C556
4.7U
4.7U
0603
0603
C576
C576
0.01U
0.01U
0.1U
0.1U
25V 10V 25V 10V 10V
GND
C731
C731
0.01U
0.01U
0.1U
0.1U
C734
C734
C738
C738
0.1U
0.1U
0.1U
0.1U
C699
C699
0.01U
0.01U
25V 25V 25V 10V
C575
C575
C637
C637
0.1U
0.1U
0.1U
0.1U
C577
C577
C566
C566
0.1U
0.1U
0.01U
0.01U
C564
C564
C593
C593
0.01U
0.01U
0.01U
0.01U
C635
C635
0.1U
0.1U
C562
C562
0.1U
0.1U
10V 10V25V 25V
C655
C655
C657
C657
0.1U
0.1U
0.1U
0.1U
C737
C737
C653
C653
C724
0.01U
0.01U
C654
C654
0.01U
0.01U
C724
0.1U
0.1U
0.01U
0.01U
C656
C656
C681
C681
0.01U
0.01U
0.1U
0.1U
2
3
GND
C636
C636
C565
C565
0.01U
0.01U
0.1U
0.1U
4
C634
C634
C561
C561
0.01U
0.01U
0.1U
0.1U
25V10V6.3V
C563
C563
C633
C633
0.01U
0.01U
0.1U
0.1U
25V
GND
5
ASSEMBLY PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<XR_PAGE_TITLE>
DATE
7-MAY-2004
Page 5
MEMORY 128/256MB, 8Mx32DDR, PARTITION C, BANK 0 PLACE ALL DISCRETE COMPONENTS AS NEAR AS POSSIBLE
TO MEMORY
1
3>6<>
2
IN
FBVDD
FBCCS1*
R514 120R514 120
R513 120R513 120
R509 120R509 120
R508 120R508 120 R515 120R515 120
R516 120R516 120
R512 120R512 120
R510 120R510 120
stuff for stacked die
R506 *0R506 *0
R507 0R507 0
stuff for monolithic die
FBC_B0_CS0*
FBC_B1_CS1*
FBCCLK1*
FBCCLK0
FBCCLK0*
FBCCLK1
6< 6<>
OUT
7<
OUT
R511
R511 619
619
1%
1%
R6
R6 619
619
1%
1%
FBC_CMD[26..0]
3>6<6<>7<
IN
FBCRAS* FBCRAS*
3>6<>7<
IN
FBCCAS* FBCCAS*
3>6<>7<
IN
FBCWE* FBCWE*
3>6<>7<
IN
FBCCS0* FBCCS0*
3>6<>
IN
FBC_B0_CS0* FBC_B0_CS0*
6>6<>
IN
FBC_CMD1 FBC_CMD1
1
FBC_CMD3 FBC_CMD3
3
FBC_CMD2
2
FBC_CMD0
0
FBC_CMD24
24
FBC_CMD22
22
FBC_CMD21 FBC_CMD21
21
FBC_CMD23 FBC_CMD23
23
FBC_CMD19 FBC_CMD19
19
FBC_CMD20 FBC_CMD20
20
FBC_CMD17 FBC_CMD17
17
FBC_CMD16 FBC_CMD16
16
FBC_CMD14 FBC_CMD14
14
FBC_CMD10 FBC_CMD10
10
FBC_CMD18 FBC_CMD18
18
FBCCKE FBCCKE
3>6<>7<
IN
FBCCLK0
3>7<
IN
FBCCLK0*
3>7<
IN
GND
3
FBCDQM0
3>6<>7<
IN
FBCDQM1
3>6<>7<
IN
FBCDQM2
3>6<>7<
IN
FBCDQM3
3>6<>7<
IN
FBCDQM4
3>6<>7<
IN
FBCDQM5
3>6<>7<
IN
FBCDQM6
3>6<>7<
IN
FBCDQM7
3>6<>7<
IN
3<>6<>7<>
BI
4
FBCDQS0
3<>6<>7<>
BI
FBCDQS1
3<>6<>7<>
BI
FBCDQS2
3<>6<>7<>
BI
FBCDQS3
3<>6<>7<>
BI
FBCDQS4
3<>6<>7<>
BI
FBCDQS5
3<>6<>7<>
BI
FBCDQS6
3<>6<>7<>
BI
FBCDQS7
3<>6<>7<>
BI
FBCD[63..0]
FBCD6
6
FBCD7
7
FBCD5
5
FBCD4
4
FBCD2
2
FBCD3
3
FBCD1
1
FBCD0
0
FBCDQM0 FBCDQS0
FBCD[63..0]
FBCD15
15
FBCD13
13
FBCD14
14
FBCD12
12
FBCD11
11
FBCD9
9
FBCD10
10
FBCD8
8
FBCDQM1 FBCDQS1
U2B
U2B
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
M2
RAS
L2
CAS
L3
WE
N2
CS<0>
M4
CS<1>/TBD.
N5
A<0>
N6
A<1>
M6
A<2>
N7
A<3>
N8
A<4>
M9
A<5>
N9
A<6>
N10
A<7>
N11
A/AP<8>
M8
A<9>
L6
A<10>
M7
A<11>
L9
A<12>/TBD.
N4
BA<0>
M5
BA<1>
M10
BA<2>/TBD.
N12
CKE
M11
CLK
M12
CLK
R501
R501 10K
10K
GND
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
M13
Must be GND
GND
U2A
U2A
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
F13
DQ<0>
F12
DQ<1>
J13
DQ<2>
G13
DQ<3>
K12
DQ<4>
K13
DQ<5>
G12
DQ<6>
J12
DQ<7>
H12
DQM
H13
DQS
U2E
U2E
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
B6
DQ<0>
D2
DQ<1>
B5
DQ<2>
C2
DQ<3>
B7
DQ<4>
D3
DQ<5>
E2
DQ<6>
C6
DQ<7>
B3
DQM
B2
DQS
2/4/8MX32
NC
NC
C4
C11
NC
NC
NC
NC
NC
H4
N3
M3
L12NCL13
H11
FBCD22
22
FBCD23
23
FBCD20
20
FBCD21
21
FBCD19
19
FBCD18
18
FBCD16
16
FBCD17
17
FBCDQM2 FBCDQS2
FBCD31
31
FBCD29
29
FBCD30
30
FBCD28
28
FBCD27
27
FBCD25
25
FBCD26
26
FBCD24
24
FBCDQM3 FBCDQS3
D7
VDD2/4/8MX32
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
B4
VSSQ
B11
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E6
VSSQ
E9
VSSQ
F5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5
VSSQ
J10
VSSQ
K5
VSSQ
K10
VSSQ
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
N13
Vref
GND
U3B
FBVDD
FBVDD
7<
1 3
FBC_CMD13
13
FBC_CMD4
4
FBC_CMD5
5
FBC_CMD6
6 21 23 19 20 17 16 14
10 18
FBCCLK1
3>7<
IN
FBCCLK1*
3>7<
IN
FBC_CMD[26..0]
3>6<6<>
IN
FBVDD
R1
R1 10K
10K
1%
FBCVREF1
12_mil
1%
R2
R2
C23
C23
6.81K
6.81K
0.1U
0.1U
1%
1%
10V 10V
U3B
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
M2
RAS
L2
CAS
L3
WE
N2
CS<0>
M4
CS<1>/TBD.
N5
A<0>
N6
A<1>
M6
A<2>
N7
A<3>
N8
A<4>
M9
A<5>
N9
A<6>
N10
A<7>
N11
A/AP<8>
M8
A<9>
L6
A<10>
M7
A<11>
L9
A<12>/TBD.
N4
BA<0>
M5
BA<1>
M10
BA<2>/TBD.
N12
CKE
M11
CLK
M12
CLK
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
M13
Must be GND
GND
NC
C4
GND
U2D
U2D
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
D12
DQ<0>
C13
DQ<1>
D13
DQ<2>
E13
DQ<3>
C9
DQ<4>
B10
DQ<5>
B8
DQ<6>
B9
DQ<7>
B12
DQM
B13
DQS
U2C
U2C
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
G2
DQ<0>
K2
DQ<1>
J2
DQ<2>
F2
DQ<3>
G3
DQ<4>
K3
DQ<5>
J3
DQ<6>
F3
DQ<7>
H3
DQM
H2
DQS
FBCD39
39
FBCD37
37
FBCD38
38
FBCD36
36
FBCD35
35
FBCD33
33
FBCD34
34
FBCD32
32
FBCDQM4 FBCDQS4
FBCD46
46
FBCD47
47
FBCD45
45
FBCD44
44
FBCD42
42
FBCD43
43
FBCD41
41
FBCD40
40
FBCDQM5 FBCDQS5
U3A
U3A
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
G2
DQ<0>
K2
DQ<1>
F2
DQ<2>
J2
DQ<3>
J3
DQ<4>
F3
DQ<5>
K3
DQ<6>
G3
DQ<7>
H3
DQM
H2
DQS
U3E
U3E
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
C6
DQ<0>
D2
DQ<1>
B5
DQ<2>
B7
DQ<3>
E2
DQ<4>
B6
DQ<5>
C2
DQ<6>
D3
DQ<7>
B3
DQM
B2
DQS
2/4/8MX32
NC
NC
NC
H4
C11
H11
HGFEDCBA
NET Diffpair NET_SPACING_RULE
FBCD[63..0]
3<>6<>7<>
BI
FBCDQM[7..0]
3>6<7<
BI
FBCDQS[7..0]
3<>6<>7<>
BI
FBVDD
D7
VDD2/4/8MX32
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
FBVDD
L11
VDD
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
B4
VSSQ
B11
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E6
VSSQ
E9
VSSQ
F5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5
VSSQ
J10
VSSQ
K5
VSSQ
K10
VSSQ
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
N13
Vref
NC
NC
NC
N3
M3
L12NCL13
GND
FBCD55
55
FBCD53
53
FBCD54
54
FBCD52
52
FBCD51
51
FBCD49
49
FBCD50
50
FBCD48
48
FBCDQM6 FBCDQS6
FBCD62
62
FBCD63
63
FBCD60
60
FBCD61
61
FBCD59
59
FBCD58
58
FBCD56
56
FBCD57
57
FBCDQM7 FBCDQS7
FBVDD
FBCVREF0
12_mil
C24
C24
0.1U
0.1U
GND
U3D
U3D
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
J13
DQ<0>
F13
DQ<1>
K13
DQ<2>
G13
DQ<3>
K12
DQ<4>
G12
DQ<5>
J12
DQ<6>
F12
DQ<7>
H12
DQM
H13
DQS
U3C
U3C
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2 COMMON
COMMON
E13
DQ<0>
B10
DQ<1>
C9
DQ<2>
C13
DQ<3>
B9
DQ<4>
D13
DQ<5>
B8
DQ<6>
D12
DQ<7>
B12
DQM
B13
DQS
R4
R4 10K
10K
1%
1%
R3
R3
6.81K
6.81K
1%
1%
Decoupling for left MEMORY
Place around the MEM
FBVDD
C58
C59
C59
0.01U
0.01U
25V 10V 25V 25V10V 10V
C25
C25
C22
C22
0.1U
0.1U
0.1U
0.1U
C58
C11
C11
0.01U
0.01U
0.1U
0.1U
GND
FBVDD
C47
C47
4.7U
4.7U
0603
0603
C57
C57
C3
0.1U
0.1U
0.1UC30.1U
10V10V 10V 10V6.3V
C2
C4
0.1UC20.1U
0.1UC40.1U
GND
Decoupling for left MEMORY
Place around the MEM
FBVDD
C53
C53
4.7U
4.7U
0603
0603
C7
C37
C37
0.01U
0.01U
25V 25V 25V 10V 10V
C27
C27
C35
0.1UC70.1U
10V 10V 10V 25V6.3V
C35
0.1U
0.1U
0.1U
0.1U
GND
FBVDD
C5
C21
C21
0.1U
0.1U
10V 10V 10V 10V
C51
C51
0.1UC50.1U
C6
0.01U
0.01U
0.1UC60.1U
25V 10V 10V
C12
C12
0.1U
0.1U
GND
FBC_CMD[26..0]
3>6<7<
BI
FBCRAS*
3>6<7<
BI
FBCCAS*
3>6<7<
BI
FBCWE*
3>6<7<
BI
FBCCS0*
3>6<
BI
FBCCS1*
3>6<
BI
FBCCKE
3>6<7<
BI
FBC_B0_CS0*
6<6>
BI
C49
C49
C26
C44
C44
0.1U
0.1U
C10
C10
0.1U
0.1U
10V 10V 10V 10V 10V 10V
C63
C63
0.01U
0.01U
C14
C14
0.1U
0.1U
C61
C61
0.1U
0.1U
10V 10V 25V 25V
C26
0.01U
0.01U
0.1U
0.1U
C9
C8
0.1UC90.1U
0.1UC80.1U
C34
C34
C60
C60
0.1U
0.1U
0.1U
0.1U
10V 10V 25V
C62
C62
C13
C13
0.01U
0.01U
0.1U
0.1U
C42
C42
C15
C15
0.01U
0.01U
0.1U
0.1U
25V 25V
C29
C29
C32
C32
0.1U
0.1U
0.01U
0.01U
GND
10MIL 10MIL 10MIL
10MIL
10MIL 10MIL 10MIL 10MIL 10MIL
10MIL 10MIL
C36
C36
0.01U
0.01U
25V10V 10V
C28
C28
C48
C48
C20
C20
0.1U
0.1U
C31
C31
0.01U
0.01U
0.1U
0.1U
0.1U
0.1U
C55
C55
C41
C41
0.01U
0.01U
0.01U
0.01U
25V25V
1
2
3
GND
C56
C56
C45
C45
0.01U
0.01U
0.1U
0.1U
4
C50
C50
0.01U
0.01U
C64
C64
0.01U
0.01U
5
ASSEMBLY PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
5
7-MAY-2004
Page 6
MEMORY 128/256MB, 8Mx32DDR, PARTITION C, BANK 1
PLACE ALL DISCRETE COMPONENTS AS NEAR AS POSSIBLE TO MEMORY
1
3>6<6<> 3>6<6<> 3>6<6<> 6>
FBC_CMD[26..0]
3>6<6<>7<
IN
2
3
FBCDQM0
3>6<>6<
IN
FBCDQM1
3>6<>6<
IN
FBCDQM2
3>6<>6<
IN
FBCDQM3
3>6<>6<
IN
FBCDQM4
3>6<>6<
IN
FBCDQM5
3>6<>6<
IN
FBCDQM6
3>6<>6<
IN
FBCDQM7
3>6<>6<
IN
3<>6<>
4
FBCDQS0
3<>6<>
BI
FBCDQS1
3<>6<>
BI
FBCDQS2
3<>6<>
BI
FBCDQS3
3<>6<>
BI
FBCDQS4
3<>6<>
BI
FBCDQS5
3<>6<>
BI
FBCDQS6
3<>6<>
BI
FBCDQS7
3<>6<>
BI
5
3>6<6<> 3>6< 3>6<
BI
6 7 5 4 2 3 1 0
15 13 14 12 11 9 10 8
U502B
U502B
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
FBCRAS* FBCRAS*
IN
FBCCAS* FBCCAS*
IN
FBCWE* FBCWE*
IN
FBC_B1_CS1* FBC_B1_CS1*
IN
FBC_CMD23 FBC_CMD23
23
FBC_CMD21 FBC_CMD21
21
FBC_CMD22
22
FBC_CMD24
24
FBC_CMD0
0
FBC_CMD2
2
FBC_CMD3 FBC_CMD3
3
FBC_CMD1 FBC_CMD1
1
FBC_CMD16 FBC_CMD16
16
FBC_CMD17 FBC_CMD17
17
FBC_CMD20 FBC_CMD20
20
FBC_CMD19 FBC_CMD19
19
FBC_CMD14 FBC_CMD14
14
FBC_CMD18 FBC_CMD18
18
FBC_CMD10 FBC_CMD10
10
FBCCKE FBCCKE
IN
FBCCLK0
IN
FBCCLK0*
IN
FBCD[63..0]
FBCD6 FBCD7 FBCD5 FBCD4 FBCD2 FBCD3 FBCD1 FBCD0
FBCDQM0 FBCDQS0
FBCD[63..0]
FBCD15 FBCD13 FBCD14 FBCD12 FBCD11 FBCD9 FBCD10 FBCD8
FBCDQM1 FBCDQS1
COMMON
M2
RAS
L2
CAS
L3
WE
N2
CS<0>
M4
CS<1>/TBD.
N5
A<0>
N6
A<1>
M6
A<2>
N7
A<3>
N8
A<4>
M9
A<5>
N9
A<6>
N10
A<7>
N11
A/AP<8>
M8
A<9>
L6
A<10>
M7
A<11>
L9
A<12>/TBD.
N4
BA<0>
M5
BA<1>
M10
BA<2>/TBD.
N12
CKE
M11
CLK
M12
CLK
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
M13
Must be GND
NC
GND
C4
U502A
U502A
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
F2
DQ<0>
F3
DQ<1>
J2
DQ<2>
G2
DQ<3>
K3
DQ<4>
K2
DQ<5>
G3
DQ<6>
J3
DQ<7>
H3
DQM
H2
DQS
U502E
U502E
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
B9
DQ<0>
D13
DQ<1>
B10
DQ<2>
C13
DQ<3>
B8
DQ<4>
D12
DQ<5>
E13
DQ<6>
C9
DQ<7>
B12
DQM
B13
DQS
2/4/8MX32
NC
NC
NC
H4
C11
H11
22 23 20 21 19 18 16 17
31 29 30 28 27 25 26 24
NC
NC
NC
N3
M3
L12NCL13
FBCD22 FBCD23 FBCD20 FBCD21 FBCD19 FBCD18 FBCD16 FBCD17
FBCDQM2 FBCDQS2
FBCD31 FBCD29 FBCD30 FBCD28 FBCD27 FBCD25 FBCD26 FBCD24
FBCDQM3 FBCDQS3
D7
VDD2/4/8MX32
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
B4
VSSQ
B11
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E6
VSSQ
E9
VSSQ
F5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5
VSSQ
J10
VSSQ
K5
VSSQ
K10
VSSQ
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
N13
Vref
FBVDD
7<
FBC_CMD[26..0]
3>6<
IN
6<>
FBVDD
FBCVREF3
12_mil
C511
C511
0.1U
0.1U
10V 10V
GND
U502D
U502D
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
D3
DQ<0>
C2
DQ<1>
D2
DQ<2>
E2
DQ<3>
C6
DQ<4>
B5
DQ<5>
B7
DQ<6>
B6
DQ<7>
B3
DQM
B2
DQS
U502C
U502C
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
G13
DQ<0>
K13
DQ<1>
J13
DQ<2>
F13
DQ<3>
G12
DQ<4>
K12
DQ<5>
J12
DQ<6>
F12
DQ<7>
H12
DQM
H13
DQS
FBVDD
GND
3>6< 3>6<
R503
R503 10K
10K
1%
1%
R502
R502
6.81K
6.81K
1%
1%
HGFEDCBA
1
U501B
U501B
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
M2
RAS
2/4/8MX32
L2
CAS
L3
WE
N2
CS<0>
M4
CS<1>/TBD.
N5
23 21
FBC_CMD6
6
FBC_CMD5
5
FBC_CMD4
4
FBC_CMD13
13 3 1 16 17 20 19 14
18 10
FBCCLK1
IN
FBCCLK1*
IN
FBCD39
39
FBCD37
37
FBCD38
38
FBCD36
36
FBCD35
35
FBCD33
33
FBCD34
34
FBCD32
32
FBCDQM4 FBCDQS4
FBCD46
46
FBCD47
47
FBCD45
45
FBCD44
44
FBCD42
42
FBCD43
43
FBCD41
41
FBCD40
40
FBCDQM5 FBCDQS5
A<0>
N6
A<1>
M6
A<2>
N7
A<3>
N8
A<4>
M9
A<5>
N9
A<6>
N10
A<7>
N11
A/AP<8>
M8
A<9>
L6
A<10>
M7
A<11>
L9
A<12>/TBD.
N4
BA<0>
M5
BA<1>
M10
BA<2>/TBD.
N12
CKE
M11
CLK
M12
CLK
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
M13
Must be GND
GND
U501A
U501A
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
G13
DQ<0>
K13
DQ<1>
F13
DQ<2>
J13
DQ<3>
J12
DQ<4>
F12
DQ<5>
K12
DQ<6>
G12
DQ<7>
H12
DQM
H13
DQS
U501E
U501E
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
C9
DQ<0>
D13
DQ<1>
B10
DQ<2>
B8
DQ<3>
E13
DQ<4>
B9
DQ<5>
C13
DQ<6>
D12
DQ<7>
B12
DQM
B13
DQS
NC
NC
NC
NC
NC
NC
NC
C4
H4
N3
M3
L12NCL13
C11
H11
55 53 54 52 51 49 50 48
FBCDQM6 FBCDQS6
FBCD62
62
FBCD63
63
FBCD60
60
FBCD61
61
FBCD59
59
FBCD58
58
FBCD56
56
FBCD57
57
FBCDQM7 FBCDQS7
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
Vref
FBCD55 FBCD53 FBCD54 FBCD52 FBCD51 FBCD49 FBCD50 FBCD48
D7
VDD2/4/8MX32
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11
B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
N13
GND
FBVDD
FBVDD
FBVDD
R504
R504 10K
10K
1%
1%
FBCVREF4
12_mil
R505
R505
6.81K
6.81K
C517
C517
1%
1%
0.1U
0.1U
GND
U501D
U501D
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
J2
DQ<0>
F2
DQ<1>
K2
DQ<2>
G2
DQ<3>
K3
DQ<4>
G3
DQ<5>
J3
DQ<6>
F3
DQ<7>
H3
DQM
H2
DQS
U501C
U501C
BGA_DIAMOND144_P08_DDR _12MM_B2
BGA_DIAMOND144_P08_DDR _12MM_B2 COMMON
COMMON
E2
DQ<0>
B5
DQ<1>
C6
DQ<2>
C2
DQ<3>
B6
DQ<4>
D2
DQ<5>
B7
DQ<6>
D3
DQ<7>
B3
DQM
B2
DQS
Decoupling for left MEMORY
FBVDD
Place around the MEM
C506
C529
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
10V10V 10V 10V 25V10V
C506
C512
C512
C529
C546
C546
C523
C523
0.1U
0.1U
0.01U
0.01U
25V 25V 25V 10V
GND
FBVDD
C502
C502
C505
C505
4.7U
4.7U
0.1U
0.1U
0603
0603
GND
C509
C509
0.1U
0.1U
10V 10V 10V 10V 10V 10V
Decoupling for left MEMORY
FBVDD
Place around the MEM
C518
C518
C508
C508
0.1U
0.1U
0.1U
0.1U
10V 10V 25V
C548
C548
C510
C510
0.01U
0.01U
0.1U
0.1U
25V 10V 25V
C549
C549
C519
C519
0.1U
0.1U
0.1U
0.1U
C535
C535
C536
C536
0.01U
0.01U
0.01U
0.01U
25V 25V 10V
C685
C685
0.1U
0.1U
C540
C540
0.1U
0.1U
C507
C507
0.1U
0.1U
GND
FBVDD
C542
C542
C526
C526
C503
C503
0.1U
0.1U
0.1U
0.1U
0.01U
0.01U
25V 10V 10V 10V 10V 10V
C544
C544
0.01U
0.01U
GND
C513
C513
C504
C504
4.7U
4.7U
0.1U
0.1U
10V 10V6.3V
0603
0603
C516
C516
0.1U
0.1U
C538
C538
0.01U
0.01U
C515
C515
0.1U
0.1U
C547
C547
C531
C527
C527
0.01U
0.01U
C537
C537
0.01U
0.01U
25V10V 10V6.3V
C521
C521
0.1U
0.1U
C531
C525
0.01U
0.01U
C525
0.1U
0.1U
0.01U
0.01U
2
3
GND
C543
C543
0.01U
0.01U
4
C514
C514
C530
C530
0.1U
0.1U
0.1U
0.1U
C524
C524
C522
C522
0.01U
0.01U
0.01U
0.01U
C520
C520
C528
C528
0.1U
0.1U
0.1U
0.1U
C539
C539
C545
C545
0.1U
0.1U
0.1U
0.1U
10V10V25V 25V 25V
GND
5
ASSEMBLY PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<XR_PAGE_TITLE>
DATE
7-MAY-2004
Page 7
3V3RUN 3V3RUN
U9D
U9D
BGA820_P10_33X33MM
R571
R571
90.9
90.9
1%
1%
GND
R589
R589 10K
10K
1%
1%
GND
BGA820_P10_33X33MM COMMON
COMMON
4/14 DACA
4/14 DACA
AD10
DACA_VDD
AH10
DACA_VREF
AH9
DACA_RSET
U9G
U9G
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
5/14 DACB(TV)
5/14 DACB(TV)
V8
DACB_VDD
R5
DACB_VREF
R7
DACB_RSET
R570
R570
1.78K
1.78K
1%
1%
U9F
U9F
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
6/14 DACC
6/14 DACC
AD7
DACC_VDD
AH4
DACC_VREF
AF5
DACC_RSET
I2CA_SCL I2CA_SDA
DACA_HSYNC DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_IDUMP
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_IDUMP
I2CB_SCL I2CB_SDA
DACC_HSYNC DACC_VSYNC
DACC_RED
DACC_GREEN
DACC_BLUE
DACC_IDUMP
I2CA_SCL
K2
I2CA_SDA
J3
DACA_HSYNC
AF10
DACA_VSYNC
AK10
AH11
DACA_RED
AJ12
DACA_GREEN
AH12
DACA_BLUE
AG9
R591
R591
GND
150
150
1%
1%
GND
GND
DACB_RED
R6
DACB_GREEN
T5
DACB_BLUE
T6
V7
H4 J4
AG7 AG5
AF6
AG6
AE5
AG4
GND
I2CB_SCL I2CB_SDA
GND
R578
R578 150
150
1%
1%
GND
R548 33R548 33
R551 33R551 33
IMPEDANCE_RULE
::37.5 20MIL_G2G_30MIL
R585
R585
R590
R590
150
150
150
150
1%
1%
1%
1%
GND
IMPEDANCE_RULE NET_SPACING_TYPE
::37.5
R579
R579
R577
R577
150
150
150
150
1%
1%
1%
1%
GND
R556 33R556 33
1
3V3RUN
LB512
LB512
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C692
C692
4.7U
4.7U
6.3V 50V25V 0603
0603
C698
C698 4700P
4700P
12_mil
10MIL_TRACE
C697
C697 470P
470P
DACA_VDD
DACA_VREF
DACA_RSET
C723
C723
R592
R592
0.01U
0.01U
137
137
1%
1%
16V
GND
3V3RUN
2
LB506
LB506
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
GND
3
12_mil
10MIL_TRACE
C644
C644
4.7U
4.7U
6.3V 50V25V 16V 0603
0603
C648
C648 4700P
4700P
IN
C647
C647 470P
470P
SEL_SDTV_HDTV
R85
R85 10K
10K
GND
R584 1K1%R584 1K
1%
C650
C650
0.01U
0.01U
D
G
1
S
SOT23
SOT23
BAM25020Z08
BAM25020Z08
R86
R86 365
365
1%
1%
3
Q3
Q3
IRLML2502
IRLML2502
2
20V
20V 3A
3A
0.080R
0.080R 20A
20A
0.5W@70C
0.5W@70C +/-8V
+/-8V
DACB_VDD
DACB_VREF
DACC_VDD
GND
I2CA_SCL_R
I2CA_SDA_R
NET_SPACING_TYPE
20MIL_G2G_30MIL::37.5
20MIL_G2G_30MIL::37.5
20MIL_G2G_30MIL::37.5
20MIL_G2G_30MIL::37.5
20MIL_G2G_30MIL
R539 33R539 33
R550
R550
R549
R549
2.2K
2.2K
2.2K
2.2K
GND
U9E
U9E
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
GND
COMMON
T9
T10
U10
T1
U1
13/14 XTAL_PLL
13/14 XTAL_PLL
PLLVDD VID_PLLVDD
PLLGND
XTALSSIN
XTALIN
XTALOUTBUFF
27 MHZY1
27 MHZ
13
10 PPM 85CXTAL_4_SMT_LP_H10S
10 PPM 85CXTAL_4_SMT_LP_H10S COMMON
COMMON
SPACINGSPACING
Y1
XTALOUT
XTALOUT
U2
R39
R39 *10K
*10K
GND
C109
C109 22P
22P
BXTALOUT
T2
R38 22R38 22
XTALOUTBUFF
OUT
GND
ASSEMBLY PAGE
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
4
5
3V3RUN
LB505
LB505
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C673
C673
4.7U
4.7U
6.3V 50V25V10V 0603
0603
GND
C617
C617 1U
1U
0603
0603
12_mil
C621
C621 4700P
4700P
13>
IN
PLLVDD
10MIL_TRACE
C631
C631 470P
470P
SSFOUT
13MIL_G2G 13MIL_G2G
XTALIN
C103
C103 22P
22P
GND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
OUT
OUT
OUT
13<
10<
OUT
10<>
BI
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
10<
10<
3V3RUN 3V3RUN
R557
R557
2.2K
2.2K
R540
R540
2.2K
2.2K
I2CB_SCL_R
I2CB_SDA_R
HGFEDCBA
1
2
10<
OUT
10<>
BI
3
4
5
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
7-MAY-2004
Page 8
HGFEDCBA
U9I
U9I
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
7/14 IFPAB
7/14 IFPAB
AM4
IFPAB_VPROBE
AL5
IFPAB_RSET
AC9
IFPAB_PLLVDD
C682
C682 470P
470P
AD9
IFPAB_PLLGND
AF9
IFPA_IOVDD
AF8
IFPB_IOVDD
1%
1%
C711
C711 4700P
4700P
C676
C676 4700P
4700P
IFPABPLLVDD
IFPAIOVDD
IFPABRSET
C719
C719 470P
470P
R596 1K
1
3V3RUN
LB513
LB513
BLM18PG181SN1D
BLM18PG181SN1D
0603
C555
C555
4.7U
4.7U
6.3V 50V25V 0603
0603
0603
GND
LVDSIOVDD
LB515
LB515
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C717
C717
4.7U
4.7U
6.3V 0603
0603
2
GND
GND
C721
C721
C716
C716
0.1U
0.1U
4.7U
4.7U
10V
6.3V 25V 50V16V
0603
0603
R596 1K
GND
12_mil
C693
C693
4.7U
4.7U
6.3V 0603
0603
GND
12_mil
C720
C720
0.022U
0.022U
IFPA_TXC IFPA_TXC
IFPA_TXD0 IFPA_TXD0
IFPA_TXD1 IFPA_TXD1
IFPA_TXD2 IFPA_TXD2
IFPA_TXD3 IFPA_TXD3
IFPB_TXC IFPB_TXC
IFPB_TXD4 IFPB_TXD4
IFPB_TXD5 IFPB_TXD5
IFPB_TXD6 IFPB_TXD6
IFPB_TXD7 IFPB_TXD7
IFPATXC*
AJ9
IFPATXC
AK9
IFPATXD0*
AJ6
IFPATXD0
AH6
IFPATXD1*
AH7
IFPATXD1
AH8
IFPATXD2*
AK8
IFPATXD2
AJ8
IFPATXD3*
AH5
IFPATXD3
AJ5
IFPBTXC*
AL4
IFPBTXC
AK4
IFPBTXD4*
AM5
IFPBTXD4
AM6
IFPBTXD5*
AL7
IFPBTXD5
AM7
IFPBTXD6*
AK5
IFPBTXD6
AK6
IFPBTXD7*
AL8
IFPBTXD7
AK7
NET_SPACING_RULE
25MIL TMDS/PCIE/CLKIFPATXC 25MIL TMDS/PCIE/CLKIFPATXC
25MIL TMDS/PCIE/CLKIFPATXD0 25MIL TMDS/PCIE/CLKIFPATXD0
25MILIFPATXD1 TMDS/PCIE/CLK 25MILIFPATXD1 TMDS/PCIE/CLK
25MIL TMDS/PCIE/CLKIFPATXD2 25MIL TMDS/PCIE/CLKIFPATXD2
25MIL TMDS/PCIE/CLKIFPATXD3 25MIL TMDS/PCIE/CLKIFPATXD3
25MIL TMDS/PCIE/CLKIFPBTXC 25MIL TMDS/PCIE/CLKIFPBTXC
25MIL TMDS/PCIE/CLKIFPBTXD4 25MILIFPBTXD4 TMDS/PCIE/CLK
25MILIFPBTXD5 TMDS/PCIE/CLK 25MILIFPBTXD5 TMDS/PCIE/CLK
25MIL TMDS/PCIE/CLKIFPBTXD6 25MILIFPBTXD6 TMDS/PCIE/CLK
25MILIFPBTXD7 TMDS/PCIE/CLK 25MILIFPBTXD7 TMDS/PCIE/CLK
NET_PHYSICAL_TYPENET NAME DIFFPAIR
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
10<
OUT
1
2
IFPCTXC
R64
R64
49.9
49.9
IFPCDIOVDD
1%
1%
R65
R65
49.9
49.9
1%
1%
IFPCTXC*
U9H
U9H
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
8/14 IFPCD
8/14 IFPCD
AK3
IFPCD_VPROBE
AH3
IFPCD_RSET
AA10
IFPCD_PLLVDD
AB10
IFPCD_PLLGND
AD6
IFPC_IOVDD
AE7
IFPD_IOVDD
IFPCTXD0
IFPCTXD0*
R48
R48
49.9
49.9
1%
1%
R49
R49
49.9
49.9
1%
1%
ASSEMBLY PAGE
DETAIL
C111
C111
0.1U
0.1U
10V 10V 10V 10V 10V 10V
GND
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
3
TMDSPLLVDD
LB507
LB507
BLM18PG181SN1D
BLM18PG181SN1D
0603
C671
C671
4.7U
4.7U
6.3V 0603
0603
GND
1
3V3RUN
TMDS_RUNPWORK*
3
Q4 2N7002EQ42N7002E
2
R19
R19 10K
10K
4
RUNPWROK
IN
GND
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
0603
1%
1%
C713
C713 4700P
4700P
C664
C664 4700P
4700P
IFPCBRSET
IFPCPLLVDD
C712
C712 470P
470P
C659
C659 470P
470P
GND
R587 1K
R587 1K
IFPCDIOVDD
C727
C727
4.7U
4.7U
0603
0603
GND
12_mil
C672
C672
4.7U
4.7U
6.3V 50V25V 0603
0603
GND
12_mil
C696
C696
0.1U
0.1U
10V 50V6.3V 25V
LB508
LB508
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
3
Q5 SI2305DSQ5SI2305DS
1
2
LB516
C618
C618
4.7U
4.7U
6.3V 0603
0603
LB516
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
GND
TMDSIOVDD
GND
IFPC_TXC IFPC_TXC
IFPC_TXD0 IFPC_TXD0
IFPC_TXD1 IFPC_TXD1
IFPC_TXD2 IFPC_TXD2
IFPD_TXC IFPD_TXC
IFPD_TXD4 IFPD_TXD4
IFPD_TXD5 IFPD_TXD5
IFPD_TXD6 IFPD_TXD6
IFPCTXD1
R50
R50
49.9
49.9
1%
1%
R51
R51
49.9
49.9
1%
1%
IFPCTXD1*
IFPCTXD2
R52
R52
49.9
49.9
1%
1%
R54
R54
49.9
49.9
1%
1%
IFPCTXD2*
IFPCTXC*
AM3
IFPCTXC
AM2
IFPCTXD0*
AE1
IFPCTXD0
AE2
IFPCTXD1*
AF2
IFPCTXD1
AF1
IFPCTXD2*
AH1
IFPCTXD2
AG1
IFPDTXC*
AH2
IFPDTXC
AG3
IFPDTXD3*
AJ1
IFPDTXD3
AK1
IFPDTXD4*
AL1
IFPDTXD4
AL2
IFPDTXD5*
AJ3
IFPDTXD5
AJ2
E GC
IFPCDIOVDD
C129
C129
0.1U
0.1U
GND
IFPDTXD3
IFPDTXD5
25MILIFPCTXC 25MILIFPCTXC
25MILIFPCTXD0 25MILIFPCTXD0
25MILIFPCTXD1 25MILIFPCTXD1
25MILIFPCTXD2 25MILIFPCTXD2
25MILIFPDTXC 25MILIFPDTXC
25MILIFPDTXD3 25MIL
25MILIFPDTXD4 25MILIFPDTXD4
25MIL 25MILIFPDTXD5
IFPDTXC
IFPDTXC*
IFPDTXD3
IFPDTXD3*
IFPDTXD4
R71
R71
49.9
49.9
IFPCDIOVDD
1%
1%
R70
R70
49.9
49.9
1%
1%
R56
R56
49.9
49.9
1%
1%
C115
R55
R55
49.9
49.9
1%
1%
C115
0.1U
0.1U
GND
NET_PHYSICAL_TYPENET NAME DIFFPAIR NET_SPACING_RULE
TMDS/PCIE/CLK TMDS/PCIE/CLK
TMDS/PCIE/CLK TMDS/PCIE/CLK
TMDS/PCIE/CLK TMDS/PCIE/CLK
TMDS/PCIE/CLK TMDS/PCIE/CLK
TMDS/PCIE/CLK TMDS/PCIE/CLK
TMDS/PCIE/CLK TMDS/PCIE/CLK
TMDS/PCIE/CLK TMDS/PCIE/CLK
TMDS/PCIE/CLK TMDS/PCIE/CLK
IFPDTXD4*
IFPDTXD5
IFPDTXD5*
OUT OUT
OUT OUT
OUT OUT
OUT OUT
OUT OUT
OUT OUT
OUT OUT
OUT OUT
R61
R61
49.9
49.9
IFPCDIOVDD
1%
1%
R59
R59
49.9
49.9
1%
1%
R68
R68
49.9
49.9
1%
1%
C119
R69
R69
49.9
49.9
1%
1%
C119
0.1U
0.1U
GND
10< 10<
10< 10<
10< 10<
10< 10<
10< 10<
10< 10<
10< 10<
10< 10<
C105
C105
0.1U
0.1U
GND GND
C128
C128
0.1U
0.1U
3
4
5
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
7-MAY-2004
Page 9
HGFEDCBA
1
CN1B
CN1B
(NON)PHY-X16
(NON)PHY-X16 CON_MXM_230_FINGER_P0_5MM
CON_MXM_230_FINGER_P0_5MM COMMON
COMMON
2/2 IO - LVDS,DVI,VGA,TV
11<
OUT
10<
IN
8<>
BI
DVI_A_HPD
I2CB_SCL_R I2CB_SDA_R
2/2 IO - LVDS,DVI,VGA,TV
217
DVI_A_HPD
232
DDCB_SCLK
230
DDCB_SDATA
2
IGP LVDS
11<
OUT
8>
IN
8>
IN
8>
IN
8>
IN
8>
IN
8>
IN
8>
IN
8>
3
4
IN
8>
IN
8<>
BI
11>
IN
11>
IN
11>
IN
11<11>13<
IN
11<>13<>
BI
11<>
IN
11<
BI
11>
IN
13<14<15<
OUT
10<
IN
10<
IN
11>
IN
DVI_B_HPD
DACB_GREEN
DACB_RED
DACB_BLUE
DACA_VSYNC DACA_HSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
I2CA_SCL_R I2CA_SDA_R
GPIO3_PPEN GPIO4_BLEN GPIO2_BL_PWM
I2CC_SCL_R I2CC_SDA_R
SMB_DAT SMB_CLK
THERM_ALERT*
RUNPWROK
MXM_RSVD1 MXM_RSVD2 MXM_RSVD3
193
DVI_B_HPD
SDTV HDTV
SDTV HDTV
140
136
TV_C HDTV_Pr
144
TV_CVBS HDTV_Pb
153
VSYNC
151
HSYNC
148
VGA_RED
152
VGA_GRN
156
VGA_BLU
155
DDCA_SCLK
157
DDCA_SDATA
224
LVDS_PPEN
228
LVDS_BLEN
226
LVDS_BL_BRGHT
222
DDCC_SCLK
220
DDCC_SDATA
145
SMB_DAT
147
SMB_CLK
149
THERM
16
RUNPWROK
141
RSVD
169
RSVD
143
RSVD
HDTV_YTV_Y
IGP LVDS
MXM DVI-B
MXM DVI-B
DVI_B_CLKIGP_LCLK
RSVD RSVD
IGP_LTX1 DVI_B_TX1 IGP_LTX1 DVI_B_TX1
IGP_LTX0 DVI_B_TX0 IGP_LTX0 DVI_B_TX0
IGP_UCLK IGP_UCLK
RSVD RSVD
IGP_UTX2 IGP_UTX2
IGP_UTX1 IGP_UTX1
IGP_UTX0 IGP_UTX0
DVI_B_CLKIGP_LCLK
DVI_B_TX2IGP_LTX2 DVI_B_TX2IGP_LTX2
DVI_A_CLK DVI_A_CLK
DVI_A_TX0 DVI_A_TX0
DVI_A_TX1 DVI_A_TX1
DVI_A_TX2 DVI_A_TX2
LVDS_UTX0 LVDS_UTX0
LVDS_UTX1 LVDS_UTX1
LVDS_UTX2 LVDS_UTX2
LVDS_UTX3 LVDS_UTX3
LVDS_UCLK LVDS_UCLK
LVDS_LTX0 LVDS_LTX0
LVDS_LTX1 LVDS_LTX1
LVDS_LTX2 LVDS_LTX2
LVDS_LTX3 LVDS_LTX3
LVDS_LCLK LVDS_LCLK
219 221
237 239
231 233
225 227
189 191
195 197
201 203
207 209
213 215
159 161
165 167
171 173
177 179
183 185
186 184
180 178
174 172
168 166
162 160
216 214
210 208
204 202
198 196
192 190
IFPCTXC* IFPCTXC
IFPCTXD0* IFPCTXD0
IFPCTXD1* IFPCTXD1
IFPCTXD2* IFPCTXD2
IFPDTXC* IFPDTXC
IFPDTXD5* IFPDTXD5
IFPDTXD4* IFPDTXD4
IFPDTXD3* IFPDTXD3
NTP_JTAG_TRST_C
NTP_JTAG_TDO_C NTP_JTAG_TMS_C
NTP_JTAG_TDI_C NTP_JTAG_TCLK_C
IFPBTXD4
IFPBTXD4*
IFPBTXD5
IFPBTXD5*
IFPBTXD6
IFPBTXD6*
IFPBTXD7
IFPBTXD7*
IFPBTXC
IFPBTXC*
IFPATXD0
IFPATXD0*
IFPATXD1
IFPATXD1*
IFPATXD2
IFPATXD2*
IFPATXD3
IFPATXD3*
IFPATXC
IFPATXC*
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
11<
OUT
11>
IN
11<
OUT
11<
OUT
11<
OUT
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
1
2
3
4
5
ASSEMBLY PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<XR_PAGE_TITLE>
DATE
5
7-MAY-2004
Page 10
HGFEDCBA
1
1
3V3RUN
R33
R33 200
200
VDD
THERM ALERT
GND
THERM_VDD
C86
C86
0.1U
0.1U
12_mil
16V
3V3RUN
R545
R545
GND
10K
1
4 6
5
10K
THERM_ALERT*
3V3RUN
R534
R534 10K
10K
OUT
2
3V3RUN
GND
3V3RUN
F6
CLAMP
I2CC_SCL I2CC_SDA
3V3RUN
5
U14
U14 NC7S02P5X
NC7S02P5X
1
2
AC_BATT_D RIVE
4
3
GND
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11 GPIO12
G1
K3 H1 K5 G5 E2 J5 G6 K6 E1 D2 H5 F4 E3
R84 *0R84 *0
I2CC_SDA
GPIO0_DVI_A_HPD GPIO1_DVI_B_HPD GPIO2_BL_PWM GPIO3_PPEN GPIO4_BLEN GPIO5_NVVDDCTL0 GPIO6_NVVDDCTL1 GPIO7_FBVDDCTL0 GPIO8_SLOWDOWN* GPIO9_MXM_RSVD2 GPIO10_MXM_RSVD1 SEL_SDTV_HDTV GPIO12_BATT_DISABLE*
3
Q2 2N7002EQ22N7002E
1
2
GND
R621
R621 10K
10K
GND GND GND
I2CC_SCL
G2
R27 33R27 33
R609
R609 10K
10K
R26 33R26 33
R552 0R552 0
R24
R24 10K
10K
R22 0R22 0
R559
R559
R567
R567
2.2K
2.2K
2.2K
2.2K
MXM_RSVD2 MXM_RSVD1
I2CC_SCL_R I2CC_SDA_R
OUT OUT
OUT OUT OUT
10< 11< 13<
OUT
10<> 11<> 13<>
BI
10<
OUT
10<
OUT
10<
OUT
14< 14> 15>
OUT
10< 10<
D506
D506
2
3V3RUN 3V3RUN
1 3
GND
BAV99
BAV99
R620 10KR620 10K
GND
R612
R612 100K
100K
D505
D505
2
1 3
BAV99
BAV99
R619 10KR619 10K
R611
R611 100K
100K
DVI_A_HPD
DVI_B_HPD
10>
IN
10>
IN
3
I2CC_SCL_R
I2CC_SDA_R
GND GND
4
I2C ADDRESS: 0x98H
I2CC_SDA_R
I2CC_SCL_R
SMB_CLK
SMB_DAT
R613 *0R613 *0 R615 *0R615 *0
R31 0R31 0 R30 0R30 0
R29 *0R29 *0 R32 *0R32 *0
3V3RUN 3V3RUN 3V3RUN
R617 *0R617 *0 R616 *0R616 *0 R614 *0R614 *0
C83
C83 2200P
2200P
50V
R603
R618
R618 180
180
R603
R601
R601
10K
10K
10K
10K
THERM*
THERM
JTAG_TCLK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST
R599
R599 10K
10K
R595
R595 270
270
GND GND
AC_BATT*
IN
R82 0R82 0
10<>11<>13<>
BI
10<11>13<
2
10>
IN
10>
IN
10>
IN
10<
OUT
10>
3
IN
IN
10<>
IN
10<
BI
NTP_JTAG_TCLK_C NTP_JTAG_TMS_C NTP_JTAG_TDI_C NTP_JTAG_TDO_C NTP_JTAG_TRST_C
4
10MIL 10MIL
THERM_SCL
THERM_SDA
2 3
8 7
U9J
U9J
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
J1
K1
AJ11 AK11 AK12 AL12 AL13
U6
U6
SO8_122MIL
SO8_122MIL COMMON
COMMON
D+ D-
SCL SDA
9/14 MISC1
9/14 MISC1
THERMDN
THERMDP
JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST
R83
R83 10K
10K
AC_BATT_IN
GND
5
ASSEMBLY PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
5
7-MAY-2004
Page 11
HGFEDCBA
U9L
1
R583 10R5 83 10
MIOBVDDQ
12_mil
C684
C684
0.1U
0.1U
10V
GND
2
3V3RUN
U9L
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
12/14 MIOB
12/14 MIOB
AA8
MIOB_VDDQ
AB7
MIOB_VDDQ
AB8
MIOB_VDDQ
AC6
MIOB_VDDQ
AC7
MIOB_VDDQ
Y1
MIOBCAL_PD_VDDQ
Y3
MIOBCAL_PU_GND
Y2
MIOB_VREF
MIOBD0 MIOBD1 MIOBD2 MIOBD3 MIOBD4 MIOBD5 MIOBD6 MIOBD7 MIOBD8
MIOBD9 MIOBD10 MIOBD11
RFU RFU RFU RFU
RFU RFU RFU RFU
MIOB_VSYNC MIOB_HSYNC
MIOB_DE
MIOB_CTL3
MIOB_CLKOUT MIOB_CLKOUT
MIOB_CLKIN
AC3 AC1 AC2
MIOBD3
AB2
MIOBD4
AB1
MIOBD5
AA1 AB3 AA3 AC5 AB5
MIOBD10
AB4
MIOBD11
AA5 W3 V1 Y5 W1
W4 W5 V5 Y6
AE3 AF3 AD1 AD3
AD4 AD5
MIOB_CLKIN
AE4
R602
R602 10K
10K
GND
3
3V3RUN
U9K
U9K
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
10/14 MISC2
10/14 MISC2
F1
STRAP
AE26
MEMSTRAPSEL0
AD26
MEMSTRAPSEL1
AH31
MEMSTRAPSEL2
AH32
MEMSTRAPSEL3
U3
RFU
V3
RFU
U6
RFU
U5
RFU
U4
RFU
V4
4
RFU
V6
RFU
ROM_SI ROM_SO
ROM_SCLK
I2CH_SCL I2CH_SDA
BUFRST
STEREO
SWAPRDY_A
TESTMEMCLK
TESTMODE
ROMCS
ROMCS*
AA4
ROM_SO
W2
ROM_SI
AA6
ROM_SCLK
AA7
I2CH_SCL
G3
I2CH_SDA
H3
F3
T3
TP_SWAPRDY_A
M6
TESTMCLK
A26
TESTMODE
H2
3V3RUN
R569
R569 10K
10K
3V3RUN
GND
R536
R536 *2.2K
R555
R555 10K
10K
*2.2K
R533
R533 10K
10K
GND GND
R535
R535 *10K
*10K
R53
R53 10K
10K
U5
U5
SO8_150MIL
SO8_150MIL COMMON
COMMON
6
SCL
5
SDA
3
SDA
2
NC
*U_MEM_EE_CRYPT_8X128
*U_MEM_EE_CRYPT_8X128
MIOBD[11..0]
3 4 5
10 11
U11
U11
3V3RUN
SO8_150MIL
SO8_150MIL SO8
SO8 ROM_AT
ROM_AT
7
HOLD8VCC
3
WP
1
CS
5
SI
2
SO
6
SCK
3V3RUN
8
VCC
7
VCC
C74
C74 *0.1U
*0.1U
4
GND
10V
1
GND
GND GND
16>
IN
3V3RUN
C110
C110
0.1U
0.1U
10V
4
GND
GND
U9M
U9M
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
14/14 _GND_
14/14 _GND_
AA12
GND
AA2
GND
AA21
GND
AA31
GND
AB27
GND
AB6
GND
AC10
GND
AC23
GND
AC29
GND
AC4
GND
AD16
GND
AD17
GND
AD2
GND
AD31
GND
AE17
GND
AE27
GND
AE6
GND
AF11
GND
AF26
GND
AF29
GND
AF4
GND
AF7
GND
AG10
GND
AG11
GND
AG14
GND
AG15
GND
AG19
GND
AG2
GND
AG22
GND
AG31
GND
AG8
GND
AH24
GND
AJ10
GND
AJ13
GND
AJ16
GND
AJ17
GND
AJ20
GND
AJ23
GND
AJ26
GND
AJ29
GND
AJ4
GND
AJ7
GND
AK2
GND
AK28
GND
AK31
GND
AL11
GND
AL14
GND
AL19
GND
AL22
GND
AL25
GND
AL3
GND
AL6
GND
AL9
GND
AM13
GND
AM16
GND
AM17
GND
AM20
GND
AM23
GND
AM26
GND
AM29
GND
B12
GND
B15
GND
B18
GND
B21
GND
B24
GND
B27
GND
B3
GND
B30
GND
B6
GND
B9
GND
C2
GND
C31
GND
D10
GND
D13
GND
D16
GND
D17
GND
D20
GND
D23
GND
D26
GND
D29
GND
D4
GND
D7
GND
F11
GND
F14
GND
F19
GND
F2
GND
F22
GND
F25
GND
F31
GND
F8
GND
G26
GND
G29
GND
G4
GND
G7
GND
H27
GND
H6
GND
J16
GND
J17
GND
J2
GND
J31
GND
K10
GND
K23
GND
K29
GND
K4
GND
L27
GND
L6
GND
M12
GND
M2
GND
M31
GND
N15
GND
N18
GND
N29
GND
N4
GND
P15
GND
P18
GND
P27
GND
P6
GND
R13
GND
R14
GND
R15
GND
R18
GND
R19
GND
R2
GND
R20
GND
R31
GND
T16
GND
T17
GND
T24
GND
T29
GND
T4
GND
U16
GND
U17
GND
U24
GND
U29
GND
U8
GND
V13
GND
V14
GND
V15
GND
V18
GND
V19
GND
V2
GND
V20
GND
V31
GND
W15
GND
W18
GND
W27
GND
W6
GND
Y15
GND
Y18
GND
Y29
GND
Y4
GND
AL10
GND
AM10
GND
AG13
GND
1
2
3
4
5
ASSEMBLY PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
GND GND
NVIDIA
2701 SAN TOMAS
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NV_PN
ID PAGE
<CON_PAGE_NUM> OF
NAME
<CON_TOTAL_PAGES>
DATE
5
7-MAY-2004
Page 12
HGFEDCBA
CLKOUT/
FS_IN0
REFOUT/
FS_IN1
3V3RUN
R40
R40 10K
10K
2
VDD
SS_OUT
4
SS_REF
5
3
GND
CLK_VDD
R41
R41 10K
10K
R42 22R42 22
Place close to ICS91720
12_mil
C645
C645
4.7U
4.7U
6.3V 6.3V 50V10V 0603
0603
SSFOUT
8<
OUT
3V3RUN
C619
C619 470P
470P
R575 4.7R575 4.7
3.3V
C646
C646
C629
C629
4.7U
4.7U
0.1U
0.1U
0603
0603
GND
1
U8
U8
SO8_150MIL
SO8_150MIL COMMON
RUNPWROK
10>14<15<
IN
XTALOUTBUFF
8>
IN
I2CC_SCL_R
10<11<11>
IN
I2CC_SDA_R
10<>11 <>
BI
COMMON
8
PD
1
CLKIN
7
SCLK
6
SDATA
I2C ADDRESS: 0xD4H
2
3V3RUN
R572 10R5 72 10
3
MIOAVDDQ
12_mil
C624
C624
0.1U
0.1U
10V
GND
4
U9N
U9N
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
11/14 MIOA
11/14 MIOA
M7
MIOA_VDDQ
M8
MIOA_VDDQ
R8
MIOA_VDDQ
T8
MIOA_VDDQ
U9
MIOA_VDDQ
L1
MIOACAL_PD_VDDQ
L3
MIOACAL_PU_GND
L2
MIOA_VREF
MIOAD0 MIOAD1 MIOAD2 MIOAD3 MIOAD4 MIOAD5 MIOAD6 MIOAD7 MIOAD8
MIOAD9 MIOAD10 MIOAD11
MIOA_HSYNC MIOA_VSYNC
MIOA_DE
MIOA_CTL3
MIOA_CLKOUT MIOA_CLKOUT
MIOA_CLKIN
P2 N2 N1 N3 M1 M3 P5 N6 N5 M4 L4 L5
R3 R1 P1 P3
R4 P4 M5
MIOAD0 MIOAD1 MIOAD2 MIOAD3 MIOAD4 MIOAD5 MIOAD6
MIOAD8 MIOAD9
MIOA_HSYNC
MIOACLKIN
MIOAD[11..0]
0 1 2 3 4 5 6
8 9
R566
R566 10K
10K
16>
IN
16>
OUT
1
2
3
4
GND
5
ASSEMBLY PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
5
7-MAY-2004
Page 13
HGFEDCBA
12<
13<
1
2
3
4
MIOBD[11..0]
OUT
MIOAD[11..0]
OUT
STRAP BIT
LOGIC 0
LOGIC 1
0
1
NV4x
2
3
4
5
R546 *10KR546 *10K
R537 2.2KR537 2.2K
R36 2.2KR36 2.2K
R560 2.2KR560 2.2K
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
R28 2.2KR28 2.2K
R547 2.2KR547 2.2K
R532 *10KR532 *10K
R37 *10KR37 *10K
R561 *10KR561 *10K
6
22
7
8
9
10
11
MIOBD4
12
13
13>
OUT
MIOA_HSYNC MIOA_HSYNC
20
21
R581 2.2KR581 2.2K
R43 2.2KR43 2.2K R45 *10KR45 *10K
R598 2.2KR598 2.2K
R580 *10KR580 *10K
MIOBD5
MIOBD3
R46 *10KR46 *10K
R597 *10KR597 *10K
R582 2.2KR582 2.2K
14
MIOBD10
29
R586 2.2KR586 2.2K
30
11
12
13
14
R35 *10KR35 *10K
R562 *10KR562 *10K
R538 *10KR538 *10K
R543 *10KR543 *10K
MIOAD0
MIOAD6
MIOAD8
MIOAD9
R34 *10KR34 *10K
R558 *10KR558 *10K
R531 *10KR531 *10K
R544 *10KR544 *10K
REG: NV_STRAP_0
3V3RUN
PCI_AD_SWAP
SUB_VENDOR
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3
CRYSTAL_0
CRYSTAL_1
TV_MODE_0
TV_MODE_1
AGP8x/4x
AGP_SIDEBAND
AGP_FASTWRITE
PCI_DEVID_0
PCI_DEVID_1
PCI_DEVID_2
PCI_DEVID_3
BUS_TYPE
ROM_TYPE_0
ROM_TYPE_1
REG: NV_STRAP_1
PEX_PLL_EN_TERM100
3GIO_PADCFG_LUT_ADR[0]
3GIO_PADCFG_LUT_ADR[1]
3GIO_PADCFG_LUT_ADR[2]
0: REVERSED
1: NORMAL 0: SYSTEM BIOS
1: ADAPTER BIOS
RAM_CFG[3:0]
MS_0001: 8Mx32 DDR SDRAM, DQS PER 8 BITS, Monolithic MS_0011: 8Mx32 DDR SDRAM, DQS PER 8 BITS, Stacked MS_0110: 4Mx32 DDR SDRAM, DQS PER 8 BITS, Monolithic
MS_00: 13.5MHz MS_01: 14.318MHz MS_10: 27MHz MS_11: RESERVED
MS_00: SECAM MS_01: NTSC MS_10: PAL MS_11: VGA
0: 8x 1: 4x
0: ENABLE
1: DISABLE 0: ENABLE
1: DISABLE
MS_0100: NV34M MS_0110: NV18M MS_0111: NV18MPRO MS_1010: NV31M MS_1011: NV31MPRO MS_1100: NV31GLM MS_1101: NV33M MS_1110: NV31GLMPRO
0: PCI 1: AGP
MS_00: PARALLEL MS_01: SERIAL AT25F
MS_11: RESERVED
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULTMS_10: SERIAL SST45VF
GND
MEC2-1
MEC2-1
MECH_MXM_BACKPLATE
MECH_MXM_BACKPLATE COMMON
COMMON
1
MEC2-2
MEC2-2
MECH_MXM_BACKPLATE
MECH_MXM_BACKPLATE COMMON
COMMON
2
MEC2-3
MEC2-3
MECH_MXM_BACKPLATE
MECH_MXM_BACKPLATE COMMON
COMMON
3
MEC2-4
MEC2-4
MECH_MXM_BACKPLATE
MECH_MXM_BACKPLATE COMMON
COMMON
4
MEC1-1
MEC1-1
MECH_MXM_II_HOLES
MECH_MXM_II_HOLES COMMON
COMMON
1
MEC1-2
MEC1-2
MECH_MXM_II_HOLES
MECH_MXM_II_HOLES COMMON
COMMON
2
1
2
3
4
GND
5
ASSEMBLY PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
DETAIL
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<edit here to insert page detail>
E GC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
5
7-MAY-2004
Page 14
HGFEDCBA
*** Signal Cross-Reference for the entire design ***
DACA_BLUE 8.2F> 10.3A< DACA_GREEN 8.1F> 10.3A< DACA_HSYNC 8.1F> 10.3A< DACA_RED 8.1F> 10.3A< DACA_VSYNC 8.1F> 10.3A< DACB_BLUE 8.3E> 10.3A<
1
DACB_GREEN 8.2E> 10.2A< DACB_RED 8.2E> 10.3A< DVI_A_HPD 10.2A> 11.3H< DVI_B_HPD 10.2A> 11.3H< FBACAS* 3.3D> 4.1B< 4.1D 4.1G<> 5.1B< 5.1D
FBACKE 3.3D> 4.2B< 4.2D 4.2G<> 5.2B< 5.2D
FBACLK0 3.4E> 4.2B< 4.3A 5.2B< FBACLK0* 3.4E> 4.2B< 4.3A 5.2B< FBACLK1 3.4E> 4.2A 4.2D< 5.2D< FBACLK1* 3.4E> 4.2A 4.2D< 5.2D< FBACS0* 3.3D> 4.1D 4.1G<> 4.2B< FBACS1* 3.3D> 4.1A< 4.1G<> FBAD<0> 3.1B 4.4B 5.4C FBAD<63..0> 3.1A<> 4.1G<> 4.4B 4.4B<> 5.4B<>
5.4C FBAD<1> 3.1B 4.4B 5.4C FBAD<2> 3.1B 4.4B 5.4C FBAD<3> 3.1B 4.4B 5.4C FBAD<4> 3.1B 4.4B 5.4C FBAD<5> 3.1B 4.4B 5.4C FBAD<6> 3.1B 4.4B 5.4C FBAD<7> 3.1B 4.4B 5.4C
2
FBAD<8> 3.1B 4.5B 5.5C FBAD<9> 3.1B 4.5B 5.5C FBAD<10> 3.1B 4.5B 5.5C FBAD<11> 3.1B 4.5B 5.5C FBAD<12> 3.1B 4.5B 5.5C FBAD<13> 3.1B 4.5B 5.5C FBAD<14> 3.1B 4.5B 5.5C FBAD<15> 3.1B 4.5B 5.5C FBAD<16> 3.1B 4.4C 5.4C FBAD<17> 3.1B 4.4C 5.4C FBAD<18> 3.1B 4.4C 5.4C FBAD<19> 3.1B 4.4C 5.4C FBAD<20> 3.1B 4.4C 5.4C FBAD<21> 3.2B 4.4C 5.4C FBAD<22> 3.2B 4.4C 5.4C FBAD<23> 3.2B 4.4C 5.4C FBAD<24> 3.2B 4.5C 5.5C FBAD<25> 3.2B 4.5C 5.5C FBAD<26> 3.2B 4.5C 5.5C FBAD<27> 3.2B 4.5C 5.5C FBAD<28> 3.2B 4.5C 5.5C FBAD<29> 3.2B 4.5C 5.5C FBAD<30> 3.2B 4.5C 5.5C FBAD<31> 3.2B 4.5C 5.5C FBAD<32> 3.2B 4.4D 5.4D
3
FBAD<33> 3.2B 4.4D 5.4D FBAD<34> 3.2B 4.4D 5.4D FBAD<35> 3.2B 4.4D 5.4D FBAD<36> 3.2B 4.4D 5.4D FBAD<37> 3.2B 4.4D 5.4D FBAD<38> 3.2B 4.4D 5.4D FBAD<39> 3.2B 4.4D 5.4D FBAD<40> 3.2B 4.5D 5.5D FBAD<41> 3.2B 4.5D 5.5D FBAD<42> 3.2B 4.5D 5.5D FBAD<43> 3.2B 4.5D 5.5D FBAD<44> 3.2B 4.5D 5.5D FBAD<45> 3.2B 4.5D 5.5D FBAD<46> 3.2B 4.5D 5.5D FBAD<47> 3.2B 4.5D 5.5D FBAD<48> 3.2B 4.4E 5.4E FBAD<49> 3.2B 4.4E 5.4E FBAD<50> 3.2B 4.4E 5.4E FBAD<51> 3.3B 4.4E 5.4E FBAD<52> 3.3B 4.4E 5.4E FBAD<53> 3.3B 4.4E 5.4E FBAD<54> 3.3B 4.4E 5.4E FBAD<55> 3.3B 4.4E 5.4E FBAD<56> 3.3B 4.5E 5.5E FBAD<57> 3.3B 4.5E 5.5E
4
FBAD<58> 3.3B 4.5E 5.5E FBAD<59> 3.3B 4.5E 5.5E FBAD<60> 3.3B 4.5E 5.5E FBAD<61> 3.3B 4.5E 5.5E FBAD<62> 3.3B 4.5E 5.5E FBAD<63> 3.3B 4.5E 5.5E FBADQM<0> 3.3B 4.4A< 4.4B 5.4A< 5.4C FBADQM<7..0> 3.3A> 4.1G<> FBADQM<1> 3.3B 4.4A< 4.5B 5.4A< 5.5C FBADQM<2> 3.3B 4.4A< 4.4C 5.4A< 5.4C FBADQM<3> 3.3B 4.4A< 4.5C 5.4A< 5.5C FBADQM<4> 3.3B 4.4A< 4.4D 5.4A< 5.4D FBADQM<5> 3.3B 4.4A< 4.5D 5.4A< 5.5D FBADQM<6> 3.3B 4.4A< 4.4E 5.4A< 5.4E FBADQM<7> 3.3B 4.4A< 4.5E 5.4A< 5.5E FBADQS<0> 3.3B 4.4B 4.5A<> 5.4C 5.5A<> FBADQS<7..0> 3.3A<> 4.1G<> FBADQS<1> 3.3B 4.5A<> 4.5B 5.5A<> 5.5C FBADQS<2> 3.3B 4.4C 4.5A<> 5.4C 5.5A<> FBADQS<3> 3.3B 4.5A<> 4.5C 5.5A<> 5.5C FBADQS<4> 3.3B 4.4D 4.5A<> 5.4D 5.5A<> FBADQS<5> 3.4B 4.5A<> 4.5D 5.5A<> 5.5D FBADQS<6> 3.4B 4.4E 4.5A<> 5.4E 5.5A<> FBADQS<7> 3.4B 4.5A<> 4.5E 5.5A<> 5.5E FBARAS* 3.3D> 4.1B< 4.1D 4.1G<> 5.1B< 5.1D
5
FBAWE* 3.3D> 4.1B< 4.1D 4.1G<> 5.1B< 5.1D
FBA_B0_CS1* 4.1B> 4.2B< 4.2D 4.2G<>
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEIN G PROVIDED 'AS IS'. TH E MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE M ATERIALS OR OT HERWISE, AND EXPRESSLY DISCLAI MS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME
AB D F H
FBA_B1_CS1* 4.1B> 4.2G<> 5.1D 5.2B< FBA_CMD<0> 3.3C 4.2B 5.2C FBA_CMD<26..0> 3.2E> 4.1G<> 4.2B< 4.2D< 5.2B<
5.2D< FBA_CMD<1> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<2> 3.3C 4.2B 5.2C FBA_CMD<3> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<4> 3.3C 4.2D 5.2D FBA_CMD<5> 3.3C 4.2D 5.2D FBA_CMD<6> 3.3C 4.2D 5.2D FBA_CMD<10> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<13> 3.3C 4.2D 5.2D FBA_CMD<14> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<16> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<17> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<18> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<19> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<20> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<21> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<22> 3.3C 4.2B 5.2C FBA_CMD<23> 3.3C 4.2B 4.2D 5.2C 5.2D FBA_CMD<24> 3.3C 4.2B 5.2C FBCA<0> 3.4F FBCA<11..0> 3.4E> FBCA<1> 3.4F FBCA<2> 3.4F FBCA<3> 3.4F FBCA<4> 3.4F FBCA<5> 3.4F FBCA<6> 3.4F FBCA<7> 3.4F FBCA<8> 3.4F FBCA<9> 3.4F FBCA<10> 3.4F FBCA<11> 3.4F FBCCAS* 3.3H> 6.1B< 6.1D 6.1G<> 7.1B< 7.1D
FBCCKE 3.3H> 6.2B< 6.2D 6.2G<> 7.2B< 7.2D
FBCCLK0 3.4H> 6.2A 6.2B< 7.2B< FBCCLK0* 3.4H> 6.2A 6.2B< 7.2B< FBCCLK1 3.4H> 6.2A 6.2D< 7.2D< FBCCLK1* 3.4H> 6.2A 6.2D< 7.2D< FBCCS0* 3.3H> 6.1B< 6.1D 6.1G<> FBCCS1* 3.3H> 6.1A< 6.1G<> FBCD<0> 3.1F 6.4B 7.4C FBCD<63..0> 3.1E<> 6.1G<> 6.4B<> 6.4C 7.4B<>
7.4C FBCD<1> 3.1F 6.4B 7.4C FBCD<2> 3.1F 6.4B 7.4C FBCD<3> 3.1F 6.4B 7.4C FBCD<4> 3.1F 6.4B 7.4C FBCD<5> 3.1F 6.4B 7.4C FBCD<6> 3.1F 6.4B 7.4C FBCD<7> 3.1F 6.4B 7.4C FBCD<8> 3.1F 6.5B 7.5C FBCD<9> 3.1F 6.5B 7.5C FBCD<10> 3.1F 6.5B 7.5C FBCD<11> 3.1F 6.5B 7.5C FBCD<12> 3.1F 6.4B 7.5C FBCD<13> 3.1F 6.4B 7.5C FBCD<14> 3.1F 6.4B 7.5C FBCD<15> 3.1F 6.4B 7.4C FBCD<16> 3.1F 6.4C 7.4C FBCD<17> 3.1F 6.4C 7.4C FBCD<18> 3.1F 6.4C 7.4C FBCD<19> 3.2F 6.4C 7.4C FBCD<20> 3.2F 6.4C 7.4C FBCD<21> 3.2F 6.4C 7.4C FBCD<22> 3.2F 6.4C 7.4C FBCD<23> 3.2F 6.4C 7.4C FBCD<24> 3.2F 6.5C 7.5C FBCD<25> 3.2F 6.5C 7.5C FBCD<26> 3.2F 6.5C 7.5C FBCD<27> 3.2F 6.5C 7.5C FBCD<28> 3.2F 6.4C 7.5C FBCD<29> 3.2F 6.4C 7.5C FBCD<30> 3.2F 6.4C 7.5C FBCD<31> 3.2F 6.4C 7.4C FBCD<32> 3.2F 6.4D 7.4D FBCD<33> 3.2F 6.4D 7.4D FBCD<34> 3.2F 6.4D 7.4D FBCD<35> 3.2F 6.4D 7.4D FBCD<36> 3.2F 6.4D 7.4D FBCD<37> 3.2F 6.4D 7.4D FBCD<38> 3.2F 6.4D 7.4D FBCD<39> 3.2F 6.4D 7.4D FBCD<40> 3.2F 6.5D 7.5D FBCD<41> 3.2F 6.5D 7.5D FBCD<42> 3.2F 6.5D 7.5D FBCD<43> 3.2F 6.5D 7.5D FBCD<44> 3.2F 6.4D 7.5D FBCD<45> 3.2F 6.4D 7.5D FBCD<46> 3.2F 6.4D 7.4D FBCD<47> 3.2F 6.4D 7.5D FBCD<48> 3.2F 6.4E 7.4E FBCD<49> 3.3F 6.4E 7.4E FBCD<50> 3.3F 6.4E 7.4E FBCD<51> 3.3F 6.4E 7.4E FBCD<52> 3.3F 6.4E 7.4E FBCD<53> 3.3F 6.4E 7.4E FBCD<54> 3.3F 6.4E 7.4E FBCD<55> 3.3F 6.4E 7.4E FBCD<56> 3.3F 6.5E 7.5E FBCD<57> 3.3F 6.5E 7.5E FBCD<58> 3.3F 6.5E 7.5E FBCD<59> 3.3F 6.5E 7.5E FBCD<60> 3.3F 6.4E 7.5E FBCD<61> 3.3F 6.4E 7.5E FBCD<62> 3.3F 6.4E 7.4E FBCD<63> 3.3F 6.4E 7.5E
FBCDQM<0> 3.3F 6.3A< 6.4B 7.4A< 7.4B FBCDQM<7..0> 3.3E> 6.1G<> FBCDQM<1> 3.3F 6.3A< 6.5B 7.4A< 7.5B FBCDQM<2> 3.3F 6.3A< 6.4C 7.4A< 7.4C FBCDQM<3> 3.3F 6.4A< 6.5C 7.4A< 7.5C FBCDQM<4> 3.3F 6.4A< 6.4D 7.4A< 7.4D FBCDQM<5> 3.3F 6.4A< 6.5D 7.4A< 7.5D FBCDQM<6> 3.3F 6.4A< 6.4E 7.4A< 7.4E FBCDQM<7> 3.3F 6.4A< 6.5E 7.4A< 7.5E FBCDQS<0> 3.3F 6.4A<> 6.4B 7.4B 7.5A<> FBCDQS<7..0> 3.3E<> 6.1G<> FBCDQS<1> 3.3F 6.4A<> 6.5B 7.5A<> 7.5B FBCDQS<2> 3.3F 6.4C 6.5A<> 7.4C 7.5A<> FBCDQS<3> 3.4F 6.5A<> 6.5C 7.5A<> 7.5C FBCDQS<4> 3.4F 6.4D 6.5A<> 7.4D 7.5A<> FBCDQS<5> 3.4F 6.5A<> 6.5D 7.5A<> 7.5D FBCDQS<6> 3.4F 6.4E 6.5A<> 7.4E 7.5A<> FBCDQS<7> 3.4F 6.5A<> 6.5E 7.5A<> 7.5E FBCRAS* 3.3H> 6.1B< 6.1D 6.1G<> 7.1B< 7.1D
FBCWE* 3.3H> 6.1B< 6.1D 6.1G<> 7.1B< 7.1D
FBC_B0_CS0* 6.1B> 6.1B< 6.1D 6.2G<> FBC_B1_CS0* 6.2G<> FBC_B1_CS1* 6.1B> 7.1B< 7.1D FBC_CMD<0> 3.3G 6.1C 7.2C FBC_CMD<26..0> 3.3H> 6.1B< 6.1D< 6.1G<> 7.1B<
7.1D< FBC_CMD<1> 3.3G 6.1C 6.1D 7.2C 7.2D FBC_CMD<2> 3.3G 6.1C 7.2C FBC_CMD<3> 3.3G 6.1C 6.1D 7.2C 7.2D FBC_CMD<4> 3.3G 6.1D 7.2D FBC_CMD<5> 3.3G 6.1D 7.2D FBC_CMD<6> 3.3G 6.2D 7.2D FBC_CMD<10> 3.3G 6.2C 6.2D 7.2C 7.2D FBC_CMD<13> 3.3G 6.1D 7.2D FBC_CMD<14> 3.3G 6.2C 6.2D 7.2C 7.2D FBC_CMD<16> 3.3G 6.2C 6.2D 7.2C 7.2D FBC_CMD<17> 3.3G 6.2C 6.2D 7.2C 7.2D FBC_CMD<18> 3.3G 6.2C 6.2D 7.2C 7.2D FBC_CMD<19> 3.3G 6.2C 6.2D 7.2C 7.2D FBC_CMD<20> 3.3G 6.2C 6.2D 7.2C 7.2D FBC_CMD<21> 3.3G 6.2C 6.2D 7.1C 7.1D FBC_CMD<22> 3.3G 6.2C 7.2C FBC_CMD<23> 3.3G 6.2C 6.2D 7.1C 7.1D FBC_CMD<24> 3.3G 6.1C 7.2C GPIO2_BL_PWM 10.4A< 11.3F> GPIO3_PPEN 10.3A< 11.3F> GPIO4_BLEN 10.3A< 11.3F> GPIO5_NVVDDCTL0 11.3F> 14.3A< GPIO6_NVVDDCTL1 11.3F> 14.3A< GPIO7_FBVDDCTL0 11.3F> 15.4A< I2CA_SCL_R 8.1F> 10.3A< I2CA_SDA_R 8.1F<> 10.3A<> I2CB_SCL_R 8.3G> 10.2A< I2CB_SDA_R 8.3G<> 10.2A<> I2CC_SCL_R 10.4A< 11.2A< 11.3F> 13.2A< I2CC_SDA_R 10.4A<> 11.2A<> 11.3F<> 13.2A<> IFPATXC 9.1G> 10.4G< IFPATXC* 9.1G> 10.4G< IFPATXD0 9.1G> 10.4G< IFPATXD0* 9.1G> 10.4G< IFPATXD1 9.1G> 10.4G< IFPATXD1* 9.1G> 10.4G< IFPATXD2 9.1G> 10.4G< IFPATXD2* 9.1G> 10.4G< IFPATXD3 9.1G> 10.4G< IFPATXD3* 9.1G> 10.4G< IFPBTXC 9.2G> 10.4G< IFPBTXC* 9.2G> 10.4G< IFPBTXD4 9.2G> 10.3G< IFPBTXD4* 9.2G> 10.3G< IFPBTXD5 9.2G> 10.4G< IFPBTXD5* 9.2G> 10.4G< IFPBTXD6 9.2G> 10.4G< IFPBTXD6* 9.2G> 10.4G< IFPBTXD7 9.2G> 10.4G< IFPBTXD7* 9.2G> 10.4G< IFPCTXC 9.2D 9.4G> 10.2G< IFPCTXC* 9.3D 9.4G> 10.2G< IFPCTXD0 9.3D 9.4G> 10.2G< IFPCTXD0* 9.3D 9.4G> 10.2G< IFPCTXD1 9.2E 9.4G> 10.2G< IFPCTXD1* 9.3E 9.4G> 10.2G< IFPCTXD2 9.3E 9.4G> 10.2G< IFPCTXD2* 9.3E 9.4G> 10.2G< IFPDTXC 9.2F 9.4G> 10.2G< IFPDTXC* 9.3F 9.4G> 10.2G< IFPDTXD3 9.3F 9.5G> 10.3G< IFPDTXD3* 9.3F 9.5G> 10.3G< IFPDTXD4 9.2G 9.5G> 10.3G< IFPDTXD4* 9.3G 9.5G> 10.2G< IFPDTXD5 9.3G 9.5G> 10.2G< IFPDTXD5* 9.3G 9.5G> 10.2G< MIOAD<0> 13.3D 16.4C MIOAD<11..0> 13.3E< 16.1A> MIOAD<1> 13.3D 16.1C MIOAD<2> 13.3D 16.1C MIOAD<3> 13.3D 16.2C MIOAD<4> 13.3D 16.2C MIOAD<5> 13.3D 16.2C MIOAD<6> 13.3D 16.4C MIOAD<8> 13.3D 16.4C MIOAD<9> 13.3D 16.4C MIOA_HSYNC 13.4E> 16.3A> 16.3C MIOBD<11..0> 12.1E< 16.1A> MIOBD<3> 12.1C 16.3C MIOBD<4> 12.1C 16.3C MIOBD<5> 12.1C 16.3C MIOBD<10> 12.1C 16.3C MIOBD<11> 12.1C 16.4C
MXM_RSVD1 10.4A< 11.3F> MXM_RSVD2 10.4A< 11.3F> MXM_RSVD3 10.4A< 11.3F> NTP_JTAG_TCLK_C 10.3G> 11.3A< NTP_JTAG_TDI_C 10.3G> 11.3A< NTP_JTAG_TDO_C 10.3G< 11.3A> NTP_JTAG_TMS_C 10.3G> 11.3A< NTP_JTAG_TRST_C 10.3G> 11.3A< NVPWROK 14.2A> 15.2B< NVVDD_SENSE 2.3H> 14.4D< RUNPWROK 10.4A> 13.1A< 14.2A< 15.1A< 15.1A<
SMB_CLK 10.4A<> 11.2A< SMB_DAT 10.4A< 11.2A<> SSFOUT 8.4B< 13.1D> THERM_ALERT* 10.4A< 11.3F> XTALOUTBUFF 8.4E> 13.1A<
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
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E GC
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DATE
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3
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Page 15
HGFEDCBA
*** Part Cross-Reference for the entire design ***
C1 C 15 C2 C 6 C3 C 6 C4 C 6 C5 C 6 C6 C 6
1
C7 C 6 C8 C 6 C9 C 6 C10 C 6 C11 C 6 C12 C 6 C13 C 6 C14 C 6 C15 C 6 C16 C 15 C17 C_POL 14 C18 C_POL 14 C19 C_POL 14 C20 C 6 C21 C 6 C22 C 6 C23 C 6 C24 C 6 C25 C 6 C26 C 6 C27 C 6 C28 C 6 C29 C 6 C30 C 15
2
C31 C 6 C32 C 6 C33 C 15 C34 C 6 C35 C 6 C36 C 6 C37 C 6 C38 C 14 C39 C 14 C40 C 14 C41 C 6 C42 C 6 C43 C_POL 14 C44 C 6 C45 C 6 C46 C 14 C47 C 6 C48 C 6 C49 C 6 C50 C 6 C51 C 6 C52 C 14 C53 C 6 C54 C 14 C55 C 6
3
C56 C 6 C57 C 6 C58 C 6 C59 C 6 C60 C 6 C61 C 6 C62 C 6 C63 C 6 C64 C 6 C65 C 14 C66 C 4 C67 C 14 C68 C 4 C69 C 4 C70 C 4 C71 C 4 C72 C 4 C73 C 4 C74 C 12 C75 C 4 C76 C 4 C77 C 4 C78 C 4 C79 C 4 C80 C 4
4
C81 C 4 C82 C 4 C83 C 11 C84 C 4 C85 C 4 C86 C 11 C87 C 4 C88 C 4 C89 C 4 C90 C 4 C91 C 4 C92 C 4 C93 C 4 C94 C 4 C95 C 4 C96 C 4 C97 C 4 C98 C 4 C99 C 4 C100 C 4 C101 C 4 C102 C 4 C103 C 8 C104 C 4 C105 C 9
5
C106 C 4 C107 C 4 C108 C 4 C109 C 8
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEIN G PROVIDED 'AS IS'. TH E MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE M ATERIALS OR OT HERWISE, AND EXPRESSLY DISCLAI MS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME
AB D F H
C110 C 12 C111 C 9 C112 C 4 C113 C 4 C114 C 4 C115 C 9 C116 C 4 C117 C 4 C118 C 4 C119 C 9 C120 C 4 C121 C 4 C122 C 4 C123 C 4 C124 C 4 C125 C 4 C126 C 15 C127 C 4 C128 C 9 C129 C 9 C130 C 15 C131 C_POLZ 15 C132 C 15 C133 C_POLZ 15 C134 C 15 C135 C 15 C136 C 15 C137 C_POLZ 15 C138 C 2 C139 C 15 C140 C 15 C141 C 2 C142 C_POLZ 15 C143 C 2 C144 C 2 C501 C 14 C502 C 7 C503 C 7 C504 C 7 C505 C 7 C506 C 7 C507 C 7 C508 C 7 C509 C 7 C510 C 7 C511 C 7 C512 C 7 C513 C 7 C514 C 7 C515 C 7 C516 C 7 C517 C 7 C518 C 7 C519 C 7 C520 C 7 C521 C 7 C522 C 7 C523 C 7 C524 C 7 C525 C 7 C526 C 7 C527 C 7 C528 C 7 C529 C 7 C530 C 7 C531 C 7 C532 C 14 C533 C 14 C534 C 14 C535 C 7 C536 C 7 C537 C 7 C538 C 7 C539 C 7 C540 C 7 C541 C 14 C542 C 7 C543 C 7 C544 C 7 C545 C 7 C546 C 7 C547 C 7 C548 C 7 C549 C 7 C550 C 14 C551 C 14 C552 C 3 C553 C 2 C554 C 3 C555 C 9 C556 C 5 C557 C 3 C558 C 3 C559 C 3 C560 C 3 C561 C 5 C562 C 5 C563 C 5 C564 C 5 C565 C 5 C566 C 5 C567 C 3 C568 C 3 C569 C 3 C570 C 3 C571 C 3 C572 C 3 C573 C 5 C574 C 5 C575 C 5 C576 C 5
C577 C 5 C578 C 5 C579 C 3 C580 C 3 C581 C 3 C582 C 3 C583 C 3 C584 C 3 C585 C 3 C586 C 3 C587 C 3 C588 C 3 C589 C 3 C590 C 3 C591 C 3 C592 C 3 C593 C 5 C594 C 2 C595 C 3 C596 C 3 C597 C 3 C598 C 3 C599 C 3 C600 C 3 C601 C 3 C602 C 3 C603 C 3 C604 C 5 C605 C 3 C606 C 3 C607 C 3 C608 C 2 C609 C 2 C610 C 5 C611 C 2 C612 C 2 C613 C 2 C614 C 2 C615 C 5 C616 C 3 C617 C 8 C618 C 9 C619 C 13 C620 C 3 C621 C 8 C622 C 3 C623 C 3 C624 C 13 C625 C 2 C626 C 2 C627 C 2 C628 C 2 C629 C 13 C630 C 2 C631 C 8 C632 C 3 C633 C 5 C634 C 5 C635 C 5 C636 C 5 C637 C 5 C638 C 3 C639 C 2 C640 C 2 C641 C 2 C642 C 2 C643 C 2 C644 C 8 C645 C 13 C646 C 13 C647 C 8 C648 C 8 C649 C 2 C650 C 8 C651 C 3 C652 C 3 C653 C 5 C654 C 5 C655 C 5 C656 C 5 C657 C 5 C658 C 3 C659 C 9 C660 C 2 C661 C 2 C662 C 2 C663 C 2 C664 C 9 C665 C 2 C666 C 2 C667 C 3 C668 C 3 C669 C 3 C670 C 3 C671 C 9 C672 C 9 C673 C 8 C674 C 2 C675 C 2 C676 C 9 C677 C 3 C678 C 3 C679 C 2 C680 C 2 C681 C 5 C682 C 9 C683 C 2 C684 C 12 C685 C 7 C686 C 2 C687 C 2
C688 C 2 C689 C 2 C690 C 2 C691 C 2 C692 C 8 C693 C 9 C694 C 2 C695 C 3 C696 C 9 C697 C 8 C698 C 8 C699 C 5 C700 C 2 C701 C 2 C702 C 2 C703 C 2 C704 C 2 C705 C 2 C706 C 2 C707 C 2 C708 C 2 C709 C 2 C710 C 2 C711 C 9 C712 C 9 C713 C 9 C714 C 2 C715 C 2 C716 C 9 C717 C 9 C718 C 2 C719 C 9 C720 C 9 C721 C 9 C722 C 2 C723 C 8 C724 C 5 C725 C 5 C726 C 5 C727 C 9 C728 C 5 C729 C 5 C730 C 5 C731 C 5 C732 C 5 C733 C 5 C734 C 5 C735 C 5 C736 C 5 C737 C 5 C738 C 5 C739 C 15 C740 C 15 C741 C 15 C742 C 2 C743 C 15 C744 C 2 C745 C 2 C746 C 2 C747 C 2 C748 C 2 C749 C 2 C750 C 2 C751 C 2 C752 C 2 C753 C 2 C754 C 2 C755 C 2 C756 C 2 C757 C 2 C758 C 2 C759 C 2 C760 C 2 C761 C 2 C762 C 2 C763 C 2 C764 C 2 C765 C 2 C766 C 2 C767 C 2 C768 C 2 C769 C 2 C770 C 2 C771 C 2 C772 C 2 C773 C 2 C774 C 2 C775 C 2 C776 C 2 C777 C 2 C778 C 15 CN1 CON_MXM_PCI_EXPRESS 2 10 D501 D_SCHOTTKY 14 D502 D_SCHOTTKY 14 D503 D_SCHOTTKY 15 D504 D_SCHOTTKY 15 D505 D_3PIN_AC 11 D506 D_3PIN_AC 11 L1 L 14 L2 L 15 LB501 L 3 LB502 L 3 LB503 L 3 LB504 L 3 LB505 L 8 LB506 L 8 LB507 L 9 LB508 L 9 LB509 L 2 LB510 L 2 LB511 L 2
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
LB512 L 8 LB513 L 9 LB514 L 9 LB515 L 9 LB516 L 9 MEC1 MOUNTING_HOLE 16 MEC2 MOUNTING_HOLE 16 Q1 Q_FET_N_ENH 14 Q501 Q_FET_N_ENH 14 Q502 Q_FET_N_ENH 14 Q503 Q_FET_N_ENH 14 Q504 Q_FET_N_ENH 15 Q505 Q_FET_N_ENH 15 Q506 Q_FET_N_ENH 15 R1 R 6 R2 R 6 R3 R 6 R4 R 6 R5 R 14 R6 R 6 R7 R 14 R8 R 14 R9 R 14 R10 R 14 R11 R 14 R12 R 14 R13 R 14 R14 R 14 R15 R 14 R16 R 15 R17 R 4 R18 R 14 R19 R 14 R20 R 14 R21 R 15 R22 R 11 R23 R 4 R24 R 11 R25 R 4 R26 R 11 R27 R 11 R28 R 16 R29 R 11 R30 R 11 R31 R 11 R32 R 11 R33 R 11 R34 R 16 R35 R 16 R36 R 16 R37 R 16 R38 R 8 R39 R 8 R40 R 13 R41 R 13 R42 R 13 R43 R 16 R44 R 4 R45 R 16 R46 R 16 R47 R 4 R48 R 9 R49 R 9 R50 R 9 R51 R 9 R52 R 9 R53 R 12 R54 R 9 R55 R 9 R56 R 9 R57 R 4 R58 R 4 R59 R 9 R60 R 4 R61 R 9 R62 R 4 R63 R 4 R64 R 9 R65 R 9 R66 R 15 R67 R 15 R68 R 9 R69 R 9 R70 R 9 R71 R 9 R72 R 15 R73 R 15 R74 R 15 R75 R 15 R76 R 15 R77 R 15 R78 R 15 R79 R 15 R80 R 15 R81 R 15 R501 R 6 R502 R 7 R503 R 7 R504 R 7 R505 R 7 R506 R 6 R507 R 6 R508 R 6 R509 R 6 R510 R 6 R511 R 6 R512 R 6 R513 R 6 R514 R 6 R515 R 6 R516 R 6
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NVIDIA CORPORATION
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NV_PN
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R517 R 14 R518 R 14 R519 R 14 R520 R 14 R521 R 14 R522 R 14 R523 R 14 R524 R 4
1
R525 R 4 R526 R 4 R527 R 4 R528 R 14 R529 R 3 R530 R 3 R531 R 16 R532 R 16 R533 R 12 R534 R 11 R535 R 12 R536 R 12 R537 R 16 R538 R 16 R539 R 8 R540 R 8 R541 R 3 R542 R 11 R543 R 16 R544 R 16 R545 R 11 R546 R 16 R547 R 16 R548 R 8
2
R549 R 8 R550 R 8 R551 R 8 R552 R 11 R553 R 3 R554 R 3 R555 R 12 R556 R 8 R557 R 8 R558 R 16 R559 R 11 R560 R 16 R561 R 16 R562 R 16 R563 R 3 R564 R 5 R565 R 3 R566 R 13 R567 R 11 R568 R 5 R569 R 12 R570 R 8 R571 R 8 R572 R 13 R573 R 4
3
R574 R 4 R575 R 13 R576 R 4 R577 R 8 R578 R 8 R579 R 8 R580 R 16 R581 R 16 R582 R 16 R583 R 12 R584 R 8 R585 R 8 R586 R 16 R587 R 9 R588 R 5 R589 R 8 R590 R 8 R591 R 8 R592 R 8 R593 R 16 R594 R 5 R595 R 11 R596 R 9 R597 R 16 R598 R 16
4
R599 R 11 R600 R 2 R601 R 11 R602 R 12 R603 R 11 R604 R 15 R605 R 15 R606 R 15 R607 R 15 R608 R 15 R609 R 11 R610 R 15 R611 R 11 R612 R 11 R613 R 11 R614 R 11 R615 R 11 R616 R 11 R617 R 11 R618 R 11 R619 R 11 R620 R 11 R621 R 11 U1 U_VTTREG_LIN 15 U2 U_MEM_SD_DDR_X32 6
5
U3 U_MEM_SD_DDR_X32 6 U4 U_XOR_2IN 14 U5 U_MEM_EE_CRYPT_8X128 12 U6 U_TEMP_AD1032 11
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEIN G PROVIDED 'AS IS'. TH E MATERIALS MAY CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE M ATERIALS OR OT HERWISE, AND EXPRESSLY DISCLAI MS ALL IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME
AB D F H
U7 U_MEM_SD_DDR_X32 4 U8 U_CLK_SS_ICS91720 13 U9 U_GPU_G3 2 3 8 9 11 12 13 U10 U_MEM_SD_DDR_X32 4 U11 U_MEM_FL_SER_128KX8 12 U12 U_VREG_5PIN 15 U13 U_VREG_5PINS 15 U501 U_MEM_SD_DDR_X32 7 U502 U_MEM_SD_DDR_X32 7 U503 U_SWREG_MAX199X 14 U504 U_MEM_SD_DDR_X32 5 U505 U_MEM_SD_DDR_X32 5 U506 U_SWREG_MAX199X 15 Y1 XTAL_4PIN 8
ASSEMBLY PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
NVIDIA CORPORATION
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600-10264-xxxx-vvv
NV_PN
ID PAGE
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7-MAY-2004
Page 17
U9A
U9A
BGA820_P10_33X33MM
BGA820_P10_33X33MM COMMON
COMMON
1/14 PCI_EXPRESS
1/14 PCI_EXPRESS
CN1A
3V3RUN
C144
C144
C141
1
1V8RUN
PWR_SRC
C141
0.1U
0.1U
10V 10V
C143
C143
0.1U
0.1U
10V
GND
C760
C760
0.1U
0.1U
25V 25V 0603
0603
0.1U
0.1U
GND
C761
C761
0.1U
0.1U
0603
0603
2
GND
5VRUN
C742
C742
0.1U
0.1U
10V
3
GND
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
CN1A
NONPHY-X16
NONPHY-X16 CON_MXM_230_FINGER_P0_5MM
CON_MXM_230_FINGER_P0_5MM COMMON
COMMON
1/2 PCI-Express, Power
1/2 PCI-Express, Power
238
3V3RUN
2
1V8RUN
1
PWR_SRC
234
2V5RUN
18
5VRUN
17
GND
20
GND
41
GND
44
GND
47
GND
50
GND
53
GND
56
GND
59
GND
62
GND
65
GND
68
GND
71
GND
74
GND
77
GND
80
GND
83
GND
86
GND
89
GND
92
GND
95
GND
98
GND
101
GND
104
GND
107
GND
110
GND
113
GND
116
GND
119
GND
122
GND
125
GND
128
GND
131
GND
138
GND
142
GND
146
GND
150
GND
154
GND
158
GND
163
GND
164
GND
170
GND
175
GND
176
GND
181
GND
182
GND
187
GND
188
GND
194
GND
199
GND
200
GND
205
GND
206
GND
211
GND
212
GND
218
GND
223
GND
229
GND
235
GND
236
GND
241
GND
CLK_REQ
PEX_RST
PEX_REFCLK PEX_REFCLK
PEX_RX0 PEX_RX0
PEX_TX0 PEX_TX0
PEX_RX1 PEX_RX1
PEX_TX1 PEX_TX1
PEX_RX2 PEX_RX2
PEX_TX2 PEX_TX2
PEX_RX3 PEX_RX3
PEX_TX3 PEX_TX3
PEX_RX4 PEX_RX4
PEX_TX4 PEX_TX4
PEX_RX5 PEX_RX5
PEX_TX5 PEX_TX5
PEX_RX6 PEX_RX6
PEX_TX6 PEX_TX6
PEX_RX7 PEX_RX7
PEX_TX7 PEX_TX7
PEX_RX8 PEX_RX8
PEX_TX8 PEX_TX8
PEX_RX9 PEX_RX9
PEX_TX9 PEX_TX9
PEX_RX10 PEX_RX10
PEX_TX10 PEX_TX10
PEX_RX11 PEX_RX11
PEX_TX11 PEX_TX11
PEX_RX12 PEX_RX12
PEX_TX12 PEX_RX12
PEX_RX13 PEX_RX13
PEX_TX13 PEX_TX13
PEX_RX14 PEX_RX14
PEX_TX14 PEX_TX14
PEX_RX15 PEX_RX15
PEX_TX15 PEX_TX15
PRSNT1 PRSNT2
137
139
135 133
129 127
132 130
123 121
126 124
117 115
120 118
111 109
114 112
105 103
108 106
99 97
102 100
93 91
96 94
87 85
90 88
81 79
84 82
75 73
78 76
69 67
72 70
63 61
66 64
57 55
60 58
51 49
54 52
45 43
48 46
39 37
42 40
134 38
GND GND
GND
NET_NAME
PEX_TX0_C PEX_TX0_C*
PEX_TX1_C PEX_TX1_C*
PEX_TX2_C PEX_TX2_C*
PEX_TX3_C PEX_TX3_C*
PEX_TX4_C PEX_TX4_C*
PEX_TX5_C PEX_TX5_C*
PEX_TX6_C PEX_TX6_C*
PEX_TX7_C PEX_TX7_C*
PEX_TX8_C PEX_TX8_C*
PEX_TX9_C PEX_TX9_C*
PEX_TX10_C PEX_TX10_C*
PEX_TX11_C PEX_TX11_C*
PEX_TX12_C PEX_TX12_C*
PEX_TX13_C PEX_TX13_C*
PEX_TX14_C PEX_TX14_C*
PEX_TX15_C PEX_TX15_C*
DIFF_PAIR
PEX_TX0_C PEX_TX0_C
PEX_TX1_C PEX_TX1_C
PEX_TX2_C PEX_TX2_C
PEX_TX3_C PEX_TX3_C
PEX_TX4_C PEX_TX4_C
PEX_TX5_C PEX_TX5_C
PEX_TX6_C PEX_TX6_C
PEX_TX7_C PEX_TX7_C
PEX_TX8_C PEX_TX8_C
PEX_TX9_C PEX_TX9_C
PEX_TX10_C PEX_TX10_C
PEX_TX11_C PEX_TX11_C
PEX_TX12_C PEX_TX12_C
PEX_TX13_C PEX_TX13_C
PEX_TX14_C PEX_TX14_C
PEX_TX15_C PEX_TX15_C
C759 0.1UC759 0.1U
C777 0.1UC777 0.1U
C757 0.1UC757 0.1U
C775 0.1UC775 0.1U
C755 0.1UC755 0.1U
C773 0.1UC773 0.1U
C753 0.1UC753 0.1U
C771 0.1UC771 0.1U
C751 0.1UC751 0.1U
C769 0.1UC769 0.1U
C749 0.1UC749 0.1U
C767 0.1UC767 0.1U
C747 0.1UC747 0.1U
C765 0.1UC765 0.1U
C745 0.1UC745 0.1U
C763 0.1UC763 0.1U
PEX_RST
NET_SPACING
R600
R600
200
200
1%
1%
/10V
/10V
/10V
/10V
/10V
/10V
/10V
/10V
/10V
/10V
/10V
/10V
/10V
/10V
/10V
/10V
/10V
C758 0.1UC758 0.1U
TMDS/PCIE/CLK PEX_TX020MIL
/10V
C776 0.1UC776 0.1U
TMDS/PCIE/CLK
TMDS/PCIE/CLK PEX_RX120MIL
TMDS/PCIE/CLK 20MIL PEX_TX2
/10V
C756 0.1UC756 0.1U
TMDS/PCIE/CLK PEX_RX220MIL
/10V
C774 0.1UC774 0.1U
TMDS/PCIE/CLK 20MIL
TMDS/PCIE/CLK
/10V
C754 0.1UC754 0.1U
TMDS/PCIE/CLK
/10V
C772 0.1UC772 0.1U
TMDS/PCIE/CLK
/10V
C752 0.1UC752 0.1U
TMDS/PCIE/CLK
TMDS/PCIE/CLK
/10V
C770 0.1UC770 0.1U
/10V
C750 0.1UC750 0.1U
/10V
C768 0.1UC768 0.1U
TMDS/PCIE/CLK 20MIL PEX_TX10
/10V
C748 0.1UC748 0.1U
TMDS/PCIE/CLK
TMDS/PCIE/CLK
/10V
C766 0.1UC766 0.1U
TMDS/PCIE/CLK 20MIL PEX_TX11
TMDS/PCIE/CLK
/10V
C746 0.1UC746 0.1U
TMDS/PCIE/CLK
TMDS/PCIE/CLK 20MIL PEX_RX12 TMDS/PCIE/CLK 20MIL PEX_RX12
TMDS/PCIE/CLK
/10V
C764 0.1UC764 0.1U
TMDS/PCIE/CLK
TMDS/PCIE/CLK 20MIL PEX_RX13 TMDS/PCIE/CLK 20MIL PEX_RX13
/10V
C744 0.1UC744 0.1U
TMDS/PCIE/CLK 20MIL PEX_RX14 TMDS/PCIE/CLK 20MIL PEX_RX14
/10V
C762 0.1UC762 0.1U
TMDS/PCIE/CLK
ASSEMBLY PAGE
DETAIL
DIFF_PAIR
PEX_TCLKTMDS/PCIE/CLK 20MIL PEX_TCLKTMDS/PCIE/CLK 20MIL
20MILTMDS/PCIE/CLK PEX_RCLK 20MILTMDS/PCIE/CLK PEX_RCLK
20MILTMDS/PCIE/CLK PEX_TX0
20MIL PEX_RX0TMDS/PCIE/CLK 20MIL PEX_RX0TMDS/PCIE/CLK
PEX_TX120MILTMDS/PCIE/CLK PEX_TX1
20MIL
PEX_RX1TMDS/PCIE/CLK 20MIL
PEX_TX2TMDS/PCIE/CLK 20MIL
20MILTMDS/PCIE/CLK PEX_RX2
PEX_TX3TMDS/PCIE/CLK 20MIL PEX_TX3
20MIL PEX_RX3TMDS/PCIE/CLK
PEX_RX320MILTMDS/PCIE/CLK
PEX_TX4
20MIL 20MIL PEX_TX4
20MILTMDS/PCIE/CLK PEX_RX4 20MIL PEX_RX4TMDS/PCIE/CLK
PEX_TX520MILTMDS/PCIE/CLK PEX_TX5TMDS/PCIE/CLK 20MIL
20MILTMDS/PCIE/CLK PEX_RX5 20MIL PEX_RX5TMDS/PCIE/CLK
PEX_TX620MIL PEX_TX620MIL
20MILTMDS/PCIE/CLK PEX_RX6 20MILTMDS/PCIE/CLK PEX_RX6
PEX_TX7
20MIL
PEX_TX7TMDS/PCIE/CLK 20MIL
20MIL PEX_RX7TMDS/PCIE/CLK 20MILTMDS/PCIE/CLK PEX_RX7
PEX_TX820MILTMDS/PCIE/CLK
20MIL
PEX_TX8TMDS/PCIE/CLK
20MILTMDS/PCIE/CLK PEX_RX8 20MILTMDS/PCIE/CLK PEX_RX8
PEX_TX9TMDS/PCIE/CLK 20MIL PEX_TX9TMDS/PCIE/CLK 20MIL
20MILTMDS/PCIE/CLK PEX_RX9 20MILTMDS/PCIE/CLK PEX_RX9
20MIL
PEX_TX10
20MILTMDS/PCIE/CLK PEX_RX10 20MILTMDS/PCIE/CLK PEX_RX10
20MIL PEX_TX11
20MILTMDS/PCIE/CLK PEX_RX11 20MILTMDS/PCIE/CLK PEX_RX11
20MIL PEX_TX12 20MIL
PEX_TX12
PEX_TX1320MIL PEX_TX1320MIL
PEX_TX1420MILTMDS/PCIE/CLK PEX_TX1420MILTMDS/PCIE/CLK
PEX_TX15TMDS/PCIE/CLK 20MIL PEX_TX15
20MIL
20MILTMDS/PCIE/CLK PEX_RX15 20MILTMDS/PCIE/CLK PEX_RX15
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
NET_NAMENET_PHYSICAL
PEX_TSTCLK PEX_TSTCLK*
REFCLK REFCLK*
PEX_TX0 PEX_TX0*
PEX_RX0 PEX_RX0*
PEX_TX1 PEX_TX1*
PEX_RX1 PEX_RX1*
PEX_TX2 PEX_TX2*
PEX_RX2 PEX_RX2*
PEX_TX3 PEX_TX3*
PEX_RX3 PEX_RX3*
PEX_TX4 PEX_TX4*
PEX_RX4 PEX_RX4*
PEX_TX5 PEX_TX5*
PEX_RX5 PEX_RX5*
PEX_TX6 PEX_TX6*
PEX_RX6 PEX_RX6*
PEX_TX7 PEX_TX7*
PEX_RX7 PEX_RX7*
PEX_TX8 PEX_TX8*
PEX_RX8 PEX_RX8*
PEX_TX9 PEX_TX9*
PEX_RX9 PEX_RX9*
PEX_TX10 PEX_TX10*
PEX_RX10 PEX_RX10*
PEX_TX11 PEX_TX11*
PEX_RX11 PEX_RX11*
PEX_TX12 PEX_TX12*
PEX_RX12 PEX_RX12*
PEX_TX13 PEX_TX13*
PEX_RX13 PEX_RX13*
PEX_TX14 PEX_TX14*
PEX_RX14 PEX_RX14*
PEX_TX15 PEX_TX15*
PEX_RX15 PEX_RX15*
AH15
AG12 AH13
AM12 AM11
AH14
AJ14
AJ15
AK15
AK13 AK14
AH16 AG16
AM14 AM15
AG17 AH17
AL15 AL16
AG18 AH18
AK16 AK17
AK18
AJ18
AL17 AL18
AJ19
AH19
AM18 AM19
AG20 AH20
AK19 AK20
AG21 AH21
AL20 AL21
AK21
AJ21
AM21 AM22
AJ22
AH22
AK22 AK23
AG23 AH23
AL23 AL24
AK24
AJ24
AM24 AM25
AJ25
AH25
AK25 AK26
AH26 AG26
AL26 AL27
AK27
AJ27
AM27 AM28
AJ28 AH27
AL28 AL29
PEX_RST
RFU RFU
PEX_TSTCLK_OUT PEX_TSTCLK_OUT
PEX_REFCLK PEX_REFCLK
PEX_TX0 PEX_TX0
PEX_RX0 PEX_RX0
PEX_TX1 PEX_TX1
PEX_RX1 PEX_RX1
PEX_TX2 PEX_TX2
PEX_RX2 PEX_RX2
PEX_TX3 PEX_TX3
PEX_RX3 PEX_RX3
PEX_TX4 PEX_TX4
PEX_RX4 PEX_RX4
PEX_TX5 PEX_TX5
PEX_RX5 PEX_RX5
PEX_TX6 PEX_TX6
PEX_RX6 PEX_RX6
PEX_TX7 PEX_TX7
PEX_RX7 PEX_RX7
PEX_TX8 PEX_TX8
PEX_RX8 PEX_RX8
PEX_TX9 PEX_TX9
PEX_RX9 PEX_RX9
PEX_TX10 PEX_TX10
PEX_RX10 PEX_RX10
PEX_TX11 PEX_TX11
PEX_RX11 PEX_RX11
PEX_TX12 PEX_TX12
PEX_RX12 PEX_RX12
PEX_TX13 PEX_TX13
PEX_RX13 PEX_RX13
PEX_TX14 PEX_TX14
PEX_RX14 PEX_RX14
PEX_TX15 PEX_TX15
PEX_RX15 PEX_RX15
E GC
PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD
PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD_LP VDD_LP VDD_LP VDD_LP VDD_LP VDD_LP
VDD_SENSE GND_SENSE
VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33
PEX_PLLAVDD PEX_PLLDVDD
PEX_PLLGND
NC NC NC NC
PEX_IOVDD
AD23 AF23 AF24 AF25 AG24 AG25
AC16 AC17 AC21 AC22 AE18 AE21 AE22 AF12 AF18 AF21 AF22
K16 K17 N13 N14 N16 N17 N19 P13 P14 P16 P17 P19 R16 R17 T13 T14 T15 T18 T19 U13
U14 U15 U18 U19 V16 V17 W13 W14 W16 W17 W19 Y13 Y14 Y16 Y17 Y19 Y20
P20 T20 T23 U20 U23 W20
N20 M21
AC11 AC12 AC24 AD24 AE11 AE12 H7 J7 K7 L10 L7 L8 M10
AF15 AE15 AE16
12_mil
C700
C700
C701
C701
0.022U
0.022U
0.022U
0.022U
C674
C674
0.022U
0.022U
16V 16V 10V 6.3V
C703
C703
C702
C702
0.022U
0.022U
0.022U
0.022U
16V 16V 16V 16V 10V
NVVDD
C627
C627
C630
C630
0.022U
0.022U
2200P
2200P
C642
C642
C626
C626
0.022U
0.022U
2200P
2200P
16V 10V10V50V
C663
C663
C660
C660
2200P
2200P
0.022U
0.022U
16V 10V10V50V
C628
C628
C614
C614
0.022U
0.022U
2200P
2200P
16V 10V10V50V 6.3V
C649
C649 2200P
2200P
C594
C594 4700P
4700P
C688
C688 4700P
4700P
GND
C714
C714 4700P
4700P
PEX_PLLAVDD
12_mil
C706
C706 470P
470P
GND
50V
12_mil
C710
C710 470P
470P
50V
PEX_PLLDVDD
AM8 AM9 B32 J6
GND
C708
C708
C709
C709
0.022U
0.022U
C718
C718
0.1U
0.1U
4.7U
4.7U
10V16V 16V 16V
6.3V 0603
0603
GND
C687
C687
C689
C683
C683
0.022U
0.022U
C704
C704
0.022U
0.022U
C612
C612
0.1U
0.1U
C641
C641
0.1U
0.1U
C611
C611
0.1U
0.1U
C680
C680
0.1U
0.1U
C662
C662
0.022U
0.022U
16V 10V10V50V 6.3V
C715
C715
0.1U
0.1U
C608
C608
0.1U
0.1U
10V25V
C686
C686
0.1U
0.1U
10V25V
C705
C705 4700P
4700P
GND
C707
C707 4700P
4700P
GND
C689
0.1U
0.1U
4.7U
4.7U
0603
0603
C722
C722
C679
C679
0.022U
0.022U
0.1U
0.1U
C613
C613
0.1U
0.1U
10V10V16V50V
C661
C661
0.1U
0.1U
C625
C625
0.1U
0.1U
C665
C665
0.1U
0.1U
C666
C666
C675
C675
0.1U
0.1U
0.1U
0.1U
C138
C138
0.1U
0.1U
GND
GND
LB509
LB509
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C690
C690
4.7U
4.7U
6.3V25V 0603
0603
GND
LB510
LB510
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C691
C691
4.7U
4.7U
6.3V25V 0603
0603
GND
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
NV_PN
ID PAGE NAME
LB511
LB511
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
GND
GND
C609
C609
<<place on bottom
4.7U
4.7U
north of GPU
6.3V 0603
0603
GND
C553
C553
4.7U
4.7U
<<place on bottom
6.3V
east of GPU
0603
0603
GND
C640
C640
4.7U
4.7U
<<place on bottom
6.3V
south of GPU
0603
0603
GND
C643
C643
4.7U
4.7U
<<place on bottom
west of GPU
0603
0603
GND
C639
C639
4.7U
4.7U
0603
0603
GND
3V3RUN
C694
C694 1U
1U
10V10V10V25V 0603
0603
GND
PEX1V2
600-10264-xxxx-vvv
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
NVVDD_SENSE
PEX1V2
HGFEDCBA
PEX1V2
DATE
OUT
1
2
3
14<
4
5
7-MAY-2004
Page 18
HGFEDCBA
5VRUN
5VRUN
3V3RUN
3V3RUN
FBVDD
FBVDD
FBVDDQ
FBVDDQ
NVVDD
NVVDD
PWR_SRC
PWR_SRC
C541
C541 470P
470P
10%
10% 50
50
C551
C551 470P
470P
10%
10% 50
50
NV_VCCA
22
3
24
1 2
4 23 21 13
6
5
7
8
U503
U503
AL001993013
AL001993013
MLFP24_4X4MM
MLFP24_4X4MM
VR_SW=0.7V...2.0V
VR_SW=0.7V...2.0V
COMMON
COMMON
VCCA
LSAT OVP/UVP TON FBLANK
PGOOD SHDN GATE SKIP
REF
ILIM
REFIN
OD
R51720R517 20
1
C534
C534 1U
1U
10
10 10%
10%
GND
R5190R519
NV_REF
NV_ILILM
RTnv
NV_REFIN
RBnv
0
R528
R528
4.64K
4.64K
1%
1%
GND
BAM63010018
BAM63010018
FDG6301N
FDG6301N
SOT23_6_DBV
SOT23_6_DBV
R5180R518 0
NV_VP_STRAP NV_TON_STRAP NV_FBLANK_STRAP
10MIL
10MIL
R523
R523
2.43K
2.43K
1%
1%
NV_GATE NV_SKIP
GND
GND
R5200R520
R12
R12
0
*10K
*10K
10MIL
1G1D1S
1G1D1S
C550
C550
0.1U
0.1U
10%
10% 10
10
NVCTL0_R
G
3
GND
R522
R522 10K
10K
R521
R521 10K
10K
GND
R11
R11
12.1K
12.1K
1%
1%
4
D
Q1B
Q1B
COMMON
COMMON
S
2
25V
25V
0.22A
0.22A 5R
5R
0.5A
0.5A
0.7W@125C
0.7W@125C 8V
8V
GND
RUNPWROK
10>13<14<
IN
2
C533
C533
0.1U
0.1U
10%
10% 10
10
3V3RUN
GND
3V3RUN
5VRUN
R9*0R9
53
OR1
1
2
4
U4
U4 NC7SZ86P5X
NC7SZ86P5X
SC70-5
SC70-5
AL07SZ86013
AL07SZ86013 Exclusive-OR Gate
Exclusive-OR Gate
*0
GND GND
GND
R18
C67
0.1U
0.1U
10%
10% 10
10
GND
GPIO5_NVVDDCTL0
R15
R15 10K
10K
R18 10K
10K
GPIO6_NVVDDCTL1
RB1nv RB0nv
R14
R14 15K
15K
1%
1%
NVCTL1_R
1G1D1S
1G1D1S
6
D
Q1A
Q1A
G
1
COMMON
COMMON
S
5
FDG6301N
FDG6301N
25V
25V
0.22A
0.22A
BAM63010018
BAM63010018
5R
5R
0.5A
0.5A
SOT23_6_DBV
SOT23_6_DBV
0.7W@125C
0.7W@125C 8V
8V
GND
R20
R20
R10
R10
*10K
*10K
*10K
*10K C67
3
14>
IN
11>
IN
R13
R13 10K
10K
VDDP
EPAD
5VRUN
C532
C532 1U
1U
10
10 10%
10%
PWR_SRC
GND
19 14
VIN
NV_BST
17
BST
NV_DH
15
DH
20MIL
NV_LX
16
LX
16MIL
NV_DL
18
DL
20MIL
11
CSP
12
CSN
10
OUT
9
FB
20
GND
25
16MIL
NV_FB
12MIL
R8
5.6R85.6
GND
NV_BSTCAP
16MIL
5VRUN
D502
D502 RB551V-30
RB551V-30
SOD-323/SC76
SOD-323/SC76 500m
500m
C52
C52
0.1U
0.1U
16
16 10%
10%
C501
C501 1000P
1000P
+-5%
+-5% 50
50
LFPAK
LFPAK
LFPAK
LFPAK
LFPAK
LFPAK
PWR_SRC
+
+
+
C38
C38 10U
10U
+ - 20%
+ - 20% 25
5
D
Q502
Q502
SOT669_LFPAK
SOT669_LFPAK
G
4
COMMON
COMMON
S
1
30V
30V 55A
55A
2
4mR
4mR 220A
220A
3
30W@25C
30W@25C +/- 15V
+/- 15V
BAM21680Z03
BAM21680Z03
HAT2165H
HAT2165H
5
D
Q503
Q503
SOT669_LFPAK
SOT669_LFPAK
G
4
COMMON
COMMON
S
1
30V
30V 12A
12A
2
6.5mR
6.5mR 60A
60A
3
1.9W@25C
1.9W@25C +/- 20V
+/- 20V
BAM21650Z07
BAM21650Z07
HAT2165H
HAT2165H
GND
5
D
Q501
Q501
SOT669_LFPAK
SOT669_LFPAK
G
4
COMMON
COMMON
S
1
30V
30V 12A
12A
2
6.5mR
6.5mR 60A
60A
3
1.9W@25C
1.9W@25C +/- 20V
+/- 20V
BAM21650Z07
BAM21650Z07
HAT2165H
HAT2165H
25
GND GND GND GND
Change to BAM21680Z03
15AMPS
D501
D501 RB551V-30
RB551V-30
SOD-323/SC76
SOD-323/SC76 500m
500m
GND
+
+
C46
C46 10U
10U
+ - 20%
+ - 20% 25
25
L1
L1 1uH
1uH
6.8*6.5
6.8*6.5 +-20%
+-20% CV-10B0MZ01
CV-10B0MZ01
R7*0R7 *0
+
+
+
C54
C54
C65
C65
10U
10U
10U
10U
+ - 20%
+ - 20%
+ - 20%
+ - 20%
25
25
25
25
NVVDD
+
+
+
C43
C43 330U
330U
7343
7343 +-20%
+-20%
2.5
2.5 15
15
+
C19
C19 330U
330U
7343
7343 +-20%
+-20%
2.5
2.5 15
15
+
+
+
+
C18
C18
C17
C17
330U
330U
330U
330U
7343
7343
7343
7343
+-20%
+-20%
+-20%
+-20%
2.5
2.5
2.5
2.5 15
15
15
15
GND
R50R5 0
GND GND GND GND GND
GND
GND
NVVDD_SENSE
2>
IN
16MIL20MIL
12MIL 1.2V 16MIL 22V
15AMPS
NVVDD
C39
C39
C40
C40
4.7U
4.7U
4.7U
4.7U
10%
10%
10%
10%
6.3
6.3
6.3
6.3
VOLTAGENET MIN_LINE_WIDTH
5V10MIL
3.3V10MIL
2.5V12MIL
2.5V12MIL
1
2
3
GND
GND
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
NVVDD = 2.0 * [RBnv/(RBnv + RTnv)]
NV43M
1.02V
1.08V
1.13V
1.21V
3.09K
4.75K|15.4K|28K
3.09K
4.75K|15.4K
3.09K
4.75K|28K
3.09K 4.75K
GPIO5
RBnvRTnv
GPIO6
High High Low Low
High Low High Low
ASSEMBLY PAGE
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<XR_PAGE_TITLE>
DATE
4
5
7-MAY-2004
Page 19
SC553
SC553
AL000553010
AL000553010
U12
R21
R21 *10K
*10K
GPIO3_PPEN
GND
GND
1
3
C1
C1
0.1U
0.1U
10%
10% 10
10
U12
SOT23-5
SOT23-5 SOT23_5
SOT23_5 COMMON
COMMON
IN
EN4ADJ
GND
FB_REF
R77
R77 10K
10K
1%
1%
FB_ILILM
R610
R610 10K
10K
1%
1%
GND
12MIL
5
OUT
C130
GND
C130 1U
1U
10
10 10%
10%
R72
R72
12.4K
GND
12.4K
1%
1%
R74
R74 10K
10K
1%
1%
2
TMDSPLLVDD_ADJ
10MIL
5VRUN
1V8RUN
3
TMDSPLLVDD
FB_REFIN
FB_OD
10MIL
GND
FB_FBLANK
FB_SKIP
GND
C741
C741 1U
1U
10
10 10%
10%
R607
R607 10K
10K
1%
1%
FB_VP FB_TON
D
G
1
16MIL
S
2
20V
20V 3A
3A
0.080R
0.080R 20A
20A
0.5W@70C
0.5W@70C +/-8V
+/-8V
SOT23
SOT23
Q504
Q504
BAM25020Z08
BAM25020Z08
IRLML2502
IRLML2502
FB_VCCA
AL001993013
AL001993013
U506
U506
VR_SW=0.7V...2.0V
VR_SW=0.7V...2.0V
MLFP24_4X4MM
MLFP24_4X4MM COMMON
COMMON
22
3
24
1 2
4 23 21 13
6
C132
C132
0.1U
0.1U
10%
10% 10
10
5
10MIL
7
C134
C134 470P
470P
10%
10% 50
50
8
VCCA
LSAT OVP/UVP TON FBLANK
PGOOD SHDN GATE SKIP
REF
ILIM
REFIN
OD
R67 20R67 20
LVDSIOVDD
VDDP
VIN
BST
DH
LX
DL
CSP
CSN
OUT
FB
GND
EPAD
GND
2
4
1
U1
U1
3 5
TC7SH08FU
TC7SH08FU
2~5.5V
2~5.5V AL07SH08C00
AL07SH08C00
GND
R606
GND
GND
R606 10K
10K
1%
1%
R76
R76 10K 1%
10K 1%
10MIL
10MIL
C743
C743
R75
R75
Rtop
470P
470P
649
649
10%
10%
1%
1%
50
50
R73
R73
8.45K
8.45K
RBot
1%
1%
R608
R608 442
442
1%
1%
R79
R79 *10K
*10K
1%
1%
3V3RUN
1
14< 10> 13< 15<
2
RUNPWROK
IN
14>
IN
3
3V3RUN
GPIO7_FBVDDCTL0
15>
IN
4
GND
R16
R16
R78*0R78
10K
10K
*0
GND
GND
FBVDDQ
C16
C16 1U
1U
10
10 10%
10%
GND
MAX8527
MAX8527
AL008526K01
2 3 4 5
14
1
6 7
R660R66 0
FB_BSTCAP
16MIL
no stuff under 2V memory
AL008526K01
U13
U13
TSSOP14-MAX852x
TSSOP14-MAX852x XSOP14_PWR_P065W44MM
XSOP14_PWR_P065W44MM COMMON
COMMON
IN IN IN IN
NC
EN
8527 8528
8527 8528
POK
POR
D503
D503 RB551V-30
RB551V-30
SOD-323/SC76
SOD-323/SC76 500m
500m
LFPAK
LFPAK
C739
C739
0.1U
0.1U
10%
10% 10
10
LFPAK
LFPAK
C778
C778 1000P
1000P
+-5%
+-5% 50
50
R6050 R6 050
PEX1V2
PEX1V2=0.5*[1+RTop/RBot]
2AMPS
10
OUT
11
OUT
12
OUT
13
OUT
9
FB
8
GND
TP
EPAD
D
G
4
S
D
G
4
S
PEX1V2_ADJ
GND
PWR_SRC
5
Q506
Q506
SOT669_LFPAK
SOT669_LFPAK COMMON
COMMON
1 2 3
5
Q505
Q505
SOT669_LFPAK
SOT669_LFPAK COMMON
COMMON
1
30V
30V 55A
55A
2
4mR
4mR 220A
220A 30W@25C
30W@25C
3
+/- 15V
+/- 15V
HAT2165H
HAT2165H
BAM21650Z07
BAM21650Z07
GND
30V
30V 55A
55A 4mR
4mR 220A
220A 30W@25C
30W@25C +/- 15V
+/- 15V
HAT2165H
HAT2165H
BAM21680Z03
BAM21680Z03
Rtop
R81
R81
11.2K
11.2K
1%
1%
R80
R80
8.06K
8.06K
1%
1%
RBot
GND
Change to BAM21680Z03
7.5AMPS
GND
GND
+
+
C140
C140 10U
10U
+ - 20%
+ - 20% 25
25
GND
C135
C135 22U
22U
+-20%
+-20% 10
10
D504
D504 RB551V-30
RB551V-30
SOD-323/SC76
SOD-323/SC76 500m
500m
1V8RUN
C139
C139
4.7U
4.7U
+-20%
+-20%
6.3
6.3
GND
5VRUN
C740
C740 1U
1U
10
10 10%
10%
PWR_SRC 5VRUN
GND
19 14
FB_BST
17
16MIL
FB_DH
15
20MIL
FB_LX
16
FB_DL
18
20MIL
11
12
10
FB_FB
9
12MIL
20 25
GND
R604
R604 *2.05K
*2.05K
1%
1%
no stuff under 2V memory
GND
5
ASSEMBLY PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
AB D F H
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
E GC
PEX1V2 Rtop RBot
1.306V 13K 8.06K
+
+
C136
C136
FBVDD=2*[1+(RBot/(Rtop+RBot)] for
10U
10U
+ - 20%
+ - 20% 25
25
GND
L2
L2 1uH
1uH
6.8*6.5
6.8*6.5 +-20%
+-20% CV-10B0MZ01
CV-10B0MZ01
<2V
GND
1.8V 976 8.45K
7.5AMPS
+
+
+
+
C137
C137
C133
C133
100U
100U
100U
100U
+-20%
+-20%
+-20%
+-20%
6.3
6.3
6.3
6.3
GND GND GND GND
HGFEDCBA
1
2
3
RBotRtopFBVDD
FBVDD
FBVDD
+
+
+
+
C142
C142
C131
100U
100U
+-20%
+-20%
6.3
6.3
C131 100U
100U
+-20%
+-20%
6.3
6.3
C126
C126
4.7U
4.7U
10%
10%
6.3
6.3
4
5
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
ID PAGE NAME
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
7-MAY-2004
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