ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
<edit here to insert page detail>
EGC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY
SANTA CLARA, CA 95050,
USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
NAME
<XR_PAGE_TITLE>
DATE
2
3
4
5
7-MAY-2004
Page 2
7<> 6<>
U9B
U9B
BGA820_P10_33X33MM
BGA820_P10_33X33MM
COMMON
5<> 4<>
1
2
3
5< 4< 4<>
5<> 4<>
FBAD[63..0]
BI
FBADQM[7..0]
OUT
FBADQS[7..0]
BI
FBAD0
0
FBAD1
1
FBAD2
2
FBAD3
3
FBAD4
4
FBAD5
5
FBAD6
6
FBAD7
7
FBAD8
8
FBAD9
9
FBAD10
10
FBAD11
11
FBAD12
12
FBAD13
13
FBAD14
14
FBAD15
15
FBAD16
16
FBAD17
17
FBAD18
18
FBAD19
19
FBAD20
20
FBAD21
21
FBAD22
22
FBAD23
23
FBAD24
24
FBAD25
25
FBAD26
26
FBAD27
27
FBAD28
28
FBAD29
29
FBAD30
30
FBAD31
31
FBAD32
32
FBAD33
33
FBAD34
34
FBAD35
35
FBAD36
36
FBAD37
37
FBAD38
38
FBAD39
39
FBAD40
40
FBAD41
41
FBAD42
42
FBAD43
43
FBAD44
44
FBAD45
45
FBAD46
46
FBAD47
47
FBAD48
48
FBAD49
49
FBAD50
50
FBAD51
51
FBAD52
52
FBAD53
53
FBAD54
54
FBAD55
55
FBAD56
56
FBAD57
57
FBAD58
58
FBAD59
59
FBAD60
60
FBAD61
61
FBAD62
62
FBAD63
63
FBADQM0
0
FBADQM1
1
FBADQM2
2
FBADQM3
3
FBADQM4
4
FBADQM5
5
FBADQM6
6
FBADQM7
7
FBADQS0
0
FBADQS1
1
FBADQS2
2
FBADQS3
3
FBADQS4
4
FBADQS5
5
FBADQS6
6
FBADQS7
7
4
FBVDD
C583
C583
*0.022U
*0.022U
R554
R554
10K
10K
16V
1%
1%
FBVREF1
C579
C579
*0.022U
*0.022U
16V
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
MEMORY 128/256MB, 8Mx32DDR, PARTITION A, BANK 0
PLACE ALL DISCRETE COMPONENTS AS NEAR AS POSSIBLE
TO MEMORY
1
Stuff for stacked die
FBACS1*
3>4<>
IN
Stuff for monolithic die
FBVDD
2
R62120R62120
R63120R63120
R57120R57120
R58120R58120
R527 120R527 120
R525 120R525 120
R526 120R526 120C88
R524 120R524 120
3
4
GND
FBADQM0
3>4<>5<
IN
FBADQM1
3>4<>5<
IN
FBADQM2
3>4<>5<
IN
FBADQM3
3>4<>5<
IN
FBADQM4
3>4<>5<
IN
FBADQM5
3>4<>5<
IN
FBADQM6
3>4<>5<
IN
FBADQM7
3>4<>5<
IN
FBADQS0
3<>4<>5<>
BI
FBADQS1
3<>4<>5<>
BI
FBADQS2
3<>4<>5<>
BI
FBADQS3
3<>4<>5<>
BI
FBADQS4
3<>4<>5<>
BI
FBADQS5
3<>4<>5<>
BI
FBADQS6
3<>4<>5<>
BI
FBADQS7
3<>4<>5<>
BI
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
<edit here to insert page detail>
EGC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY
SANTA CLARA, CA 95050,
USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
NAME
<XR_PAGE_TITLE>
DATE
7-MAY-2004
Page 5
MEMORY 128/256MB, 8Mx32DDR, PARTITION C, BANK 0
PLACE ALL DISCRETE COMPONENTS AS NEAR AS POSSIBLE
TO MEMORY
1
3>6<>
2
IN
FBVDD
FBCCS1*
R514 120R514 120
R513 120R513 120
R509 120R509 120
R508 120R508 120
R515 120R515 120
R516 120R516 120
R512 120R512 120
R510 120R510 120
stuff for stacked die
R506 *0R506 *0
R507 0R507 0
stuff for monolithic die
FBC_B0_CS0*
FBC_B1_CS1*
FBCCLK1*
FBCCLK0
FBCCLK0*
FBCCLK1
6< 6<>
OUT
7<
OUT
R511
R511
619
619
1%
1%
R6
R6
619
619
1%
1%
FBC_CMD[26..0]
3>6<6<>7<
IN
FBCRAS*FBCRAS*
3>6<>7<
IN
FBCCAS*FBCCAS*
3>6<>7<
IN
FBCWE*FBCWE*
3>6<>7<
IN
FBCCS0*FBCCS0*
3>6<>
IN
FBC_B0_CS0*FBC_B0_CS0*
6>6<>
IN
FBC_CMD1FBC_CMD1
1
FBC_CMD3FBC_CMD3
3
FBC_CMD2
2
FBC_CMD0
0
FBC_CMD24
24
FBC_CMD22
22
FBC_CMD21FBC_CMD21
21
FBC_CMD23FBC_CMD23
23
FBC_CMD19FBC_CMD19
19
FBC_CMD20FBC_CMD20
20
FBC_CMD17FBC_CMD17
17
FBC_CMD16FBC_CMD16
16
FBC_CMD14FBC_CMD14
14
FBC_CMD10FBC_CMD10
10
FBC_CMD18FBC_CMD18
18
FBCCKEFBCCKE
3>6<>7<
IN
FBCCLK0
3>7<
IN
FBCCLK0*
3>7<
IN
GND
3
FBCDQM0
3>6<>7<
IN
FBCDQM1
3>6<>7<
IN
FBCDQM2
3>6<>7<
IN
FBCDQM3
3>6<>7<
IN
FBCDQM4
3>6<>7<
IN
FBCDQM5
3>6<>7<
IN
FBCDQM6
3>6<>7<
IN
FBCDQM7
3>6<>7<
IN
3<>6<>7<>
BI
4
FBCDQS0
3<>6<>7<>
BI
FBCDQS1
3<>6<>7<>
BI
FBCDQS2
3<>6<>7<>
BI
FBCDQS3
3<>6<>7<>
BI
FBCDQS4
3<>6<>7<>
BI
FBCDQS5
3<>6<>7<>
BI
FBCDQS6
3<>6<>7<>
BI
FBCDQS7
3<>6<>7<>
BI
FBCD[63..0]
FBCD6
6
FBCD7
7
FBCD5
5
FBCD4
4
FBCD2
2
FBCD3
3
FBCD1
1
FBCD0
0
FBCDQM0
FBCDQS0
FBCD[63..0]
FBCD15
15
FBCD13
13
FBCD14
14
FBCD12
12
FBCD11
11
FBCD9
9
FBCD10
10
FBCD8
8
FBCDQM1
FBCDQS1
U2B
U2B
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2
COMMON
COMMON
M2
RAS
L2
CAS
L3
WE
N2
CS<0>
M4
CS<1>/TBD.
N5
A<0>
N6
A<1>
M6
A<2>
N7
A<3>
N8
A<4>
M9
A<5>
N9
A<6>
N10
A<7>
N11
A/AP<8>
M8
A<9>
L6
A<10>
M7
A<11>
L9
A<12>/TBD.
N4
BA<0>
M5
BA<1>
M10
BA<2>/TBD.
N12
CKE
M11
CLK
M12
CLK
R501
R501
10K
10K
GND
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
M13
Must be GND
GND
U2A
U2A
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2
COMMON
COMMON
F13
DQ<0>
F12
DQ<1>
J13
DQ<2>
G13
DQ<3>
K12
DQ<4>
K13
DQ<5>
G12
DQ<6>
J12
DQ<7>
H12
DQM
H13
DQS
U2E
U2E
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2
COMMON
COMMON
B6
DQ<0>
D2
DQ<1>
B5
DQ<2>
C2
DQ<3>
B7
DQ<4>
D3
DQ<5>
E2
DQ<6>
C6
DQ<7>
B3
DQM
B2
DQS
2/4/8MX32
NC
NC
C4
C11
NC
NC
NC
NC
NC
H4
N3
M3
L12NCL13
H11
FBCD22
22
FBCD23
23
FBCD20
20
FBCD21
21
FBCD19
19
FBCD18
18
FBCD16
16
FBCD17
17
FBCDQM2
FBCDQS2
FBCD31
31
FBCD29
29
FBCD30
30
FBCD28
28
FBCD27
27
FBCD25
25
FBCD26
26
FBCD24
24
FBCDQM3
FBCDQS3
D7
VDD2/4/8MX32
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
L11
VDD
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
B4
VSSQ
B11
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E6
VSSQ
E9
VSSQ
F5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5
VSSQ
J10
VSSQ
K5
VSSQ
K10
VSSQ
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
N13
Vref
GND
U3B
FBVDD
FBVDD
7<
1
3
FBC_CMD13
13
FBC_CMD4
4
FBC_CMD5
5
FBC_CMD6
6
21
23
19
20
17
16
14
10
18
FBCCLK1
3>7<
IN
FBCCLK1*
3>7<
IN
FBC_CMD[26..0]
3>6<6<>
IN
FBVDD
R1
R1
10K
10K
1%
FBCVREF1
12_mil
1%
R2
R2
C23
C23
6.81K
6.81K
0.1U
0.1U
1%
1%
10V10V
U3B
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2
COMMON
COMMON
M2
RAS
L2
CAS
L3
WE
N2
CS<0>
M4
CS<1>/TBD.
N5
A<0>
N6
A<1>
M6
A<2>
N7
A<3>
N8
A<4>
M9
A<5>
N9
A<6>
N10
A<7>
N11
A/AP<8>
M8
A<9>
L6
A<10>
M7
A<11>
L9
A<12>/TBD.
N4
BA<0>
M5
BA<1>
M10
BA<2>/TBD.
N12
CKE
M11
CLK
M12
CLK
F6
THERM
F7
THERM
F8
THERM
F9
THERM
G6
THERM
G7
THERM
G8
THERM
G9
THERM
H6
THERM
H7
THERM
H8
THERM
H9
THERM
J6
THERM
J7
THERM
J8
THERM
J9
THERM
M13
Must be GND
GND
NC
C4
GND
U2D
U2D
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2
COMMON
COMMON
D12
DQ<0>
C13
DQ<1>
D13
DQ<2>
E13
DQ<3>
C9
DQ<4>
B10
DQ<5>
B8
DQ<6>
B9
DQ<7>
B12
DQM
B13
DQS
U2C
U2C
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2
COMMON
COMMON
G2
DQ<0>
K2
DQ<1>
J2
DQ<2>
F2
DQ<3>
G3
DQ<4>
K3
DQ<5>
J3
DQ<6>
F3
DQ<7>
H3
DQM
H2
DQS
FBCD39
39
FBCD37
37
FBCD38
38
FBCD36
36
FBCD35
35
FBCD33
33
FBCD34
34
FBCD32
32
FBCDQM4
FBCDQS4
FBCD46
46
FBCD47
47
FBCD45
45
FBCD44
44
FBCD42
42
FBCD43
43
FBCD41
41
FBCD40
40
FBCDQM5
FBCDQS5
U3A
U3A
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2
COMMON
COMMON
G2
DQ<0>
K2
DQ<1>
F2
DQ<2>
J2
DQ<3>
J3
DQ<4>
F3
DQ<5>
K3
DQ<6>
G3
DQ<7>
H3
DQM
H2
DQS
U3E
U3E
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2
COMMON
COMMON
C6
DQ<0>
D2
DQ<1>
B5
DQ<2>
B7
DQ<3>
E2
DQ<4>
B6
DQ<5>
C2
DQ<6>
D3
DQ<7>
B3
DQM
B2
DQS
2/4/8MX32
NC
NC
NC
H4
C11
H11
HGFEDCBA
NET Diffpair NET_SPACING_RULE
FBCD[63..0]
3<>6<>7<>
BI
FBCDQM[7..0]
3>6<7<
BI
FBCDQS[7..0]
3<>6<>7<>
BI
FBVDD
D7
VDD2/4/8MX32
D8
VDD
E4
VDD
E11
VDD
L4
VDD
L7
VDD
L8
VDD
FBVDD
L11
VDD
C3
VDDQ
C5
VDDQ
C7
VDDQ
C8
VDDQ
C10
VDDQ
C12
VDDQ
E3
VDDQ
E12
VDDQ
F4
VDDQ
F11
VDDQ
G4
VDDQ
G11
VDDQ
J4
VDDQ
J11
VDDQ
K4
VDDQ
K11
VDDQ
B4
VSSQ
B11
VSSQ
D4
VSSQ
D5
VSSQ
D6
VSSQ
D9
VSSQ
D10
VSSQ
D11
VSSQ
E6
VSSQ
E9
VSSQ
F5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5
VSSQ
J10
VSSQ
K5
VSSQ
K10
VSSQ
E5
VSS
E7
VSS
E8
VSS
E10
VSS
K6
VSS
K7
VSS
K8
VSS
K9
VSS
L5
VSS
L10
VSS
N13
Vref
NC
NC
NC
N3
M3
L12NCL13
GND
FBCD55
55
FBCD53
53
FBCD54
54
FBCD52
52
FBCD51
51
FBCD49
49
FBCD50
50
FBCD48
48
FBCDQM6
FBCDQS6
FBCD62
62
FBCD63
63
FBCD60
60
FBCD61
61
FBCD59
59
FBCD58
58
FBCD56
56
FBCD57
57
FBCDQM7
FBCDQS7
FBVDD
FBCVREF0
12_mil
C24
C24
0.1U
0.1U
GND
U3D
U3D
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2
COMMON
COMMON
J13
DQ<0>
F13
DQ<1>
K13
DQ<2>
G13
DQ<3>
K12
DQ<4>
G12
DQ<5>
J12
DQ<6>
F12
DQ<7>
H12
DQM
H13
DQS
U3C
U3C
BGA_DIAMOND144_P08_DDR_1 2MM_B2
BGA_DIAMOND144_P08_DDR_1 2MM_B2
COMMON
COMMON
E13
DQ<0>
B10
DQ<1>
C9
DQ<2>
C13
DQ<3>
B9
DQ<4>
D13
DQ<5>
B8
DQ<6>
D12
DQ<7>
B12
DQM
B13
DQS
R4
R4
10K
10K
1%
1%
R3
R3
6.81K
6.81K
1%
1%
Decoupling for left MEMORY
Place around the MEM
FBVDD
C58
C59
C59
0.01U
0.01U
25V10V25V25V10V10V
C25
C25
C22
C22
0.1U
0.1U
0.1U
0.1U
C58
C11
C11
0.01U
0.01U
0.1U
0.1U
GND
FBVDD
C47
C47
4.7U
4.7U
0603
0603
C57
C57
C3
0.1U
0.1U
0.1UC30.1U
10V10V10V10V6.3V
C2
C4
0.1UC20.1U
0.1UC40.1U
GND
Decoupling for left MEMORY
Place around the MEM
FBVDD
C53
C53
4.7U
4.7U
0603
0603
C7
C37
C37
0.01U
0.01U
25V25V25V10V10V
C27
C27
C35
0.1UC70.1U
10V10V10V25V6.3V
C35
0.1U
0.1U
0.1U
0.1U
GND
FBVDD
C5
C21
C21
0.1U
0.1U
10V10V10V10V
C51
C51
0.1UC50.1U
C6
0.01U
0.01U
0.1UC60.1U
25V10V10V
C12
C12
0.1U
0.1U
GND
FBC_CMD[26..0]
3>6<7<
BI
FBCRAS*
3>6<7<
BI
FBCCAS*
3>6<7<
BI
FBCWE*
3>6<7<
BI
FBCCS0*
3>6<
BI
FBCCS1*
3>6<
BI
FBCCKE
3>6<7<
BI
FBC_B0_CS0*
6<6>
BI
C49
C49
C26
C44
C44
0.1U
0.1U
C10
C10
0.1U
0.1U
10V10V10V10V10V10V
C63
C63
0.01U
0.01U
C14
C14
0.1U
0.1U
C61
C61
0.1U
0.1U
10V10V25V25V
C26
0.01U
0.01U
0.1U
0.1U
C9
C8
0.1UC90.1U
0.1UC80.1U
C34
C34
C60
C60
0.1U
0.1U
0.1U
0.1U
10V10V25V
C62
C62
C13
C13
0.01U
0.01U
0.1U
0.1U
C42
C42
C15
C15
0.01U
0.01U
0.1U
0.1U
25V25V
C29
C29
C32
C32
0.1U
0.1U
0.01U
0.01U
GND
10MIL
10MIL
10MIL
10MIL
10MIL
10MIL
10MIL
10MIL
10MIL
10MIL
10MIL
C36
C36
0.01U
0.01U
25V10V10V
C28
C28
C48
C48
C20
C20
0.1U
0.1U
C31
C31
0.01U
0.01U
0.1U
0.1U
0.1U
0.1U
C55
C55
C41
C41
0.01U
0.01U
0.01U
0.01U
25V25V
1
2
3
GND
C56
C56
C45
C45
0.01U
0.01U
0.1U
0.1U
4
C50
C50
0.01U
0.01U
C64
C64
0.01U
0.01U
5
ASSEMBLY
PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
<edit here to insert page detail>
EGC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY
SANTA CLARA, CA 95050,
USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
NAME
<CON_PAGE_NUM> OF
<CON_TOTAL_PAGES>
DATE
5
7-MAY-2004
Page 6
MEMORY 128/256MB, 8Mx32DDR, PARTITION C, BANK 1
PLACE ALL DISCRETE COMPONENTS AS NEAR AS POSSIBLE
TO MEMORY
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
<edit here to insert page detail>
EGC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY
SANTA CLARA, CA 95050,
USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
NAME
<XR_PAGE_TITLE>
DATE
7-MAY-2004
Page 7
3V3RUN 3V3RUN
U9D
U9D
BGA820_P10_33X33MM
R571
R571
90.9
90.9
1%
1%
GND
R589
R589
10K
10K
1%
1%
GND
BGA820_P10_33X33MM
COMMON
COMMON
4/14 DACA
4/14 DACA
AD10
DACA_VDD
AH10
DACA_VREF
AH9
DACA_RSET
U9G
U9G
BGA820_P10_33X33MM
BGA820_P10_33X33MM
COMMON
COMMON
5/14 DACB(TV)
5/14 DACB(TV)
V8
DACB_VDD
R5
DACB_VREF
R7
DACB_RSET
R570
R570
1.78K
1.78K
1%
1%
U9F
U9F
BGA820_P10_33X33MM
BGA820_P10_33X33MM
COMMON
COMMON
6/14 DACC
6/14 DACC
AD7
DACC_VDD
AH4
DACC_VREF
AF5
DACC_RSET
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_IDUMP
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_IDUMP
I2CB_SCL
I2CB_SDA
DACC_HSYNC
DACC_VSYNC
DACC_RED
DACC_GREEN
DACC_BLUE
DACC_IDUMP
I2CA_SCL
K2
I2CA_SDA
J3
DACA_HSYNC
AF10
DACA_VSYNC
AK10
AH11
DACA_RED
AJ12
DACA_GREEN
AH12
DACA_BLUE
AG9
R591
R591
GND
150
150
1%
1%
GND
GND
DACB_RED
R6
DACB_GREEN
T5
DACB_BLUE
T6
V7
H4
J4
AG7
AG5
AF6
AG6
AE5
AG4
GND
I2CB_SCL
I2CB_SDA
GND
R578
R578
150
150
1%
1%
GND
R54833R54833
R55133R55133
IMPEDANCE_RULE
::37.520MIL_G2G_30MIL
R585
R585
R590
R590
150
150
150
150
1%
1%
1%
1%
GND
IMPEDANCE_RULE NET_SPACING_TYPE
::37.5
R579
R579
R577
R577
150
150
150
150
1%
1%
1%
1%
GND
R55633R55633
1
3V3RUN
LB512
LB512
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C692
C692
4.7U
4.7U
6.3V50V25V
0603
0603
C698
C698
4700P
4700P
12_mil
10MIL_TRACE
C697
C697
470P
470P
DACA_VDD
DACA_VREF
DACA_RSET
C723
C723
R592
R592
0.01U
0.01U
137
137
1%
1%
16V
GND
3V3RUN
2
LB506
LB506
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
GND
3
12_mil
10MIL_TRACE
C644
C644
4.7U
4.7U
6.3V50V25V16V
0603
0603
C648
C648
4700P
4700P
IN
C647
C647
470P
470P
SEL_SDTV_HDTV
R85
R85
10K
10K
GND
R584 1K1%R584 1K
1%
C650
C650
0.01U
0.01U
D
G
1
S
SOT23
SOT23
BAM25020Z08
BAM25020Z08
R86
R86
365
365
1%
1%
3
Q3
Q3
IRLML2502
IRLML2502
2
20V
20V
3A
3A
0.080R
0.080R
20A
20A
0.5W@70C
0.5W@70C
+/-8V
+/-8V
DACB_VDD
DACB_VREF
DACC_VDD
GND
I2CA_SCL_R
I2CA_SDA_R
NET_SPACING_TYPE
20MIL_G2G_30MIL::37.5
20MIL_G2G_30MIL::37.5
20MIL_G2G_30MIL::37.5
20MIL_G2G_30MIL::37.5
20MIL_G2G_30MIL
R53933R53933
R550
R550
R549
R549
2.2K
2.2K
2.2K
2.2K
GND
U9E
U9E
BGA820_P10_33X33MM
BGA820_P10_33X33MM
COMMON
GND
COMMON
T9
T10
U10
T1
U1
13/14 XTAL_PLL
13/14 XTAL_PLL
PLLVDD
VID_PLLVDD
PLLGND
XTALSSIN
XTALIN
XTALOUTBUFF
27 MHZY1
27 MHZ
13
10 PPM 85CXTAL_4_SMT_LP_H10S
10 PPM 85CXTAL_4_SMT_LP_H10S
COMMON
COMMON
SPACINGSPACING
Y1
XTALOUT
XTALOUT
U2
R39
R39
*10K
*10K
GND
C109
C109
22P
22P
BXTALOUT
T2
R38 22R38 22
XTALOUTBUFF
OUT
GND
ASSEMBLY
PAGE
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
<edit here to insert page detail>
EGC
4
5
3V3RUN
LB505
LB505
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
C673
C673
4.7U
4.7U
6.3V50V25V10V
0603
0603
GND
C617
C617
1U
1U
0603
0603
12_mil
C621
C621
4700P
4700P
13>
IN
PLLVDD
10MIL_TRACE
C631
C631
470P
470P
SSFOUT
13MIL_G2G13MIL_G2G
XTALIN
C103
C103
22P
22P
GND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
<edit here to insert page detail>
3
TMDSPLLVDD
LB507
LB507
BLM18PG181SN1D
BLM18PG181SN1D
0603
C671
C671
4.7U
4.7U
6.3V
0603
0603
GND
1
3V3RUN
TMDS_RUNPWORK*
3
Q4
2N7002EQ42N7002E
2
R19
R19
10K
10K
4
RUNPWROK
IN
GND
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
0603
1%
1%
C713
C713
4700P
4700P
C664
C664
4700P
4700P
IFPCBRSET
IFPCPLLVDD
C712
C712
470P
470P
C659
C659
470P
470P
GND
R5871K
R5871K
IFPCDIOVDD
C727
C727
4.7U
4.7U
0603
0603
GND
12_mil
C672
C672
4.7U
4.7U
6.3V50V25V
0603
0603
GND
12_mil
C696
C696
0.1U
0.1U
10V50V6.3V25V
LB508
LB508
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
3
Q5
SI2305DSQ5SI2305DS
1
2
LB516
C618
C618
4.7U
4.7U
6.3V
0603
0603
LB516
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
GND
TMDSIOVDD
GND
IFPC_TXC
IFPC_TXC
IFPC_TXD0
IFPC_TXD0
IFPC_TXD1
IFPC_TXD1
IFPC_TXD2
IFPC_TXD2
IFPD_TXC
IFPD_TXC
IFPD_TXD4
IFPD_TXD4
IFPD_TXD5
IFPD_TXD5
IFPD_TXD6
IFPD_TXD6
IFPCTXD1
R50
R50
49.9
49.9
1%
1%
R51
R51
49.9
49.9
1%
1%
IFPCTXD1*
IFPCTXD2
R52
R52
49.9
49.9
1%
1%
R54
R54
49.9
49.9
1%
1%
IFPCTXD2*
IFPCTXC*
AM3
IFPCTXC
AM2
IFPCTXD0*
AE1
IFPCTXD0
AE2
IFPCTXD1*
AF2
IFPCTXD1
AF1
IFPCTXD2*
AH1
IFPCTXD2
AG1
IFPDTXC*
AH2
IFPDTXC
AG3
IFPDTXD3*
AJ1
IFPDTXD3
AK1
IFPDTXD4*
AL1
IFPDTXD4
AL2
IFPDTXD5*
AJ3
IFPDTXD5
AJ2
EGC
IFPCDIOVDD
C129
C129
0.1U
0.1U
GND
IFPDTXD3
IFPDTXD5
25MILIFPCTXC
25MILIFPCTXC
25MILIFPCTXD0
25MILIFPCTXD0
25MILIFPCTXD1
25MILIFPCTXD1
25MILIFPCTXD2
25MILIFPCTXD2
25MILIFPDTXC
25MILIFPDTXC
25MILIFPDTXD3
25MIL
25MILIFPDTXD4
25MILIFPDTXD4
25MIL
25MILIFPDTXD5
IFPDTXC
IFPDTXC*
IFPDTXD3
IFPDTXD3*
IFPDTXD4
R71
R71
49.9
49.9
IFPCDIOVDD
1%
1%
R70
R70
49.9
49.9
1%
1%
R56
R56
49.9
49.9
1%
1%
C115
R55
R55
49.9
49.9
1%
1%
C115
0.1U
0.1U
GND
NET_PHYSICAL_TYPENET NAME DIFFPAIR NET_SPACING_RULE
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
TMDS/PCIE/CLK
IFPDTXD4*
IFPDTXD5
IFPDTXD5*
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
R61
R61
49.9
49.9
IFPCDIOVDD
1%
1%
R59
R59
49.9
49.9
1%
1%
R68
R68
49.9
49.9
1%
1%
C119
R69
R69
49.9
49.9
1%
1%
C119
0.1U
0.1U
GND
10<
10<
10<
10<
10<
10<
10<
10<
10<
10<
10<
10<
10<
10<
10<
10<
C105
C105
0.1U
0.1U
GND GND
C128
C128
0.1U
0.1U
3
4
5
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY
SANTA CLARA, CA 95050,
USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
NAME
<CON_PAGE_NUM> OF
<CON_TOTAL_PAGES>
DATE
7-MAY-2004
Page 9
HGFEDCBA
1
CN1B
CN1B
(NON)PHY-X16
(NON)PHY-X16
CON_MXM_230_FINGER_P0_5MM
CON_MXM_230_FINGER_P0_5MM
COMMON
COMMON
2/2 IO - LVDS,DVI,VGA,TV
11<
OUT
10<
IN
8<>
BI
DVI_A_HPD
I2CB_SCL_R
I2CB_SDA_R
2/2 IO - LVDS,DVI,VGA,TV
217
DVI_A_HPD
232
DDCB_SCLK
230
DDCB_SDATA
2
IGP LVDS
11<
OUT
8>
IN
8>
IN
8>
IN
8>
IN
8>
IN
8>
IN
8>
IN
8>
3
4
IN
8>
IN
8<>
BI
11>
IN
11>
IN
11>
IN
11<11>13<
IN
11<>13<>
BI
11<>
IN
11<
BI
11>
IN
13<14<15<
OUT
10<
IN
10<
IN
11>
IN
DVI_B_HPD
DACB_GREEN
DACB_RED
DACB_BLUE
DACA_VSYNC
DACA_HSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
I2CA_SCL_R
I2CA_SDA_R
GPIO3_PPEN
GPIO4_BLEN
GPIO2_BL_PWM
I2CC_SCL_R
I2CC_SDA_R
SMB_DAT
SMB_CLK
THERM_ALERT*
RUNPWROK
MXM_RSVD1
MXM_RSVD2
MXM_RSVD3
193
DVI_B_HPD
SDTV HDTV
SDTV HDTV
140
136
TV_CHDTV_Pr
144
TV_CVBS HDTV_Pb
153
VSYNC
151
HSYNC
148
VGA_RED
152
VGA_GRN
156
VGA_BLU
155
DDCA_SCLK
157
DDCA_SDATA
224
LVDS_PPEN
228
LVDS_BLEN
226
LVDS_BL_BRGHT
222
DDCC_SCLK
220
DDCC_SDATA
145
SMB_DAT
147
SMB_CLK
149
THERM
16
RUNPWROK
141
RSVD
169
RSVD
143
RSVD
HDTV_YTV_Y
IGP LVDS
MXM DVI-B
MXM DVI-B
DVI_B_CLKIGP_LCLK
RSVD
RSVD
IGP_LTX1 DVI_B_TX1
IGP_LTX1 DVI_B_TX1
IGP_LTX0 DVI_B_TX0
IGP_LTX0 DVI_B_TX0
IGP_UCLK
IGP_UCLK
RSVD
RSVD
IGP_UTX2
IGP_UTX2
IGP_UTX1
IGP_UTX1
IGP_UTX0
IGP_UTX0
DVI_B_CLKIGP_LCLK
DVI_B_TX2IGP_LTX2
DVI_B_TX2IGP_LTX2
DVI_A_CLK
DVI_A_CLK
DVI_A_TX0
DVI_A_TX0
DVI_A_TX1
DVI_A_TX1
DVI_A_TX2
DVI_A_TX2
LVDS_UTX0
LVDS_UTX0
LVDS_UTX1
LVDS_UTX1
LVDS_UTX2
LVDS_UTX2
LVDS_UTX3
LVDS_UTX3
LVDS_UCLK
LVDS_UCLK
LVDS_LTX0
LVDS_LTX0
LVDS_LTX1
LVDS_LTX1
LVDS_LTX2
LVDS_LTX2
LVDS_LTX3
LVDS_LTX3
LVDS_LCLK
LVDS_LCLK
219
221
237
239
231
233
225
227
189
191
195
197
201
203
207
209
213
215
159
161
165
167
171
173
177
179
183
185
186
184
180
178
174
172
168
166
162
160
216
214
210
208
204
202
198
196
192
190
IFPCTXC*
IFPCTXC
IFPCTXD0*
IFPCTXD0
IFPCTXD1*
IFPCTXD1
IFPCTXD2*
IFPCTXD2
IFPDTXC*
IFPDTXC
IFPDTXD5*
IFPDTXD5
IFPDTXD4*
IFPDTXD4
IFPDTXD3*
IFPDTXD3
NTP_JTAG_TRST_C
NTP_JTAG_TDO_C
NTP_JTAG_TMS_C
NTP_JTAG_TDI_C
NTP_JTAG_TCLK_C
IFPBTXD4
IFPBTXD4*
IFPBTXD5
IFPBTXD5*
IFPBTXD6
IFPBTXD6*
IFPBTXD7
IFPBTXD7*
IFPBTXC
IFPBTXC*
IFPATXD0
IFPATXD0*
IFPATXD1
IFPATXD1*
IFPATXD2
IFPATXD2*
IFPATXD3
IFPATXD3*
IFPATXC
IFPATXC*
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
11<
OUT
11>
IN
11<
OUT
11<
OUT
11<
OUT
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
9>
IN
1
2
3
4
5
ASSEMBLY
PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
<edit here to insert page detail>
EGC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY
SANTA CLARA, CA 95050,
USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
NAME
<CON_PAGE_NUM> OF
<CON_TOTAL_PAGES>
DATE
5
7-MAY-2004
Page 13
HGFEDCBA
12<
13<
1
2
3
4
MIOBD[11..0]
OUT
MIOAD[11..0]
OUT
STRAP
BIT
LOGIC
0
LOGIC
1
0
1
NV4x
2
3
4
5
R546*10KR546*10K
R537 2.2KR537 2.2K
R362.2KR362.2K
R560 2.2KR560 2.2K
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
R282.2KR282.2K
R547 2.2KR547 2.2K
R532*10KR532*10K
R37*10KR37*10K
R561*10KR561*10K
6
22
7
8
9
10
11
MIOBD4
12
13
13>
OUT
MIOA_HSYNCMIOA_HSYNC
20
21
R581 2.2KR581 2.2K
R432.2KR432.2KR45*10KR45*10K
R598 2.2KR598 2.2K
R580*10KR580*10K
MIOBD5
MIOBD3
R46*10KR46*10K
R597*10KR597*10K
R582 2.2KR582 2.2K
14
MIOBD10
29
R586 2.2KR586 2.2K
30
11
12
13
14
R35*10KR35*10K
R562*10KR562*10K
R538*10KR538*10K
R543*10KR543*10K
MIOAD0
MIOAD6
MIOAD8
MIOAD9
R34*10KR34*10K
R558*10KR558*10K
R531*10KR531*10K
R544*10KR544*10K
REG: NV_STRAP_0
3V3RUN
PCI_AD_SWAP
SUB_VENDOR
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3
CRYSTAL_0
CRYSTAL_1
TV_MODE_0
TV_MODE_1
AGP8x/4x
AGP_SIDEBAND
AGP_FASTWRITE
PCI_DEVID_0
PCI_DEVID_1
PCI_DEVID_2
PCI_DEVID_3
BUS_TYPE
ROM_TYPE_0
ROM_TYPE_1
REG: NV_STRAP_1
PEX_PLL_EN_TERM100
3GIO_PADCFG_LUT_ADR[0]
3GIO_PADCFG_LUT_ADR[1]
3GIO_PADCFG_LUT_ADR[2]
0: REVERSED
1: NORMAL
0: SYSTEM BIOS
1: ADAPTER BIOS
RAM_CFG[3:0]
MS_0001: 8Mx32 DDR SDRAM, DQS PER 8 BITS, Monolithic
MS_0011: 8Mx32 DDR SDRAM, DQS PER 8 BITS, Stacked
MS_0110: 4Mx32 DDR SDRAM, DQS PER 8 BITS, Monolithic
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
<edit here to insert page detail>
EGC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY
SANTA CLARA, CA 95050,
USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
NAME
<CON_PAGE_NUM> OF
<CON_TOTAL_PAGES>
DATE
5
7-MAY-2004
Page 14
HGFEDCBA
*** Signal Cross-Reference for the entire design ***
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEIN G PROVIDED 'AS IS'. TH E MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE M ATERIALS OR OT HERWISE, AND EXPRESSLY DISCLAI MS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.NAME
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
EGC
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
1
2
3
4
5
7-MAY-2004
Page 15
HGFEDCBA
*** Part Cross-Reference for the entire design ***
C1 C 15
C2 C 6
C3 C 6
C4 C 6
C5 C 6
C6 C 6
1
C7 C 6
C8 C 6
C9 C 6
C10 C 6
C11 C 6
C12 C 6
C13 C 6
C14 C 6
C15 C 6
C16 C 15
C17 C_POL 14
C18 C_POL 14
C19 C_POL 14
C20 C 6
C21 C 6
C22 C 6
C23 C 6
C24 C 6
C25 C 6
C26 C 6
C27 C 6
C28 C 6
C29 C 6
C30 C 15
2
C31 C 6
C32 C 6
C33 C 15
C34 C 6
C35 C 6
C36 C 6
C37 C 6
C38 C 14
C39 C 14
C40 C 14
C41 C 6
C42 C 6
C43 C_POL 14
C44 C 6
C45 C 6
C46 C 14
C47 C 6
C48 C 6
C49 C 6
C50 C 6
C51 C 6
C52 C 14
C53 C 6
C54 C 14
C55 C 6
3
C56 C 6
C57 C 6
C58 C 6
C59 C 6
C60 C 6
C61 C 6
C62 C 6
C63 C 6
C64 C 6
C65 C 14
C66 C 4
C67 C 14
C68 C 4
C69 C 4
C70 C 4
C71 C 4
C72 C 4
C73 C 4
C74 C 12
C75 C 4
C76 C 4
C77 C 4
C78 C 4
C79 C 4
C80 C 4
4
C81 C 4
C82 C 4
C83 C 11
C84 C 4
C85 C 4
C86 C 11
C87 C 4
C88 C 4
C89 C 4
C90 C 4
C91 C 4
C92 C 4
C93 C 4
C94 C 4
C95 C 4
C96 C 4
C97 C 4
C98 C 4
C99 C 4
C100 C 4
C101 C 4
C102 C 4
C103 C 8
C104 C 4
C105 C 9
5
C106 C 4
C107 C 4
C108 C 4
C109 C 8
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEIN G PROVIDED 'AS IS'. TH E MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE M ATERIALS OR OT HERWISE, AND EXPRESSLY DISCLAI MS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.NAME
ABDFH
C110 C 12
C111 C 9
C112 C 4
C113 C 4
C114 C 4
C115 C 9
C116 C 4
C117 C 4
C118 C 4
C119 C 9
C120 C 4
C121 C 4
C122 C 4
C123 C 4
C124 C 4
C125 C 4
C126 C 15
C127 C 4
C128 C 9
C129 C 9
C130 C 15
C131 C_POLZ 15
C132 C 15
C133 C_POLZ 15
C134 C 15
C135 C 15
C136 C 15
C137 C_POLZ 15
C138 C 2
C139 C 15
C140 C 15
C141 C 2
C142 C_POLZ 15
C143 C 2
C144 C 2
C501 C 14
C502 C 7
C503 C 7
C504 C 7
C505 C 7
C506 C 7
C507 C 7
C508 C 7
C509 C 7
C510 C 7
C511 C 7
C512 C 7
C513 C 7
C514 C 7
C515 C 7
C516 C 7
C517 C 7
C518 C 7
C519 C 7
C520 C 7
C521 C 7
C522 C 7
C523 C 7
C524 C 7
C525 C 7
C526 C 7
C527 C 7
C528 C 7
C529 C 7
C530 C 7
C531 C 7
C532 C 14
C533 C 14
C534 C 14
C535 C 7
C536 C 7
C537 C 7
C538 C 7
C539 C 7
C540 C 7
C541 C 14
C542 C 7
C543 C 7
C544 C 7
C545 C 7
C546 C 7
C547 C 7
C548 C 7
C549 C 7
C550 C 14
C551 C 14
C552 C 3
C553 C 2
C554 C 3
C555 C 9
C556 C 5
C557 C 3
C558 C 3
C559 C 3
C560 C 3
C561 C 5
C562 C 5
C563 C 5
C564 C 5
C565 C 5
C566 C 5
C567 C 3
C568 C 3
C569 C 3
C570 C 3
C571 C 3
C572 C 3
C573 C 5
C574 C 5
C575 C 5
C576 C 5
C577 C 5
C578 C 5
C579 C 3
C580 C 3
C581 C 3
C582 C 3
C583 C 3
C584 C 3
C585 C 3
C586 C 3
C587 C 3
C588 C 3
C589 C 3
C590 C 3
C591 C 3
C592 C 3
C593 C 5
C594 C 2
C595 C 3
C596 C 3
C597 C 3
C598 C 3
C599 C 3
C600 C 3
C601 C 3
C602 C 3
C603 C 3
C604 C 5
C605 C 3
C606 C 3
C607 C 3
C608 C 2
C609 C 2
C610 C 5
C611 C 2
C612 C 2
C613 C 2
C614 C 2
C615 C 5
C616 C 3
C617 C 8
C618 C 9
C619 C 13
C620 C 3
C621 C 8
C622 C 3
C623 C 3
C624 C 13
C625 C 2
C626 C 2
C627 C 2
C628 C 2
C629 C 13
C630 C 2
C631 C 8
C632 C 3
C633 C 5
C634 C 5
C635 C 5
C636 C 5
C637 C 5
C638 C 3
C639 C 2
C640 C 2
C641 C 2
C642 C 2
C643 C 2
C644 C 8
C645 C 13
C646 C 13
C647 C 8
C648 C 8
C649 C 2
C650 C 8
C651 C 3
C652 C 3
C653 C 5
C654 C 5
C655 C 5
C656 C 5
C657 C 5
C658 C 3
C659 C 9
C660 C 2
C661 C 2
C662 C 2
C663 C 2
C664 C 9
C665 C 2
C666 C 2
C667 C 3
C668 C 3
C669 C 3
C670 C 3
C671 C 9
C672 C 9
C673 C 8
C674 C 2
C675 C 2
C676 C 9
C677 C 3
C678 C 3
C679 C 2
C680 C 2
C681 C 5
C682 C 9
C683 C 2
C684 C 12
C685 C 7
C686 C 2
C687 C 2
C688 C 2
C689 C 2
C690 C 2
C691 C 2
C692 C 8
C693 C 9
C694 C 2
C695 C 3
C696 C 9
C697 C 8
C698 C 8
C699 C 5
C700 C 2
C701 C 2
C702 C 2
C703 C 2
C704 C 2
C705 C 2
C706 C 2
C707 C 2
C708 C 2
C709 C 2
C710 C 2
C711 C 9
C712 C 9
C713 C 9
C714 C 2
C715 C 2
C716 C 9
C717 C 9
C718 C 2
C719 C 9
C720 C 9
C721 C 9
C722 C 2
C723 C 8
C724 C 5
C725 C 5
C726 C 5
C727 C 9
C728 C 5
C729 C 5
C730 C 5
C731 C 5
C732 C 5
C733 C 5
C734 C 5
C735 C 5
C736 C 5
C737 C 5
C738 C 5
C739 C 15
C740 C 15
C741 C 15
C742 C 2
C743 C 15
C744 C 2
C745 C 2
C746 C 2
C747 C 2
C748 C 2
C749 C 2
C750 C 2
C751 C 2
C752 C 2
C753 C 2
C754 C 2
C755 C 2
C756 C 2
C757 C 2
C758 C 2
C759 C 2
C760 C 2
C761 C 2
C762 C 2
C763 C 2
C764 C 2
C765 C 2
C766 C 2
C767 C 2
C768 C 2
C769 C 2
C770 C 2
C771 C 2
C772 C 2
C773 C 2
C774 C 2
C775 C 2
C776 C 2
C777 C 2
C778 C 15
CN1 CON_MXM_PCI_EXPRESS 2 10
D501 D_SCHOTTKY 14
D502 D_SCHOTTKY 14
D503 D_SCHOTTKY 15
D504 D_SCHOTTKY 15
D505 D_3PIN_AC 11
D506 D_3PIN_AC 11
L1 L 14
L2 L 15
LB501 L 3
LB502 L 3
LB503 L 3
LB504 L 3
LB505 L 8
LB506 L 8
LB507 L 9
LB508 L 9
LB509 L 2
LB510 L 2
LB511 L 2
ASSEMBLY
PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
LB512 L 8
LB513 L 9
LB514 L 9
LB515 L 9
LB516 L 9
MEC1 MOUNTING_HOLE 16
MEC2 MOUNTING_HOLE 16
Q1 Q_FET_N_ENH 14
Q501 Q_FET_N_ENH 14
Q502 Q_FET_N_ENH 14
Q503 Q_FET_N_ENH 14
Q504 Q_FET_N_ENH 15
Q505 Q_FET_N_ENH 15
Q506 Q_FET_N_ENH 15
R1 R 6
R2 R 6
R3 R 6
R4 R 6
R5 R 14
R6 R 6
R7 R 14
R8 R 14
R9 R 14
R10 R 14
R11 R 14
R12 R 14
R13 R 14
R14 R 14
R15 R 14
R16 R 15
R17 R 4
R18 R 14
R19 R 14
R20 R 14
R21 R 15
R22 R 11
R23 R 4
R24 R 11
R25 R 4
R26 R 11
R27 R 11
R28 R 16
R29 R 11
R30 R 11
R31 R 11
R32 R 11
R33 R 11
R34 R 16
R35 R 16
R36 R 16
R37 R 16
R38 R 8
R39 R 8
R40 R 13
R41 R 13
R42 R 13
R43 R 16
R44 R 4
R45 R 16
R46 R 16
R47 R 4
R48 R 9
R49 R 9
R50 R 9
R51 R 9
R52 R 9
R53 R 12
R54 R 9
R55 R 9
R56 R 9
R57 R 4
R58 R 4
R59 R 9
R60 R 4
R61 R 9
R62 R 4
R63 R 4
R64 R 9
R65 R 9
R66 R 15
R67 R 15
R68 R 9
R69 R 9
R70 R 9
R71 R 9
R72 R 15
R73 R 15
R74 R 15
R75 R 15
R76 R 15
R77 R 15
R78 R 15
R79 R 15
R80 R 15
R81 R 15
R501 R 6
R502 R 7
R503 R 7
R504 R 7
R505 R 7
R506 R 6
R507 R 6
R508 R 6
R509 R 6
R510 R 6
R511 R 6
R512 R 6
R513 R 6
R514 R 6
R515 R 6
R516 R 6
EGC
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
1
2
3
4
5
7-MAY-2004
Page 16
HGFEDCBA
R517 R 14
R518 R 14
R519 R 14
R520 R 14
R521 R 14
R522 R 14
R523 R 14
R524 R 4
1
R525 R 4
R526 R 4
R527 R 4
R528 R 14
R529 R 3
R530 R 3
R531 R 16
R532 R 16
R533 R 12
R534 R 11
R535 R 12
R536 R 12
R537 R 16
R538 R 16
R539 R 8
R540 R 8
R541 R 3
R542 R 11
R543 R 16
R544 R 16
R545 R 11
R546 R 16
R547 R 16
R548 R 8
2
R549 R 8
R550 R 8
R551 R 8
R552 R 11
R553 R 3
R554 R 3
R555 R 12
R556 R 8
R557 R 8
R558 R 16
R559 R 11
R560 R 16
R561 R 16
R562 R 16
R563 R 3
R564 R 5
R565 R 3
R566 R 13
R567 R 11
R568 R 5
R569 R 12
R570 R 8
R571 R 8
R572 R 13
R573 R 4
3
R574 R 4
R575 R 13
R576 R 4
R577 R 8
R578 R 8
R579 R 8
R580 R 16
R581 R 16
R582 R 16
R583 R 12
R584 R 8
R585 R 8
R586 R 16
R587 R 9
R588 R 5
R589 R 8
R590 R 8
R591 R 8
R592 R 8
R593 R 16
R594 R 5
R595 R 11
R596 R 9
R597 R 16
R598 R 16
4
R599 R 11
R600 R 2
R601 R 11
R602 R 12
R603 R 11
R604 R 15
R605 R 15
R606 R 15
R607 R 15
R608 R 15
R609 R 11
R610 R 15
R611 R 11
R612 R 11
R613 R 11
R614 R 11
R615 R 11
R616 R 11
R617 R 11
R618 R 11
R619 R 11
R620 R 11
R621 R 11
U1 U_VTTREG_LIN 15
U2 U_MEM_SD_DDR_X32 6
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEIN G PROVIDED 'AS IS'. TH E MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE M ATERIALS OR OT HERWISE, AND EXPRESSLY DISCLAI MS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.NAME
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
<edit here to insert page detail>
EGC
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
<CON_PAGE_NUM> OF <CON_TOTAL_PAGES>
DATE
1
2
3
4
5
7-MAY-2004
Page 17
U9A
U9A
BGA820_P10_33X33MM
BGA820_P10_33X33MM
COMMON
COMMON
1/14 PCI_EXPRESS
1/14 PCI_EXPRESS
CN1A
3V3RUN
C144
C144
C141
1
1V8RUN
PWR_SRC
C141
0.1U
0.1U
10V10V
C143
C143
0.1U
0.1U
10V
GND
C760
C760
0.1U
0.1U
25V25V
0603
0603
0.1U
0.1U
GND
C761
C761
0.1U
0.1U
0603
0603
2
GND
5VRUN
C742
C742
0.1U
0.1U
10V
3
GND
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
NVVDD = 2.0 * [RBnv/(RBnv + RTnv)]
NV43M
1.02V
1.08V
1.13V
1.21V
3.09K
4.75K|15.4K|28K
3.09K
4.75K|15.4K
3.09K
4.75K|28K
3.09K 4.75K
GPIO5
RBnvRTnv
GPIO6
High
High
Low
Low
High
Low
High
Low
ASSEMBLY
PAGE
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
<edit here to insert page detail>
EGC
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY
SANTA CLARA, CA 95050,
USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
NAME
<XR_PAGE_TITLE>
DATE
4
5
7-MAY-2004
Page 19
SC553
SC553
AL000553010
AL000553010
U12
R21
R21
*10K
*10K
GPIO3_PPEN
GND
GND
1
3
C1
C1
0.1U
0.1U
10%
10%
10
10
U12
SOT23-5
SOT23-5
SOT23_5
SOT23_5
COMMON
COMMON
IN
EN4ADJ
GND
FB_REF
R77
R77
10K
10K
1%
1%
FB_ILILM
R610
R610
10K
10K
1%
1%
GND
12MIL
5
OUT
C130
GND
C130
1U
1U
10
10
10%
10%
R72
R72
12.4K
GND
12.4K
1%
1%
R74
R74
10K
10K
1%
1%
2
TMDSPLLVDD_ADJ
10MIL
5VRUN
1V8RUN
3
TMDSPLLVDD
FB_REFIN
FB_OD
10MIL
GND
FB_FBLANK
FB_SKIP
GND
C741
C741
1U
1U
10
10
10%
10%
R607
R607
10K
10K
1%
1%
FB_VP
FB_TON
D
G
1
16MIL
S
2
20V
20V
3A
3A
0.080R
0.080R
20A
20A
0.5W@70C
0.5W@70C
+/-8V
+/-8V
SOT23
SOT23
Q504
Q504
BAM25020Z08
BAM25020Z08
IRLML2502
IRLML2502
FB_VCCA
AL001993013
AL001993013
U506
U506
VR_SW=0.7V...2.0V
VR_SW=0.7V...2.0V
MLFP24_4X4MM
MLFP24_4X4MM
COMMON
COMMON
22
3
24
1
2
4
23
21
13
6
C132
C132
0.1U
0.1U
10%
10%
10
10
5
10MIL
7
C134
C134
470P
470P
10%
10%
50
50
8
VCCA
LSAT
OVP/UVP
TON
FBLANK
PGOOD
SHDN
GATE
SKIP
REF
ILIM
REFIN
OD
R6720R6720
LVDSIOVDD
VDDP
VIN
BST
DH
LX
DL
CSP
CSN
OUT
FB
GND
EPAD
GND
2
4
1
U1
U1
35
TC7SH08FU
TC7SH08FU
2~5.5V
2~5.5V
AL07SH08C00
AL07SH08C00
GND
R606
GND
GND
R606
10K
10K
1%
1%
R76
R76
10K 1%
10K 1%
10MIL
10MIL
C743
C743
R75
R75
Rtop
470P
470P
649
649
10%
10%
1%
1%
50
50
R73
R73
8.45K
8.45K
RBot
1%
1%
R608
R608
442
442
1%
1%
R79
R79
*10K
*10K
1%
1%
3V3RUN
1
14<
10>
13<
15<
2
RUNPWROK
IN
14>
IN
3
3V3RUN
GPIO7_FBVDDCTL0
15>
IN
4
GND
R16
R16
R78*0R78
10K
10K
*0
GND
GND
FBVDDQ
C16
C16
1U
1U
10
10
10%
10%
GND
MAX8527
MAX8527
AL008526K01
2
3
4
5
14
1
6
7
R660R66
0
FB_BSTCAP
16MIL
no stuff under 2V memory
AL008526K01
U13
U13
TSSOP14-MAX852x
TSSOP14-MAX852x
XSOP14_PWR_P065W44MM
XSOP14_PWR_P065W44MM
COMMON
COMMON
IN
IN
IN
IN
NC
EN
8527 8528
8527 8528
POK
POR
D503
D503
RB551V-30
RB551V-30
SOD-323/SC76
SOD-323/SC76
500m
500m
LFPAK
LFPAK
C739
C739
0.1U
0.1U
10%
10%
10
10
LFPAK
LFPAK
C778
C778
1000P
1000P
+-5%
+-5%
50
50
R6050 R6 050
PEX1V2
PEX1V2=0.5*[1+RTop/RBot]
2AMPS
10
OUT
11
OUT
12
OUT
13
OUT
9
FB
8
GND
TP
EPAD
D
G
4
S
D
G
4
S
PEX1V2_ADJ
GND
PWR_SRC
5
Q506
Q506
SOT669_LFPAK
SOT669_LFPAK
COMMON
COMMON
1
2
3
5
Q505
Q505
SOT669_LFPAK
SOT669_LFPAK
COMMON
COMMON
1
30V
30V
55A
55A
2
4mR
4mR
220A
220A
30W@25C
30W@25C
3
+/- 15V
+/- 15V
HAT2165H
HAT2165H
BAM21650Z07
BAM21650Z07
GND
30V
30V
55A
55A
4mR
4mR
220A
220A
30W@25C
30W@25C
+/- 15V
+/- 15V
HAT2165H
HAT2165H
BAM21680Z03
BAM21680Z03
Rtop
R81
R81
11.2K
11.2K
1%
1%
R80
R80
8.06K
8.06K
1%
1%
RBot
GND
Change to BAM21680Z03
7.5AMPS
GND
GND
+
+
C140
C140
10U
10U
+ - 20%
+ - 20%
25
25
GND
C135
C135
22U
22U
+-20%
+-20%
10
10
D504
D504
RB551V-30
RB551V-30
SOD-323/SC76
SOD-323/SC76
500m
500m
1V8RUN
C139
C139
4.7U
4.7U
+-20%
+-20%
6.3
6.3
GND
5VRUN
C740
C740
1U
1U
10
10
10%
10%
PWR_SRC5VRUN
GND
19
14
FB_BST
17
16MIL
FB_DH
15
20MIL
FB_LX
16
FB_DL
18
20MIL
11
12
10
FB_FB
9
12MIL
20
25
GND
R604
R604
*2.05K
*2.05K
1%
1%
no stuff under 2V memory
GND
5
ASSEMBLY
PAGE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE
BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS
OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FO R A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE,
TRADE PRACTICE, OR INDUSTRY STANDARDS.
ABDFH
DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES
AND BOM NOT FINAL
<edit here to insert page detail>
EGC
PEX1V2 Rtop RBot
1.306V 13K 8.06K
+
+
C136
C136
FBVDD=2*[1+(RBot/(Rtop+RBot)] for
10U
10U
+ - 20%
+ - 20%
25
25
GND
L2
L2
1uH
1uH
6.8*6.5
6.8*6.5
+-20%
+-20%
CV-10B0MZ01
CV-10B0MZ01
<2V
GND
1.8V 976 8.45K
7.5AMPS
+
+
+
+
C137
C137
C133
C133
100U
100U
100U
100U
+-20%
+-20%
+-20%
+-20%
6.3
6.3
6.3
6.3
GND GND GND GND
HGFEDCBA
1
2
3
RBotRtopFBVDD
FBVDD
FBVDD
+
+
+
+
C142
C142
C131
100U
100U
+-20%
+-20%
6.3
6.3
C131
100U
100U
+-20%
+-20%
6.3
6.3
C126
C126
4.7U
4.7U
10%
10%
6.3
6.3
4
5
NVIDIA
2701 SAN TOMAS
CORPORATION
EXPRESSWAY
SANTA CLARA, CA 95050,
USA
600-10264-xxxx-vvv
NV_PN
IDPAGE
NAME
<CON_PAGE_NUM> OF
<CON_TOTAL_PAGES>
DATE
7-MAY-2004
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.