Sony KDL-26S4000, KDL-32S4000, KDL-37S4000 schematic

HISTORY

Model Name :
SERVICE MANUAL

Click on Page Number to display detail of changes.

Date Part Number Description of Revisions

Original Manual.

KDL-26/32/37S4000

Version

1.09-883-405-01 2008.07

SERVICE MANUAL

SE2AG

CHASSIS

MODEL

DEST

KDL-26S4000
KDL-32S4000
KDL-37S4000

OIRT / UK / WE

OIRT / UK / WE

OIRT / UK / WE

- 1 -

RM-ED009

FLAT PANEL COLOR TV

TABLE OF CONTENTS

Section Title Page Section Title Page

1. GENERAL ................................................................... 3

Caution................................................................ 3

Specifications ..................................................... 4

Connectors .......................................................... 5

Self Diagnosis..................................................... 7

2. DISASSEMBLY

2-1. Rear Cover Removal .......................................... 8

2-2. Stand Removal ................................................... 8

2-3. Loudspeaker Removal........................................ 8

2-4. Side Jack Bracket Assy Removal ...................... 8

2-5. BC1 Board Removal .......................................... 9

2-6. GA2 Board Removal (26/32 inches) ................. 9

2-7. GA3 Board Removal (37 inches)....................... 9

2-8. HM4/HM5 Board Removal................................ 9

4. DIAGRAMS

4-1. Block Diagram ................................................... 14

4-2. Circuit Board Location....................................... 15

4-3. Schematic Diagrams and Printed Wiring

Boards ................................................................. 15

BC1 Board Schematic Diagram ......................... 16

HM4 Board Schematic Diagram(26/32 inches) 28

HM5 Board Schematic Diagram(37 inches)...... 28

GA2 Board Schematic Diagram(26/32 inches) . 29

GA3 Board Schematic Diagram(37 inches) ...... 30

BC1 Printed Wiring Board................................. 32

HM4 Printed Wiring Board(26/32 inches) ........ 32

HM5 Printed Wiring Board(37 inches) ............. 33

GA2 Printed Wiring Board(26/32 inches) ......... 34

GA3 Printed Wiring Board(37 inches) .............. 36

3. ADJUSTMENTS

3-1. How to enter the Service Mode ........................ 10

3-2. TT Modes .......................................................... 12

3-3. TT OSD Labels ................................................. 13

5. EXPLODED VIEWS

5-1. Chassis ................................................................ 38

5-2. Beznet Assy ........................................................ 39

5-3. Rear Cover & Power Supply Cords ................... 40

6. ELECTRICAL PARTS LIST .................................. 41

WARNING !!

AN ISOLATION TRANSFORMER SHOULD BE USED DURING ANY
SERVICE W ORK TO AVOID POSSIBLE SHOCK HAZARD DUE TO
LIVE CHASSIS, THE CHASSIS OF THIS RECEIVER IS DIRECTLY
CONNECTED TO THE POWER LINE.

SAFETY-RELATED COMPONENT WARNING !!

COMPONENTS IDENTIFIED BY SHADING AND MARKED
THE EXPLODED VIEWS AND IN THE PARTS LIST ARE CRITICAL
FOR SAFE OPERATION. REPLACE THESE COMPONENTS WITH
SONY PARTS WHOSE PART NUMBERS APPEAR AS SHOWN IN
THIS MANUAL OR IN SUPPLEMENTS PUBLISHED BY SONY.

ON

- 2 -

SECTION 1 GENERAL

SECTION 1 GENERAL

CAUTION

Lead Free Soldered Boards

The circuit boards used in these models have been processed using
Lead Free Solder. The boards are identif ied by the LF logo located
close to the board designation e.g. F1, H1 etc [ see examples ]. The
servicing of these boards requires special precautions to be taken as
outlined below.

example 1

example 2

Lead Free Solder material must be used to comply with environmental requirements of new solder joints. Lead Free Solder is available under
the following part numbers :

rebmuntraP retemaiD skrameR

91-500-046-7mm3.0gK52.0
02-500-046-7mm4.0gK05.0
12-500-046-7mm5.0gK05.0
22-500-046-7mm6.0gK52.0
32-500-046-7mm8.0gK00.1
42-500-046-7mm0.1gK00.1
52-500-046-7mm2.1gK00.1
62-500-046-7mm6.1gK00.1

Due to the higher melting point of Lead Free Solder the soldering iron tip temperature needs to be set to 370 degrees centigrade. This requires
soldering equipment capable of accurate temperature control coupled with a good heat recovery characteristics.

For more information on the use of Lead Free Solder, please refer to http://www.sony-training.com

- 3 -

SPECIFICATIONS

Television System Channel Coverage Colour/Video System

Analogue:
Depending on your country/region
B/G/H, D/K, L, I

Digital:
DVB-T/DVB-C

LCD(Liquid Crystal Display) Panel

Picture Size

Input/Output Terminals [REAR] General Specifications

1: 21-pin Euro connector

(CENELEC standard)

2: 21-pin Euro connector

(CENELEC standard)

Approx 66.0cm (26 inches)
Approx 81.3cm (32 inches)
Approx 94.0cm (37 inches)

Inputs for Audio and Video signals.
Inputs for RGB.
Outputs of TV Video and Audio
signals.

Inputs for Audio and Video signals.
Inputs for RGB.
Outputs of Video and Audio signals
(Selectable). SmartLink interface.

Analogue: 48.25 - 855.25 MHz

Digital: VHF/UHF

Sound Output

Right and Left speaker 2 x 10W (RMS)

Power Requirements 220 - 240V

Power Consumption/
Standby

Dimensions

Weight

Analogue:
PAL, SECAM
NTSC 3.58/4.43 (Video in only)

Digita l:
MPEG-2 MP@ML

(26 inches):
Approx 61W/0.7W (Home mode)
Approx 87W/0.7W (Shop mode)
(32 inches):
Approx 86W/0.7W (Home mode)
Approx 129W/0.7W (Shop mode)
(37 inches):
Approx 106W/0.6W (Home mode)
Approx 155W/0.6W (Shop mode)

(26 inches):
Approx 675x511x242mm (With stand)
Approx 675x466x97mm (Without stand)
(32 inches):
Approx 809x584x242mm (With stand)
Approx 809x542x99mm (Without stand)
(37 inches):
Approx 931x655x279mm (With stand)
Approx 931x609x110mm (Without stand)

Approx 12.5kg (26 inches with stand)
Approx 10.0kg (26 inches without stand)
Approx 15.5kg (32 inches with stand)
Approx 13.0kg (32 inches without stand)
Approx 20.5kg (37 inches with stand)
Approx 17.5kg (37 inches without stand)

Supported formats:1080i, 720p,
576p, 576i, 480p, 480i

Component In

HDMI Inputs

PC Input
CAM Conditional Access Module

Input/Output Terminals [SIDE] Remote control system : Infrared control

Headphone jack Stereo mini jack
Audio input Phono jacks
Video input Phono jack

HDMI input HDMI Connector

Y:1 Vp-p, 75 ohms, 0.3V negative
sync
PB/CB:0.7 Vp-p, 75 ohms
PR/CR:0.7 V p-p, 75 ohms
Audio input:Phono jacks

Video:1080i, 720p, 576p, 576i,
480p, 480i
Audio:Two channel linear PCM
32, 44.1 and 48kHz,
16, 20 and 24 bits
Analogue audio input:Minijack
(HDMI IN 3 only)

Video:15 Pin D Sub Connector
Audio:Minijack

Design and specifications are subject to change without notice.

Other Features

Power requirements

Intergrated digital TV Tuner DVB-T/C, HD Ready,
High Picture Quality, Bravia Engine, Dynamic
Contrast, Virtual Dolby Surround, BBE-Viva,
PC Input, 3 HDMI Inputs.

3V dc
2 batteries IEC designation
R06 (size AA)

- 4 -

21 Pin Connector (SCART)

How to replace the fuse.
Open the fuse compartment with
a screwdriver blade and replace
the fuse.

FUSE

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

CONNECTORS

Pin No 1 2 Signal Signal level

1 Audio output B

2

3
4 Ground (audio)
5 Ground (blue)
6 Audio input A

7 Blue input 0.7 +/- 3dB, 75 ohms positive

8 Function select

9 Ground (green)
10 AVlink
11 Green Green signal : 0.7 +/- 3dB, 75 ohms,

12 Open
13 Ground (red)
14 Ground (blanking)

_ _ Red input 0.7 +/- 3dB, 75 ohms, positive

15

_ (S signal Chroma

-

16 Blanking input

17 Ground (video

18 Ground (video

19 Video output 1V +/- 3dB, 75ohms, positive sync 0.3V

Video input 1V +/- 3dB, 75ohms, positive sync 0.3V

20

--

21 Common ground

(right)
Audio input B

(right)
Audio output A

(left)

(left)

(AV control)

-

input)

(Ys signal)

output)

input)

Video input

Y (S signal)

(plug, shield)

Standard level : 0.5V rms
Output impedence : Less than 1kohm*

Standard level : 0.5V rms
Output impedence : More than 10kohm*

Standard level : 0.5V rms
Output impedence : Less than 1kohm*

Standard level : 0.5V rms
Output impedence : More than 10kohm*

High state (9.5-12V) : Part mode
Low state (0-2V) : TV mode
Input impedence : More than 10K ohms
Input capacitance : Less than 2nF

positive

0.3 +/- 3dB, 75 ohms, positive

High state (1-3V) Low state (0-0.4V)
Input impedence : 75 ohms

(-3+10dB)

(-3+10dB)
1V +/- 3dB, 75ohms, positive sync 0.3V

(-3+10dB)

UK PLUG W ARNING

WARNING (UK Models only)

The flexible mains lead is supplied connected to a B.S. 1363 fused
plug having a fuse of the correct rating for the set. Should the fuse
need to be replaced, use a fuse of the same rating approved by ASTA
to BS 1362, ie one that carries the

IF THE PLUG SUPPLIED WITH THIS APPLIANCE IS NOT SUITABLE
FOR THE OUTLET SOCKETS IN YOUR HOME, IT SHOULD BE CUT
OFF AND AN APPROPRIA TE PLUG FITTED. THE PLUG SEVERED
FROM THE MAINS LEAD MUST BE DESTROYED AS A PLUG WITH
BARED WIRES IS DANGEROUS IF ENGAGED IN A LIVE SOCKET .

When an alternative type of plug is used, it should be fitted with the
correct rating fuse, otherwise the circuit should be protected by the
same rating fuse at the distribution board.

ASA

T

mark.

- 5 -

Connected Not Connected (open) * at 20Hz - 20kHz

HDMI Connector

1

15 Pin D Sub Connector (PC)

Pin No Signal Assignment Pin No Signal Assignment

1 TMDS Data2+ 11 TMDS Clock Shield

2 TMDS Data2 Shield 12 TMDS Clock-

3 TMDS Data2- 13 CEC

4 TMDS Data1+ 14 Reserved (N.C. on device)

5 TMDS Data1 Shield 15 SCL

6 TMDS Data1- 16 SDA

7 TMDS Data0+ 17 DDC/CEC Ground

8 TMDS Data0 Shield 18 +5V Power

9 TMDS Data0- 19 Hot Plug Detect

10 TMDS Clock+

Pin No Signal Assignment Pin No Signal Assignment

1 Red Out 9 +5V DC

2 Green Out 10 Sync Return (Ground)

3 Blue Out 11 Monitor ID0 in Display

4 Unused 12 DCC Seri al Data

5 Ground 13 Horizontal Sync

6 Red Return 14 Vertical Sync

7 Green Return (Ground) 15 DCC Ser ial Clock

8 Blue Return (Ground)

Rear Connection Panel Side Connection Panel

- 6 -

SE2AG SELF DIAGNOSTIC SOFTWARE

The identification of errors within the SE2AG chassis is triggered in one of two ways :- 1: Busy or 2: Device failure to respond to IIC. In the
event of one of these situations arising the software will f irst try to release the bus if busy (Failure to do so will report with a continuous
flashing LED) and then communicate with each device in turn to establish if a device is faulty. If a device is found to be faulty the relevant
device number will be displayed through the LED (Series of flashes which must be counted).

LED Error Codes

Number of LED

Flashes

02 Balancer error. In normal mode. Goes into standby.
03 DC error. In normal mode. Goes into standby.
04 Inverter error. In normal mode. Goes into standby.
05 NVM error. In initialisation state. Goes into standby.
06 IIC error. In nor mal mode. Goes into standby.
07 HDMI error. In normal mode. Adds error to error menu.
08 Digital error. In normal mode. Adds error to error menu.
09 Tuner error In initialisation state. Adds error to error menu.
10 SP error In initialisation state. A dds error to error menu.
13 RTC error In initialisation state. Adds error to error menu.

Error Description Checked Action

- 7 -

SECTION 2 DISASSEMBLY

2-1. Rear Cover Removal

11

=>

=>

1

=>

1

=>

1

1=>

1

T o remove the ‘Rear co ver’ remov e the 22 fixing scre ws indicated
and pull the rear cover gently backwards away from the TV set.

Screw Part number(s) and Description(s)

1) 2-580-640-01 SCREW, +BVTP2 4X16

2) 7-685-648-79 SCREW, +BVTP 3X12 TYPE2 IT-3

3) 2-580-607-01 SCREW, +PSW M5X12

=>

=>

3

1

3

=>

=>

=>

1

1

=>

=>

=>

3

=>

2

=>

=>

1

3

=>

=>

1

1

=>

1

=>

1

2-2. Stand Removal

=>

1

=>

=>

1

=>

=>

T o remove the ‘Stand’ remove the 3 fixing screws indicated.

Screw Part number(s) and Description(s)

2-580-608-01 SCREW, +PSW M5X16

=>

=>

2-3. Loudspeaker Removal

T o remove the ‘Loudspeaker’ disconnect the speaker cab les and then
pull the loudspeaker gently backwards away from the back of the TV
set.

2-4. Side Jack Bracket Assy Removal

Clips

T o remove the ‘Side jack bracket assy’ release the 2 clips circled.

- 8 -

2-5. BC1 Board Removal

2-6. GA2 Board Removal (26/32 inches)

Screws

To remo ve the ‘BC1’ board disconnect all connectors and then remo ve
the 6 screws circled and ease the board gently away from the back of the
TV set.

Screw Part number(s) and Description(s)

2-580-629-01 SCREW, +BVST 3X8

2-7. GA3 Board Removal (37 inches)

Screws

T o remove the ‘GA2’ board disconnect all connectors and then remov e
the 4 screws circled and ease the board gently away from the back of the
TV set.

Screw Part number(s) and Description(s)

2-674-965-41 SCREW, +PSW 3SG

2-8. HM4/HM5 Board Removal

Screws

T o remove the ‘GA3’ board disconnect all connectors and then remov e
the 8 screws circled and ease the board gently away from the back of the
TV set.

Screw Part number(s) and Description(s)

2-580-629-01 SCREW, +BVST 3X8

Clips

To remove either the ‘HM4’ or ‘HM5 board firstly remove the loud­speaker and then release the 2 clips circled, disconnect the connector
and ease the board gently away from the TV set.

- 9 -

SECTION 3 ADJUSTMENTS

3-1. How to enter the Service Mode

Service adjustments to this model can be performed using the
supplied remote commander RM-ED009.

BACKLIGHT

1. Turn on the power to the TV set and enter into the stand-by
mode.

2. Press the following sequence of buttons on the remote
commander.

+

i+

(ON SCREEN (DIGIT 5) (VOLUME +) (TV)
DISPLAY)

5

+

TV

I/

‘TT—’ will appear in the upper right corner of the screen.
Other status information will also be displayed (See 3-3 page

13).

3. Press ‘MENU’ on the remote commander to obtain the
following menu on the screen.

BACKLIGHT
HDMI
SOUND
IF ADJUST
PANEL TEMP
GAMMA CORR
ERROR MENU

SE2AG v3.22 Jul08
FACTORY DATA: 11111111
SERIAL NUMBER: 4294967295
WORKING TIME: 19:16

4. Move to the corresponding adjustment item using the
up or down arrow b uttons on the Remote Commander.

5. Press the right arrow button to enter into the required menu
item.

6. Press the ‘Menu’ button on the Remote Commander to quit
the Service Mode when all adjustments have been completed.

Note :

• After carrying out the service adjustments, to prevent the
customer accessing the ‘Service Menu’ switch the TV set

OFF and then ON again.

BACKLIGHT
U BACKLIGHT
BL SETUDEN
BL BOTTOM
ECO MODE
APL MAX
DIMMER MIN
AFC FACTOR
OSD CONTR MIN
S BLACK OUT
S BLACK ENTER
S BLACK EXIT
S BLACK STEP
DIMMER
APL MIN

HDMI

VAI2
VAI3
Vper MSB
Vper LSB
Hper MSB
HS Width MSB
STM LSB
Ri (MSB)
Ri (LSB)
Aksv_0
Aksv_1
Aksv_2
Aksv_3
Aksv_4
An_0
An_1
An_2
An_3
An_4
An_5
An_6
An_7
Pj
Ainfo
Flags

(0, 255)
(0, 10)
(0, 255)
(0, 255)
(0, 1)
(0, 255)
(-128,+127)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)

(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)

235
10
38
92
1
140

-32
0
40
39
20
50
1
186
103

0
0
3
31
0
0
176
218
101
0
0
0
0
0
0
0
0
0
0
0
0
0
202
0
6

- 10 -

SOUND

PA NEL TEMP

Lineout offset
M-N
M-D
M-S
S-M
D-M
N-M
Effect Mode
BBE Mode
BBE Vol main
BBE Vol res
B1
B2
B3
B4
B5
Loudness
MB_STR
MB_LIM
MB_HMC
MB_LP
MB_HP
SUBW_FREQ
NICAM C AD
NICAM Error
Stereo

Status 0000000110

IF ADJUST

Automute
Audio G a i n
L Gating
Coincidence
AFT wind ow
AFT Status
AGC TOP (-16, +15)

(-80, +40)
(0, 511)
(-128, -1)
(+0, +127)
(+0, +127)
(-128, -1)
(0, 1023)
(+0, +2)
(-0, +127)
(+0, +255)
(+0, +7)
(-96, +96)
(-96, +96)
(-96, +96)
(-96, +96)
(-96, +96)
(+0, +68)
(+0, -127)
(-32, +0)
(+0, +127)
(+5, +30)
(+3, +30)
(+5, +40)

(0, 2047)
(-128, +127)

00000

0
0
0
0

1

0111

+0

+8
192

-20
+20
+10

-10
496
+1
+0
+3
+0
+8
+2

-12

-12
+6
+23
+0
+0
+0
+5
+3
+5

2047
+0

TEMP LM75
TEMP ADC

GAMMA CORR

GAMMA CORR (0, 125) 0

(0, 125)
(0, 125)

ERROR MENU

E02: BALANCER
E03: DC Fail
E04: INVERTER
E05: NVM
E06: IIC
E07: RESERVED
E08: DIGITAL
E09: TUNER
E10: SP
E13: RTC

(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)
(0, 255)

WORKING TIME
HOURS
MINUTES

(0, 65535)
(0, 59)

38
35

0
0
0
0
0
0
0
0
0
0

0
0

- 11 -

3-2. TT MODES

TT mode is available by setting the TV for operation in Service Mode [ As sho wn on P age 10 ] , OSD ‘TT’ appears. The functions described
below are available by selecting the two number s. To release the ‘Test mode 2’, press 00, 10, 20 ... twice or switch the TV set into Stand-by
mode. In ‘TT Menu’ mode, it is possible to remove the Menu from the screen by pressing the Speaker Off button once. Pressing the Speaker
OFF button a second time will cause the Menu to reappear . The function is kept e ven when the menu is not displayed on screen !!.

'TT' mode off

00

Set volume to 35%

03
04 Set volume to 50%

Set volume to 65%

05

Set volume to 80%

06

Ageing mode on

07

Shipping Condition

08

WB adj initial conditions

09

Teletext centered

14
16 Picture level 50%

Factory toggle mode (on/off)

19

Panel detection toggle (on/off)

21
27 CBA mode toggle (ON/OFF)

ECS mode toggle (ON/OFF)

31

Set BCN channels preset

32

Connect/Disconnect EDID write o general I2C bus

33

HDMI log enable/disable

34

Gamma correction enable/disable

36

Enable Digital Test

39
41 Re-initialise NVM

Select Dual Sound "A"

43

Select Dual Sound "B"

44
45 Select Dual Sound "Mono"

Select Dual Sound "Stereo"

46

Set NVM as non-virgin

48

Set NVM as virgin

49

SuperBlack Algorithm enable/disable

51

Panel temperature algorithm enable/disable

52

Digital/Analog model

53

Watchdog toggle

54

Audio delay toggle

55

Set Bravia Model enable/disable

56
57 MSP Auto Carrier Mute function enable/disable

Chip select toggle

58

Visual I2C toggle

59

Set 26" WXGA settings

65

Set 32" WXGA settings

66

Set 37" WXGA settings

67

Auto AGC

71

AM from baseband (AFRIC dem) or fromRF (MSP

72

dem)
HDMI number of inputs (0 to 3)

73

DDC enable

74
75 Set centred balance

Set volume to max

76

Set volume to min

77

Set balance full left

78
79 Set balance full right

Digital BER display

81

Digital Service menu

82

Digital colour bar output from DENC

83

TS CI path through

84

Digital tuner power down (Only 1 power cycle,default

85

is no power down)
Switch between two digital SW banks

86

Local keys test

87

Digital shipping conditions (Clear tune database)

88

LED test

89

OAD enable/disable toggle

91

TS CI path through with Reed Solomon off

92

Spread spectrum toggle

94
96 Digital debug output enable/disable

Digital 656 output enable/disable

97

Digital auto reset function enable/disable

98

Display error and working time menu

99

- 12 -

3-3. TT OSD Labels

(1)

32
ECS
DDC

(13)

-

Key:

1. Panel size configuration. Changed by TT61...TT68.

2. D/A: D is shown when Digital mode is enabled; A is shown when Analogue mode is enabled. Changed by TT53.

3. TT -- Command prompt.

4. ECS/---: ECS enabled/disabled (TT31).

5. CBA/--: CBA is shown when the TV set is in CBA mode (This mode is available from Factory mode TT19). Changed by TT27.

6. Norm/Fact: Normal or Factory mode. Changed by TT19.

7. DDC/---: DDC enabled/disabled. Changed by TT74.

8. 3/2/1/0: 3, 2, 1, or 0 HDMI inputs toggle. Changed by TT73.

9. E/-: E is shown when EDID WP is enabled; - is shown otherwise. Changed by TT33.

10. N/A: Previously used to indicate Monitor, Hotel, or Otrum mode is enabled.

11. C/-: C (Default value) is shown w hen MSP Auto Carrier Mute function is enabled; - is shown otherwise. Changed by TT57.

12. M/A: M (Default value) is shown when AM sound is demodulated in MSP; A is shown when AFRIC demodulator is used. Changed by
TT72.

13. N/A: Previously used to indicate Clk enabled.

14. T/-: T is shown when digital test is enabled; - is shown otherwise. Changed by TT39.

15. W/-: W is shown when watchdog is enabled; - is shown otherwise. Changed by TT54.

16. C/-: C is shown when chip select is enabled; - is shown instead. This mode is only available in factory mode. Changed by TT58.

17. V/-: V is shown when visual I2C is enabled; - is shown otherwise. Changed by TT59.

18. D/-: D is shown when audio delay is enabled; - is shown otherwise. Changed by TT55.

19. K/-: K is shown when spread spectrum is enabled; - is shown otherwise. Changed by TT94.

20. B/-: B is shown for BRAVIA models; -is shown otherwise. This mode is only av ailable in factory mode. Changed by TT56.

21. T/-: T is shown if temperature algorithm is enabled; - is shown otherwise. Changed by TT52.

22. L/-: L is shown when HDMI log is enabled; - is shown otherwise. Changed by TT34.

23. X/-: X is shown when teletext is centered (Default value); - is shown otherwise. Changed by TT14.

24. B/-: B is shown when SuperBlack algorithm is enabled; - is shown otherwise. Changed by TT51.

25. D/-: D is shown when Panel detection is enabled; - is shown otherwise. Changed by TT21.

26. G/-: G is shown when Gamma correction is enabled; - is shown otherwise. Changed by TT36.

(4)

CBA

(7)

3

T

(8)

(14)

E

W

"

(5)

(9)

(15)

D
B
T
C

(2)

(20)

(21)

(16)

D

V

G
B

(3)

(6)

(26)

(24)

TT- -

(25)

(10)

-

(17)

C
D

(11)

(18)

No rm

(12)

M

K

(19)

L

X

(22)

(23)

- 13 -

4-1. BLOCK DIA GRAM

CAM MODULE

MS CONNECTOR

C

I

CONTROL

C
O
N
N
E
C
T
O
R

DIGITAL IF

DIGITAL DECODER BLOCK

CONTROL

TS

TS

CXD 1978

TS

OFDM IC

DDR-SDRAM

256 Mbit *(128Mbit)

TS

(16M x 16)

MPEG2 decoder

EMMA2LR

FLASH MEMORY

128Mbit (32M x 8)

L/R DIGITAL

RGB1

H3, SIRCS, LED,

H1, SWITCH-BUTTONS

LUMINISPONDER

2

DIGITAL CVBS

ITU656

VCT-PRO

A/V switch

Color Decoder

3D Comb

PC/HD ADC

Audio Dig Decoder

Audio Delay

I/P conversion

Scaler

NR

LVDS / TTL

P
A
N
N
E
L

FRONT

TU_CVBS / QSS
SCART1_CVBS
YUV COMPONENT

PC_RGB, H, V

RGB1 / FRONT

SCART2_CVBS

RGB2

Histogram

TV control
OSD insertion
TXT Decoding

L/R FRONT

HDMI 1

DIGITAL HDMI

I2S

L/R LINE

TUVIF Tuner

HDMI 2

SIL9021CTU

LINE OUT

HDMI 3

3 x HDMI decoder

SDRAM MEMORY
128Mbit ( 32 bits)

L/R IN

FRONT

L/R IN

L/R IN

S

CVBS_1

C
A
R

L/R OUT

T

L/R IN

1

S
C

CVBS_2

A
R
T

L/R OUT

L/R IN

L/R PC

L/R HDMI

2

PC

AUDIO AMPLIFIER

POWER SUPPLY

NJM3414

HP AMP

HP

COMPONENT

B1 & B2 BOARDs

SPEAKERS

G2, G3 BOARD

- 14 -

4-2. CIRCUIT BO ARD LOCA TION

5-2. CIRCUIT BOARD LOCATION

Reference Information

C

C

N

VM

CVM Board

H

D1

HM4/HM5

4-3. SCHEMA TIC DIA GRAMS AND

5-3. SCHEMATIC DIAGRAMS AND

PRINTED WIRING BOARDS

PRINTED WIRING BOARDS

Note :

• All capacitors are in µF unless otherwise noted.

• pF : µµF 50WV or less are not indicated except for
electrolytic types.

• Indication of resistance, which does not have one for
rating electrical power, is as follows.

Pitch : 5mm
Electrical power rating : 1/4W

• Chip resistors are 1/10W

• All resistors are in ohms.
k = 1000 ohms, M = 1000,000 ohms

• : nonflammable resistor.

• : fusible resistor.

• : internal component.

• : panel designation or adjustment for repair.

• All variable and adjustable resistors have
characteristic curve B, unless otherwise noted.

• All voltages are in Volts.

• Readings are taken with a 10Mohm digital mutimeter.

• Readings are taken with a color bar input signal.

• Voltage variations may be noted due to normal production
tolerences.

•: B + bus.

A

A Board

D

S1 Board

D2

GA2/GA3

A

BC1

J

A1

A2

RESISTOR RN

RC
FPRD
FUSE
RS
RB
RW

COIL LF-8L
CAPACITOR TA

PS
PP
PT
MPS
MPP
ALB
ALT
ALR

Note :

The components identified by shading
and marked are critical for safety.
Replace only with the part numbers
specified in the parts list.

Note :

Les composants identifiés par une trame et
par une marque sont d'une importance
critique pour la sécurité. Ne les remplacer
que par des pièces de numéro spécifié.
specified.

Note :

The components identified by mark
confidential information.
Strictly follow the instructions whenever the
components are repaired and/or replaced.

: METAL FILM
: SOLID
: NON FLAMMABLE CARBON
: NON FLAMMABLE FUSIBLE
: NON FLAMMABLE METAL OXIDE
: NON FLAMMABLE CEMENT
: NON FLAMMABLE WIREWOUND
: ADJUSTMENT RESISTOR

: MICRO INDUCTOR
: TANTALUM
: STYROL
: POLYPROPYLENE
: MYLAR
: METALIZED POLYESTER
: METALIZED POLYPROPYLENE
: BIPOLAR
: HIGH TEMPERATURE
: HIGH RIPPLE

contain

• : B - bus.

• : RF signal path.

• : earth - ground.

• : earth - chassis.

Note: Schematic dia grams are for reference onl y . Please refer to the electrical parts list for
the correct value and part number of components.

- 15 -

ABC D EF G H JIKLMN

O

P

QRST UVWXY AA

Z

DDCCBB

EE

FF

10

11

12

13

14

1

1

BC1 - SE2AG

SCL_EMMA

SDA_DIGIT AL

SDA_EMMA

SCL_DIGITAL

2

2

3.3V_MAIN

VAY

JL7122

AA13

AA13

VAC

Y12

Y12

VA CVBS

FE_CVBS

NOTE RESISTORS R7153..R7158 ARE 0.5% TOLERANCE

C7132

10p

R7141

200

R7142

XX

R7143

XX

W13

W13

VREF1

GND_1

Y11

Y11

VREF0

FE_+1V5

R7144

Y13

Y13

RSET1

330

0uH

FB7117

C7136

0.1

C7137

0.1

W11

W11

RSET0

R7145

680

C7135

4.7

THESE CAPA CIT ORS

R7147

0

R7148

470

V14

V14

AVDD V

W14

TO BE PLACED

W14

UNDERNEATH BGA

Y14

AVDD V

GND_1

Y14

AVDD V

AA14

AA14

EMI

FL7100

AVDD V

3.3V_MAIN

16V

C7142

10

C7147

XX

C7145

0.1

NMI/EDINT

TEST / GND

GND_1

THIS CAP ACITOR TO BE

JTCK
JTDI
JTDO
JTMS

JTRST

AGNDV
AGNDV
AGNDV
AGNDV

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

AGNDP

PLACED UNDERNEA TH BGA

FE_JTCK

AA9

FE_JTDI

W8

FE_JTDO

W9

FE_JTMS

Y9

FE_JTRST

AA10

FE_NMI_EDINT

V10

W10

V13
U13
U12
U11

N13
N12
N11
N10
N9
M13
M12
M11
M10
M9
L13
L12
L11
L10
L9
K13
K12
K11
K10
K9
J13
J12
J11
J10
J9

17 J9 J10 J11 J1 2 J13 K9 K10 K11 K12 K13 L9 L10 L11 L12 L13 M9 M10 M11 M12 M13 N9 N10 N11 N12 N13 U11 U12 U13 V13 W10 V10 AA10 Y9 W9 W8 AA9

M17

M

GND_1

3

4

5

FE_JTCK,FE_JTDI,FE_JTDO,FE_JTMS,FE_JTRST,FE_NMI_EDINT

6

7

8

9

10

11

12

13

14

RESERVED FOR HI_RES GRAPHICS

NOTE SYMBOL

0uH

FE_ABCK,FE_ADO,FE_ALRCK,FE_AMCK

3

4

5

EMI

FL7104

FE_+1V5

C7148

XX

4.7

C7101

C7104

0.1

C7105

0.1

C7106

XX

C7100

GND_1

3.3V_MAIN

FE_TXD0B

JL7102

JL7103

R7104100

FE_RXD0B

JL7105

SIGN14971

FE_TXD1B

FE_RXD1B

R7106100

5%47R7158

5%47R7159

5%47R7160

1/16WCHIP

1/16WCHIP

FE_M_SYNC

1/16WCHIP

5%47R7161

1/16WCHIP

CI2_VS1B

CI2_RSTB

TP7100

TP7101

nCI2_TSEN

CI2_IREQB

TP7103

TP7102

GND_1

7

10k

RB7106

2143658

FE_MS_BS

FE_MS_DAT[0]

FE_MS_CLK

FB7105 0uH

FB7104 0uH

TP7104

TP7105

100

RB7100

FB7106 0uH

TP7106

2143658

FB7107

TP7107

7

R7111

4.7k

R7112

4.7k

FE_FTV_CONFIG2

3.3V_MAIN

FE_FTV_CONFIG0

FE_FTV_CONFIG1

TP7112

SIGN14994

FE_MS_INS

CI2_CD1B

TP7115

SIGN14979

TV_DEM_SEL

RB7101 10k

3.3V_MAIN

FE_NCI1_OVR

FE_NCI_EN

R7115 47

FE_AMCK

FE_CI1_PWR_EN

47

RB7103

R7116 47

FE_ADO

FE_ABCK

2143658

FE_ALRCK

7

JL7107

SIGN14984

JL7109

FE_NDEMOD_RESET

FE_LNA_SWB

TP7119

47

47

R7126

R7127

DIG_OSD_STATUS

JL7110

TP7120

FE_JIG_MODE

JL7111

TP7121

TP7122

TP7123

TP7124

TP7125

TP7126

5%

CHIP

1/16W

100

R7149

R’S AND FB’S DOUBLE MACRO

VDO[7]

VDO[6]

VDO[5]

VDO[4]

VDO[3]

VDO[2]

5%

CHIP

1/16W

100

R7152

5%

CHIP

1/16W

100

R7150

XX

FB7108

5%

CHIP

1/16W

FB7109 XX

100

R7151

XX

FB7110

5%

CHIP

1/16W

100

R7153

FB7111 XX

5%

CHIP

1/16W

100

R7154

XX

FB7112

FB7113

XX

VDO[1]

5%

CHIP

1/16W

100

R7156

XX

FB7114

5%

CHIP

1/16W

100

R7155

VDO[0]

XX

VDCLK

FB7115

XX

FB7116

0.1

C7107

6

0.1

C7108

R17

R17

P21

P21

R20

R20

R21

R21

T20

T21

U18

U19

U20

T20

T21

U18

U19

U21

U20

AA3

U21

0.1

C7109

0.1

C7110

7

8

9

THESE CAP ACIT ORS TO BE PLA CED UNDERNEATH BGA

0.1

U16
U15
U14
U10
U9
U8
U7
T5
R5
P17
P5
N5
M5
L17
L5
K17
K5
J17
J5
H17
H5
E16
E15
E14
E7
E6

E13
E12
E11
E10
E9
E8

U17
U6
U5
T17
G17
G5
F17
F5
E17
E5

VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1

VDD2
VDD2
VDD2
VDD2
VDD2
VDD2

VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3

E5 E17 F5 F17 G5 G17 T17 U5 U6 U17 E8 E9 E10 E11 E12 E13 E6 E7 E14 E15 E16 H5 H17 J5 J17 K5 K17 L5 L17 M5 N5 P5 P17 R5 T5 U7 U8 U9 U10 U14 U15 U16

VDD3

VDD3_USB

USB_DP1

USBCLKI / PPORT105

USB_DP0

USB_DN1

USB_DN0

USB_PPON1 / PPORT109

USB_OCI1 / PPORT108

USB_PPON0 / PPORT107

USB_OCI0 / PPORT106

AA3

MSDATA3 / PPORT127

W4

Y4

W4

MSDATA2 / PPORT126Y4MSDATA1 / PPORT132

W3

W3

V5

V5

MSDIO/DATA0 / PPORT131

Y3

Y3

MSDIR / PPORT128

AA2

AA2

MSBS / PPORT130

MSCLK / PPORT129

V15

V15

AA1

AA1

TXD0B / CAP/COMP0 / PPORT110

W15

W15

RXD0B / CAP/COMP3 / PPORT137

Y15

Y15

CTS0B / CAP/COMP1 / PPORT111

RTS0B / CAP/COMP2 / PPORT112

AA5

AA5

TXD1B

AA6

AA6

RXD1B

B5

B5

C5

RTS1B_B / STP0_STRT / PPORT10

C5

M19

CTS1B_B / STP0_ERRB / PPORT11

M19

L20

DCD1B / PPORT55

L20

RI1B / PPORT54

W19

AA19

W19

AA19

TXD2B / PPORT14

RXD2B / PPORT13

VDO_VHSB /

VDO_VVSB /

T19

T18

N21

P20

N18

L21

N18

TXD3B / PPORT53

L21

RXD3B / PPORT52

Y8

AA8

Y7

AA8

SCL1

AA7

Y7

SDA0

Y8

SDA1

AA7

SCL0

P19

P19

R18

R18

N20

SDIN / PPORT44

N20

SDOUT / PPORT45

V18

V18

P18

IR_IN_1 / PPORT47

P18

W18

IR_IN_0 / PPORT51

W18

IR_OUT / PPORT48

T19

SMRST0 / PPORT39

T18

N21

P20

R19

SCKINOUT / PPORT46

OFF0 / DCD0B / PPORT41

CMDVCC0 / RI0B / PPORT40

SMCLK0 / DTR0B / PPORT42

R19

SMDAT0 / DSR0B / PPORT43

V9

W7

V9W7Y6

AO1_DAT / PPORT125

AO1_LRCK / PPORT123

Y6

V8

V8

AO1_BCK / PPORT124

AO1_MCK / PPORT122

W6

W6

AO0_DA T

Y5

AA4

Y5

AA4

AO0_BCK

AO0_LRCK

W5

W5

AO0_MCK

A17

C18

B21

A21

B20

A20

A19

V6

D20

F19

F18

E21

E19

H21

E20

M18

N19

V6

D20

F19

F18

E21

E19

H21

E20

E18

N19

M18

E18

B17

C17

D17

D21

M20

B17

C17

D17

D21

K21

K21

M20

C18

A17

B21

A21

B20

B18

A18

G20

G19

G18

F21

D18

C21

C20

C19

K18

J21

J20

J19

H20

H19

H18

G21

J18

F20

D19

B19

L19

L18

K20

J21

J20

B18

A20

A19

A18

G20

G19

G18

F21

D18

C21

C20

C19

K18

J19

H20

H19

H18

G21

J18

F20

D19

B19

K19

L19

L18

K20

V21

V20

W21

W20

Y21

Y20

AA21

K19

V21

V20

W21

W20

AA20

Y21

Y20

AA20

AA21

ATX

PAR / PPORT56

FRAMEB / PPORT57

IRDYB / PPORT58

TRD YB / PPOR T59

STOPB / PPORT60

IDSEL / PPORT61

DEVSELB / PPORT62

REQB0 / PPORT63

GNTB0 / PPORT64

PERRB / PPORT65

VDOE_VCK_IN / AD1 / PPORT70

VDOE_VVSB_IN / AD2 / PPORT71

VDOE_VHSB_IN / AD3 / PPORT72

VDOE_VCK / SERRB / PPORT66

VDOE_VVSB_OUT / INTAB / PPORT67

VDOE_VHSB_OUT / PCICLK / PPORT68

VDOE_FLD / AD0 / PPORT69

VDOE_A7 / AD11 / PPORT80

VDOE_A6 / AD10 / PPORT79

VDOE_A5 / AD9 / PPORT78

VDOE_A4 / AD8 / PPORT77

VDOE_A3 / AD7 / PPORT76

VDOE_A2 / AD6 / PPORT75

VDOE_A1 / AD5 / PPORT74

VDOE_A0 / AD4 / PPORT73

VDOE_R7 / AD19 / PPORT88

VDOE_R6 / AD18 / PPORT87

VDOE_R5 / AD17 / PPORT86

VDOE_R4 / AD16 / PPORT85

VDOE_R3 / AD15 / PPORT84

VDOE_R2 / AD14 / PPORT83

VDOE_R1 / AD13 / PPORT82

VDOE_R0 / AD12 / PPORT81

VDOE_G7 / AD27 / PPORT96

VDOE_G6 / AD26 / PPORT95

VDOE_G5 / AD25 / PPORT94

VDOE_G4 / AD24 / PPORT93

VDOE_G3 / AD23 / PPORT92

VDOE_G2 / AD22 / PPORT91

VDOE_G1 / AD21 / PPORT90

VDOE_G0 / AD20 / PPORT89

VDOE_B7 / CBE3 / PPORT104

VDOE_B6 / CBE2 / PPORT103

VDOE_B5 / CBE1 / PPORT102

VDOE_B4 / CBE0 / PPORT101

VDOE_B3 / AD31 / PPORT100

VDOE_B2 / AD30 / PPORT99

VDOE_B1 / AD29 / PPORT98

VDOE_B0 / AD28 / PPORT97

VDO0_D7 / PPORT23

VDO0_D6 / PPORT22

VDO0_D5 / PPORT21

VDO0_D4 / PPORT20

VDO0_D3 / PPORT19

VDO0_D2 / PPORT18

VDO0_D1 / PPORT17

VDO0_D0 / PPORT16

IC7100

/ RTS1B

/ CTS1B

VDCLK,VDO[0-7]

5%

CHIP

1/16W

100

R7157

V19

Y19

V19

Y19

VDO0_VCK / PPORT15

IS WRONG

JL7119

SIGN14954

CI2_CD2B

TP7127

VDO0_FLD / PPORT12

TP7128

JL7120

SIGN16378

V11

V11

VAR

Y

R7136

XX

R7137

XX

R7138

XX

V12

V12

VAG
U

JL7121

GND_1

W12

W12

VAB

V

AA12

AA12

15

16

17

18

19

20

THESE CAP ACIT ORS TO BE PLA CED UNDERNEATH BGA

EMI

FL7103

FE_+2V5_DDR

XX

C7112

XX

C7114

XX

C7116

C7123

C7124

C7125

THESE CAP ACIT ORS TO BE PLA CED UNDERNEATH BGA

C7126

0.1

0.1

0.1

0.1

DQ15

DQ14

B16

A16

A16

B16

FE_DQ[15]

FE_DQ[14]

FE_DQ[0-15]

DQ13

DQ12

B15

A15

A15

B15

A14

FE_DQ[13]

FE_DQ[12]

FE_DQ[11]

DQ11

DQ10

B14

A14

B14

FE_DQ[10]

DQ9

DQ8

B13

A13

A13

B13

FE_DQ[8]

FE_DQ[9]

DQ7

DQ6

C13

D13

D13

C13

FE_DQ[7]

FE_DQ[6]

DQ5

DQ4

C14

D14

D14

C14

FE_DQ[5]

FE_DQ[4]

DQ3

DQ2

C15

D15

D15

C15

FE_DQ[3]

FE_DQ[2]

DQ1

DQ0

C16

D16

D16

C16

FE_DQ[1]

FE_DQ[0]

DADD13

DADD12A9DADD11B9DADD10D8DADD9A8DADD8B8DADD7A7DADD6B7DADD5A6DADD4B6DADD3D6DADD2C6DADD1D7DADD0C7DBA1C8DBA0D9UDQM

FE_DADD[2]

FE_DADD[1]

C7

FE_DADD[0]

A9B9D8

D12

D12

SIGN15011

FE_DADD[12]

FE_DADD[11]

A8B8A7B7A6B6D6C6D7

FE_DADD[9]

FE_DADD[10]

FE_DADD[8]

FE_DADD[7]

FE_DADD[6]

FE_DADD[5]

FE_DADD[4]

FE_DADD[3]

JL7101

FE_DADD[0-12]

C8

D9

FE_DBA1

FE_DBA0

A11

A12

A11

A12

FE_DQS1

FE_DQM1

UDQS

LDQM

C11

C11

FE_DQM0

LDQS

DCSBC9DRASB

C9

C12

C12

FE_DQS0

FE_DCSB

DCASB

C10

D10

D10

C10

FE_DRASB

FE_DCASB

DWEB

DCKE

DCLK

DCLKB

DVREF

B10

D11

D11

B10

FE_DWEB

FE_DCKE

DIFFERENTIAL PAIR

OF CLOCK SIGNALS

B11

A10

A10

B11

FE_DCLKB

FE_DCLK

B12

B12

FE_DVREF

FE_M_CKOUT,FE_M_DAT A[0-7],FE_M_VAL

0.1

C7128

GND_1

THIS CAPA CITOR TO BE

PLACED UNDERNEA TH BGA

VDI_D7 / PPORT121

Y17

Y17

W17

TP7109

TP7108

VDI_D6 / PPORT120

W17

TP7110

VDI_D5 / PPORT119

V17

V17

VDI_D4 / PPORT118

AA17

AA17

AA16

TP7113

TP7111

VDI_D3 / PPORT117

AA16

VDI_D2 / PPORT116

Y16

Y16

W16

TP7116

TP7114

VDI_D1 / PPORT115

W16

TP7117

VDI_D0 / PPORT114

V16

V16

VDI_VCK / PPORT113

AA15

AA15

TP7118

STP0_DAT7 / PPORT8A1STP0_DAT6 / PPORT7B2STP0_DAT5 / PPORT6A2STP0_DAT4 / PPORT5B3STP0_DAT3 / PPORT4A3STP0_DAT2 / PPORT3C4STP0_DAT1 / PPORT2B4STP0_DAT0 / PPORT1A4STP0_EN / PPORT9A5STP0_CLK / PPORT0

C4

A1B2A2B3A3

FE_M_DA TA[7]

FE_M_DA TA[6]

FE_M_DA TA[5]

FE_M_DA TA[4]

B4

A4A5D5

FE_M_DA TA[3]

FE_M_DA TA[2]

FE_M_DAT A[0]

FE_M_DA TA[1]

FE_M_VAL

FE_M_CKOUT

15

REGB / PPORT34F4IOWRB / PPORT31N4IORDB / PPORT30P2INPACKB / PPORT33G2GPIO_VS1B / PPORT28R2GPIO_RESET / PPORT32G1GPIO_IREQB / PPORT24K3GPIO_CD1B / PPORT26V1GPIO_CD2B / PPORT35C1PCE1B(CE2B_2) / PPORT36Y1PCE0B(CE2B_1) / PPORT27P3IOSI16B / PPORT25B1STP1_STRT / PPORT38E4STP1_EN / PPORT37F2STP1_CLK / PPORT29H1RDATA15 / STP1_D AT7 / BOOT_NAND_SEL1

F4N4P2

D5

G2R2G1K3V1C1Y1

FE_CI1_VS1B

FE_CI1_INP A CKB

FE_CI1_IREQB

1/16WCHIP 5%

1/16W

1/16WCHIP 5%

1/16WCHIP 5%

47 R7166

47 R7167

47 R7168

47 R7169

CHIP 5%

FE_REGB

FE_IORDB

FE_IOWRB

FE_CI1_RSTB

P3

10k

R7128

FE_CI1_CD1B

FE_CI1_CD2B

B1

3.3V_MAIN

F2

E4

FE_CI_TSSYNC

FE_CI_TSVAL

FE_CI_TSCLK,FE_CI_TSSYNC,FE_CI_TSVAL

H1

FE_CI_TSCLK

RDATA14 / STP1_D AT6 / BOOT_NAND_SEL0

RDATA13 / STP1_D AT5 / BOOTSEL1T1RDATA12 / STP1_D AT4 / BOOTSEL0T3RDATA11 / STP1_D AT3 / MINIBOOTU1RDATA10 / STP1_D AT2 / BWSEL

T1

R1

R3

R1

R3

FE_CI_TSD[5]

FE_CI_TSD[7]

FE_CI_TSD[6]

FE_CI_TSD[0-7]

T3

U1D1D2

D1

D2

FE_CI_TSD[4]

FE_CI_TSD[3]

FE_CI_TSD[2]

FE_CI_TSD[1]

RDATA9 / STP1_D AT1 / ROMBEND

RDATA8 / STP1_D AT0 / MCLKSEL2

C3

C3

FE_CI_TSD[0]

FE_RDAT A[7]

FE_RDATA[0-7]

RDATA7 / MCLKSEL1

RDATA6 / MCLKSEL0

RDATA5 / VRCLKSEL1

RDATA4 / VRCLKSEL0

U2R4V2

U2

R4

FE_RDAT A[6]

V2

FE_RDAT A[5]

W2

W2

FE_RDAT A[4]

RDATA3V4RDATA2 / MRGMODE1

RDATA1 / MRGMODE0

RDATA0 / ENDIANE2RADD25 / HSD7 / EJTAG_MODE

C2

FE_RDAT A[2]

D4

FE_RDAT A[1]

E2

FE_RDAT A[0]

V4C2D4

FE_RDAT A[3]

FE_RADD[19-25]

RADD24 / HSD6 / DINT_EN

RADD23 / HSD5 / DSYSELB

RADD22 / HSD4 / PCI_MODE

RADD21 / HSD3 / PCI_SIZE1

RADD20 / HSD2 / PCI_SIZE0

J1G3J4

J1

G3

K4

J4

K4

RADD19 / HSD1 / NAND_CS

L2

N2

M2

L2

M2

N2

L4

SIGN14969

JL7112

FE_RADD[25]

FE_RADD[24]

FE_RADD[23]

FE_RADD[22]

FE_RADD[21]

FE_RADD[20]

FE_RADD[19]

RADD18 / HSD0

RADD17 / PKTSTRTM4RADD16 / HSDE

RADD15 / HSDCLK

J3

L4

M4

J3

H3

SIGN14974

SIGN14981

SIGN14985

JL7114

JL7115

JL7113

H3

FE_RADD[0-11]

RADD14M1RADD13N1RADD12K1RADD11N3RADD10T2RADD9M3RADD8L3RADD7H4RADD6G4RADD5J2RADD4H2RADD3F1RADD2E3RADD1E1RADD0D3FCSB1V3FCSB0K2FWEBL1FOEBP1NSEBT4NRBBW1NCLEU3NALEU4GCSB3 / PPORT50

N1K1N3

M1

SIGN14987

SIGN14989

SIGN14991

JL7117

JL7116

JL7118

T2M3L3

FE_RADD[11]

FE_RADD[10]

FE_RADD[9]

H4

G4J2H2

FE_RADD[8]

FE_RADD[7]

FE_RADD[6]

F1

FE_RADD[3]

FE_RADD[5]

FE_RADD[4]

E3

E1

D3

FE_RADD[2]

FE_RADD[1]

FE_RADD[0]

V3

L1

K2

47

R7129

FE_FWEB

FE_FCSB0

P1

5%

47R7165

1/16W CHIP

47R7164

FE_FOEB

T4

W1

47R7162

47R7163

1/16W CHIP5%

1/16W CHIP 5%

1/16W CHIP 5%

FE_NAND_CLE

FE_NAND_ALE

FE_NAND_RBB

U3

U4

AA18

AA18

GCSB2 / PPORT49

Y18

Y18

TP7129

GCSB1Y2GCSB0P4GRD YB

P4

Y2

47

SIGN14976

R7140

CI2_CE2B

FE_CI1_CE1B

F3

F3

FE_CI1_WAITB

RSTSWB

RSTOUT

PWMOUTV7CLK27IN

V7

Y10

AA11

AA11

Y10

SIGN14950

TP7130

FE_PWMOUT

FE_NMASTER_RESET

M21

M21

FE_CLK27M

N17

N17

EMI

FE_+1V5

AVDDP

FL7105

C7138

4.7

GND_1

THIS CAPA CITOR TO BE

16

PLACED UNDERNEA TH BGA

17

18

19

20

BC1

1/14 MAIN MICROCONTROLLER, HDMI/AV SIDE/PC INPUT, AUDIO PROCESSOR, SCARTS

21

22

4.7

C7102

C7149

XX

GND_1

C7103

XX

3.3V_MAIN

FL7101

EMI

C7118

10

C7146

XX

GND_1

FE_+2V5

EMI

FL7102

FE_DBA0,FE_DBA1,FE_DCASB,FE_DCKE,FE_DCLK,FE_DCLKB,FE_DCSB,FE_DQM0,FE_DQM1,FE_DQS0,FE_DQS1,FE_DRASB,FE_DVREF,FE_DWEB

ABCDEF GH JIKLMN

O

21

COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED

22

P

Q

R

S

T

U

V

W

X

- 16 -

Y

~ BC1 Board Schematic Diagram [ Main Microcontr oller , HDMI/AV Side/PC Input, Audio Processor , Scarts ] Page 1/14 ~

Z

AA

BB

CC

DD

EE

FF

ABC D EF G H JIKLMN

BC1 - SE2AG

O

P

QRST UVWXY AA

Z

DDCCBB

EE

FF

1

1

FE_+2V5_DDR

3.3V_MAIN

2

FB7200

GND_1

C7200

0.1

0uH

GND_1

C7201

1

C7203

3

3.3V_MAIN

R7200

4

FE_NAND_RBB

FE_FOEB

5

FE_FCSB0

NOTE PIN 6 IS NOT GND ON SAMSUNG
NAND FLASH, ONLY TOSHIBA

TP7200

TP7201

TP7202

470

R7205

XX

4321

65

1210 11987

6

GND_1

10k

FE_NAND_CLE

7

FE_NAND_ALE

R7203

FE_FWEB

GND_1

TP7203

TP7204

TP7205

151413

181716

TP7206

8

242322212019

9

FE_RDATA[0-7]

0.1C7202

IC7200

NC

NC

NC

NC

NC

IO/8

NC

IO/7

RB

IO/6

FOE

IO/5

CE

NC

NC

LOCKPRE

VCC

VCC

VSS

VSS

NC

NC

CLE

ALE

IO/4

WE

IO/3

WP

I/O2

NC

I/O1

NC

NC

NC

NC NC

0.1

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

GND_1

48 43

47 45 44

46

TP7210

TP7211

42 41 37383940

TP7212

TP7213

FE_RDATA[7]

FE_RDATA[6]

FE_RDATA[5]

FE_RDATA[4]

FE_DQ[0-15]

TP7209

LEAVE N.C. SO NOT USED

36

GND_1

3435

TP7214

313233

30 29 28 27 26 25

TP7215

TP7216

TP7217

FE_RDATA[3]

FE_RDATA[2]

FE_RDATA[1]

FE_RDATA[0]

FE_DADD[0-12]

FE_DBA0,FE_DBA1,FE_DCASB,FE_DCKE,FE_DCLK,FE_DCLKB,FE_DCSB,FE_DQM0,FE_DQM1,FE_DQS0,FE_DQS1,FE_DRASB,FE_D VREF,FE_DWEB

FE_DADD[10]
FE_DADD[0]
FE_DADD[1]
FE_DADD[2]
FE_DADD[3]

FE_DQ[0]
FE_DQ[1]
FE_DQ[2]
FE_DQ[3]

FE_DQ[4]
FE_DQ[5]
FE_DQ[6]
FE_DQ[7]

FE_DQS0

FE_DQM0
FE_DWEB
FE_DCASB
FE_DRASB

FE_DCSB
FE_DBA0
FE_DBA1

RB7205

1
3
5
7

RB7206

1
3
5
7

68

68

R7217

1
3
5
7

1
3
5
7
1
3
5
7

2
4
6
8

2
4
6
8

100

RB7207

100

RB7208

RB7209

100

C7214

XX

XX

C7213

IC7201

1

VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
NC
VDDQ
LDQS
NC
VDD
NC
LDM
WE
CAS
RAS
CS
NC
BS0
BS1
A10
A0
A1
A2
A3
VDD

DQ15
VSSQ
DQ14
DQ13

VDDQ

DQ12
DQ11
VSSQ
DQ10

VDDQ

VSSQ

UDQS

VREF

UDM

CLK
CLK
CKE

VSS

DQ9

DQ8

VSS

A12
A11

VSS

5960616263646566

5758

55 54 52

5356

NC

68R7228

NC

495051
48
47
46 45 44

R7245

XX

43 42

NC

41 40 39 38 37 36 35

A9
A8
A7
A6
A5
A4

34

GND_1

R7231

1
3
5
7
1
3
5
7

100
100R7229

100R7232

100

RB7210

RB7211

100

100R7230

2
345678

GND_1

9
10

11 12 13 14 15

GND_1

68

2
4
6
8

2
4
6
8
2
4
6
8

16 17 18 19 20 21 22

23
24 3225 31302926 27 28

33

PLACE THESE CAPACITORS CLOSE TO IC PINS.

C7215

C7216

XX

XX

RB7212

1
3
5
7

RB7213

1
3
5
7

68

68

XX

C7217

2
4
6
8

2
4
6
8

C7218

0.1

FE_DQ[15]
FE_DQ[14]
FE_DQ[13]
FE_DQ[12]

FE_DQ[11]
FE_DQ[10]

FE_DQ[9]
FE_DQ[8]

JL7216 JL7218

FE_DQS1

TP7223

FE_DVREF

FE_DQM1

FE_DCLKB

FE_DCLK
FE_DCKE

2
4
6
8
2
4
6
8

FE_DADD[12]
FE_DADD[11]

FE_DADD[9]
FE_DADD[8]
FE_DADD[7]
FE_DADD[6]
FE_DADD[5]
FE_DADD[4]

C7219

XX

JL7217

TP7224

FE_DADD[0-12]

C7220

TP7225

0.1

JL7219

TP7226

C7221

XX

JL7220

TP7227

C7222

0.1

C7223

0.1

C7224

4.7

C7225

100

GND_1

XX

C7239

FE_CVBS

5V_MAIN

FB7202

0uH

0.1

C7226

R7234

220

27p

C7228

C7227

0.1

L7200
15uH

C7229

3.3V_STBY

68p

JL7222

0.01

C7231

Q7200

VIDEO AMPS/BUFFERS

R7235

1k

JL7223

RF_DIGITAL

C7232

1p

XX

C7235

C7238

R7237

100

100

R7238

47

SCL

100

R7241

0.1

C7234

SDA

PCA8563/T4

IC7203

8765

VDD

CLKOUT

SCL

OSCI

OSCO

INT

VSSSDA

4321

X7201

R7244

3.3k

1

234

C7233

1p

KEY

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

FE_CI_TSD[0-7]

FE_CI_TSD[7]
FE_CI_TSD[6]

FE_CI_TSD[5]
FE_CI_TSD[4]

FE_CI_TSD[2]

FE_CI_TSD[0]

FE_CI_TSD[1]
FE_CI_TSD[3]

FE_RDATA[7]
FE_RDATA[6]
FE_RDATA[5]
FE_RDATA[4]

FE_RDATA[3]

FE_RDATA[2]
FE_RDATA[1]
FE_RDATA[0]

BOOT_NAND_SEL_1

BOOT_NAND_SEL_0

BOOTSEL1

BOOTSEL0

BWSEL

MCLKSEL2

ROMBEND
MINIBOOT

MCLKSEL1
MCLKSEL0
VRCLKSEL1
VRCLKSEL0

RESERVED
MRGMODE1
MRGMODE0

ENDIAN

FE_RADD[25]

FE_RADD[24]
FE_RADD[19]

1k RB7200

2
4
6
8
2
4
6
8

1k

RB7214

1kRB7202

1
3
5
7

1
3
5
7

1k

RB7215

EJT AG_MODE

DINT_EN
NANDCS

1
3
5
7

1
3
5
7

2
4
6
8
2
4
6
8

3.3V_MAIN

PLACE R7201 &
R7202 ADJACENT

GND_1

XX

R7201

NAND FLASH

RDATA[0] = 1 = ENDIAN = Big Endian
RDATA[2:1] = 10 = MRGMODE1-0 = Full merge & All bytes
RDATA[3] = -- = RESERVED
RDATA[5:4] = 10 = VRCLKSEL1-0 = 187MHz
RDATA[8:6] = 101 = MCLKSEL2-0 = 166MHz
RDATA[9] = 1 = ROMBEND = Big Endian
RDATA[10] = 1 = BWSEL = 8bit
RDATA[11] = 1 = MINIBOOT = use miniboot
RDATA[13:12] = 11 = BOOTSEL1-0 = Nand, then Memory Stick
RDATA[15:14] = 00 = BOOT_NAND_SEL1-0 = <256mbit
RADD[25] = 1 = EJTAG_MODE = EJTAG
RADD[24] = 0 = DINT_EN = disable
RADD[23] = 1 = DSYSELB = main only
RADD[22] = 1 = PCIMODE = host
RADD[21:20] = 00 = PCI_SIZE1-0 = 32Mbyte
RADD[19] = 0 = NANDCS = CS0

3.3V_MAIN

470R7206

TP7207

TP7208

470R7207

TO FORCE "BOOT FROM MEMORY STICK",
CONNECT (SHORT) TP7207 TO TP7208, OR
CONNECT (SHORT) JL7200 TO JL7201

JL7202

BOARD VERSION RESIST ORS - MOUNT ON
SIDE-B WITH JL’S ON SIDE-B

R7209

XX

R7210

XX

JL7203

BOARD VERSION RESIST ORS - MOUNT ON
SIDE-A

R7211

XX

R7212

XX

R7213

XX

R7214

XX

R7215

XX

R7216

XX

JL7204

JL7205

JL7206

JL7207

JL7208

JL7209

JL7210

JL7211

3.3V_MAIN

GND_1

FB7201

0uH

C7204

0.1

0.5%

100

R7218

PLACE THESE CLOSE TO PIN 49 OF IC

0.5%

R7219

GND_1

100

C7208

LA YOUT NOTE:­REMOVE GND PLANE AR OUND AND UNDERNEATH IC7202
AND X7200 INCLUDING TRA CKS FROM XTAL T O IC .

C7205

0.001

C7206

XX

X7200

C7207

GND_1

XX

FE_PWMOUT

0.1

C7209

4.7

IC7202

4.7

C7211

C7210

0.1

R7227

1k

8765

X2

PD

VDD

X1

NC

VIN

GND CLK

4321

TP7221

R7226

10k

C7212

0.1

GND_1

FE_DVREF

DDR SDRAM

R7233

47

XX

C7237

TP7222

FE_CLK27M

27MHZ CLOCK

SDA

SCL

Q7203

RT1N141M-TP-1

Q7201

2SK2036(TE85L)

Q7202

2SK2036(TE85L)

RESET_N

S

S

3.3V_MAIN

Q7204

RT1P431M-TP-1

R7242

1005

5%

CHIP

1/16W

10k

R7243
CHIP

1/16W

1005

10k

5%

SDA_EMMA

SCL_EMMA

10

11

12

13

14

15

16

17

18

19

20

21

FE_RADD[19-25]

FE_RADD[23]
FE_RADD[22]
FE_RADD[21]
FE_RADD[20]

DSYSELB
PCIMODE
PCI_SIZE1
PCI_SIZE0

1k

R7202

1
3
5
7

1k

R7204

1kRB7204

2
4
6
8

4.7k

R7208

GND_1

3.3V_MAIN

GND_1

PLEASE PLACE COMPONENTS IN
THIS BO X IN SAME AREA ON PWB

STRAP PINS

FE_FTV_CONFIG2

FE_FTV_CONFIG1

FE_FTV_CONFIG0

TP7218

TP7219

TP7220

3.3V_MAIN

XX

10k

R7222

XX

R7223

10k

R7224

10k

R7225

XX

FTV_CONFIG2
FTV_CONFIG1
FTV_CONFIG0

OPTION #2

0
0
0

00
0
0

OPTION #3OPTION #1

0
0

R7220

R7221

GND_1

S/W OPTION SELECT RESIST ORS

BC1

2/14

18

19

20

21

22

ABCDEF GH JIKLMN

O

22

COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED

P

Q

R

S

T

U

V

W

X

Y

Z

AA

BB

CC

DD

EE

FF

~ BC1 Board Schematic Diagram [ Main Microcontr oller , HDMI/AV Side/PC Input, Audio Processor , Scarts ] Page 2/14 ~

- 17 -