Sony CXP82224, CXP82220 Datasheet

CMOS 8-bit Single Chip Microcomputer

Description

The CXP82220/82224 is a CMOS 8-bit single chip
microcomputer integrating on a single chip an A/D
converter, serial interface, timer/counter, time base
timer, capture timer/counter, fluorescent display tube
controller/driver, remote control reception circuit, CTL
duty detection circuit, 14-bit PWM output, high-speed
output circuit and other servo systems besides the
basic configurations of 8-bit CPU, PROM, RAM, and
I/O port.

The CXP82220/82224 also provides power-on reset
function and sleep/stop function that enables lower
power consumption.

Features

• Wide-range instruction system (213 instructions) to cover various types of data

— 16-bit arithmetic/multiplication and division/Boolean bit operation instructions

• Minimum instruction cycle 400ns at 10MHz operation

122µs at 32kHz operation

• Incorporated ROM capacity 20K bytes (CXP82220)

24K bytes (CXP82224)

• Incorporated RAM capacity 704 bytes (including fluorescent display area)

• Peripheral functions

— A/D converter 8 bits, 8 channels, successive approximation method

(Conversion time of 32µs/10MHz)

— Serial interface SIO with 8-bit, 8-stage FIFO incorporated for data use

(Auto transfer for 1 to 8 bytes), 1 channel
8-bit standard SIO, 1 channel

— Timer 8-bit timer, 8-bit timer/counter, 19-bit time base timer

16-bit capture timer/counter, 32kHz timer/counter

— Fluorescent display tube controller/driver Maximum of 384 segment display possible

1 to 16-digit dynamic display
Dimmer function
High voltage drive output (40V)
Incorporated pull-down resistor (Mask option)
Hardware key scan function
Maximum of 16 × 8 key matrix compatible

— Remote control reception circuit Incorporated noise elimination circuit

Incorporated 8-bit, 6-stage FIFO for measurement data
— PWM output circuit 14 bits, 1 channel
— CTL duty detection circuit
— High-speed output circuit Precision of 800ns at 10MHz, 4 outputs

• Interruption 19 factors, 15 vectors, multi-interruption possible

• Standby mode Sleep/stop

• Package 100-pin plastic QFP

• Piggyback/evaluation chip CXP82200 100-pin ceramic QFP

– 1 –

E92235A81-PS

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

CXP82220/82224

100 pin QFP (Plastic)

Structure

Silicon gate CMOS IC

– 2 –

CXP82220/82224

A/D CONVERTER

FDP CONTROLLER/

DRIVER

14 BIT PWM GENERATOR

CTL DUTY DET

REMOCON

SERIAL INTERFACE UNIT 1

8 BIT TIMER/COUNTER 0

8 BIT TIMER 1

16 BIT CAPTURE

TIMER/COUNTER 2

RAM

80 BYTES

FIFO

SERIAL

INTERFACE

UNIT 0

FIFO

INTERRUPT CONTROLLER

SPC700

CPU CORE

ROM

20K BYTES

(CXP82220)

24K BYTES

(CXP82224)

CLOCK GEN./

SYSTEM CONTROL

RAM

704 BYTES

2 2 2

2

2

PRESCALER/

TIME BASE TIMER

32kHz

TIMER/COUNTER

REALTIME

PULSE

GENERATOR

CH0 CH1

2

8

8

8

24

AV

REF

AV

SS

PE0/EC0/INT0

PE1/EC1/INT1

PE2/INT2

PE3/INT3/NMI

V

SS

V

DD

RST

XTAL
EXTAL
TX

TEX

PG0/RTO0

to

PG3/RTO3

PORT APORT B

PORT C

PORT D

PORT E

PORT F

PORT G

PORT H

PORT I

4

8

8

8

8

8

8

8

6

2

PA0/AN0 to

PA7/AN7

T0 to T7

T8/S31 to

T15/S24

PD0/S0 to

PI7/S23

V

FDP

PE6/PWM

PE5/CTL

PE7/DDO

PE4/RMC

PB1/CS0

PB3/SI0

PB4/SO0

PB2/SCK0

PB6/SI1

PB7/SO1

PB5/SCK1

PE0/INT0/EC0

PE7/TO

PB0/CINT

PE1/INT1/EC1

PA0 to PA7

PC0 to PC7

PD0 to PD7

PE0 to PE5

PE6 to PE7

PF0 to PF7

PG0 to PG7

PH0 to PH7

PI0 to PI7

7

PB0 to PB6

PB7

Block Diagram

– 3 –

CXP82220/82224

PE1/EC1/INT1

PE2/INT2

PE3/INT3/NMI

PE4/RMC

PE5/CTL

PE6/PWM

PE7/TO/DDO/ADJ

PB0/CINT

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1
PB7/SO1
PC0/KR0
PC1/KR1
PC2/KR2
PC3/KR3
PC4/KR4

PC5/KR5
PC6/KR6
PC7/KR7

PH0
PH1

PH2
PH3
PH4
PH5
PH6

T7
T8/S31
T9/S30

T10/S29

T14/S25
T15/S24
PI7/S23
PI6/S22
PI5/S21

PI4/S20

PI3/S19
PI2/S18

PI0/S16
PF7/S15
PF6/S14
PF5/S13
PF4/S12
PF3/S11

PF2/S10
PF1/S9
PF0/S8
PD7/S7

PD6/S6

PD5/S5
PD4/S4
PD3/S3

PH7

PA0/AN0

PA1/AN1

PA2/AN2

PA3/AN3

PA4/AN4

PA5/AN5

RST

EXTAL

XTAL

V

SS

TX

TEX

PA6/AN6

PA7/AN7

AV

REF

AV

SS

PD0/S0

PD1/S1

PD2/S2

PG1/RTO1

PE0/EC0/INT0

PG7

PG5

PG4

PG3/RTO3

PG2/RTO2

PG0/RTO0

V

SS

NC

V

DD

V

FDP

T0

T1

T2

T3

T4

T5

T6

40

39

38

37

36

35

34

31

32

33

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

70
69
68
67

63

64

65

66

61

62

71

72

73

74

75

76

77

78

79

80

81

82

83

84

88

87

86

85

89

90

100

99

98

97

96

95

94

91

92

93

2
3
4

5
6
7
8
9

10
11
12
13
14
15
16
17
18
19

20
21
22

23

24
25
26
27
28

29
30

1

PI1/S17

T12/S27
T13/S26

T11/S28

PG6

Note) NC (Pin 90) must be connected to VDD.

Pin Assignment (Top View)

CXP82220/82224

Pin Description

– 4 –

(Port A)
8-bit I/O port. I/O can be
set in a unit of single bit .
(8 pins)

(Port B)
8-bit I/O port. I/O for lower
7 bits can be set in a unit
of single bit. Uppermost
bit (PB7) is for output only.
(8 pins)

(Port C)
8-bit I/O port. I/O can be
set in a unit of single bits.
Capable of driving 12mA
synk current. (8 pins)

(Port D)
8-bit output port.
(8 pins)

(Port E)
8-bit port. Lower 6 bits are
for inputs; upper 2 bits are
for outputs.
(8 pins)

(Port F)
8-bit output port.
(8 pins)

(Port G)
8-bit I/O port. I/O can be
set in a unit of single bit.
Data for the lower 4 bits
are gated with the contents
of RTO or OR-gate output.
(8 pins)

Analog inputs to A/D converter.
(8 pins)

External capture input to 16bittimer/counter.
Chip select input for serial interface (CH0).
Serial clock I/O (CH0).
Serial data input (CH0).
Serial data output (CH0).
Serial clock I/O (CH1).
Serial data input (CH1).
Serial data output (CH1).

Serves as key return inputs when operating
key scan with FDP segment signal.

FDP segment signal outputs.

Inputs for
external
interruption
request.
(4 pins)

Remote control reception circuit input.
Input for CTL duty ditection circuit.
14-bit PWM output.
Output for the 16-bit timer/counter

rectangular waves, CTU duty detection,
and 32kHz oscillation frequuency
demultiplication.

Outputs for real-time pulse generator (RTG).
Functions as high-precision, real-time pulse
output port.
(4 pins)

Symbol I/O Functions

PA0/AN0

to

PA7/AN7
PB0/CINT

PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1

PC0/KR0

to

PC7/KR7

PD0/S0

to

PD7/S7
PE0/INT0/EC0

PE1/INT1/EC1
PE2/INT2

PE3/INT3/NMI
PE4/RMC

PE5/CTL
PE6/PWM

PE7/TO/DDO/
ADJ

PF0/S8

to

PF7/S15

PG0/RTO0

to

PG3/RTO3

PG4 to PG7

I/O/
Analog input

I/O/Input
I/O/Input
I/O/I/O
I/O/Input
I/O/Output
I/O/I/O
I/O/Input
Output/Output

I/O/Input

Output/Output

Input/Input/Input
Input/Input/Input

Input/Input
Input/Input/Input
Input/Input

Input/Input
Output/Output

Output/Output/
Output/Output

Output/Output

I/O/Output

I/O

External event inputs for
timer/counter.
(2 pins)

Non-maskable
interruption request input.

FDP segment signal
outputs.

– 5 –

CXP82220/82224

(Port H)
8-bit I/O port. I/O can be set in a unit of single bit.
(8 pins)

(Port I)
8-bit output ports. FDP segment signal outputs.
(8 bits)

Outputs for FDP timing (digit) signals/segment signals.

FDP timing signal outputs.
FDP voltage supply when incorporated resistor is set by mask option.

Crystal connectors for system clock oscillation. When the clock is supplied
externally, input to EXTAL; opposite phase clock should be input to XTAL.

Crystal connectors for 32kHz timer/counter clock oscillation. Set 32kHz
crystal oscillator between TEX and TX. For usage as event input, attach
clock source to TEX, and open TX.

Low-level active, system reset.
NC.

Under normal operation, connect to VDD.
Reference voltage input for A/D converter.
A/D converter GND.
Positive power supply.
GND.

Symbol I/O Functions

PH0 to PH7

PI0/S16

to

PI7/S23
T8/S31

to

T15/S24
T0 to T7
VFDP
EXTAL
XTAL

TEX
TX

RST
NC
AVREF

AVSS
VDD
VSS

I/O

Output/Output

Output/Output

Output

Input
Output

Input
Output

Input

Input

– 6 –

CXP82220/82224

When reset

Pin

Circuit format

Input/Output Circuit Formats for Pins

IP

RD (Port B)

Data bus

Port B direction

Port B output selection

"0" when reset

SCK in

Schmitt input

Port B data

"0" when reset

SCK out

Output enable

Hi-Z

Hi-Z

Hi-Z

PB0/CINT
PB1/CS0
PB3/SI0
PB6/SI1

PB2/SCK0
PB5/SCK1

Port B

Port B

2 pins

Port A

IP Input protection circuit

RD (Port A)

Data bus

Port A direction

Port A data

"0" when reset

Port A input selection

"0" when reset

A/D converter

Input multiplexer

IP

RD (Port B)

Data bus

Port B direction

Port B data

"0" when reset

CINT
CS0
SI0
SI1

Schmitt input

PA0/AN0

to

PA7/AN7

8 pins

4 pins

– 7 –

CXP82220/82224

When resetPin

Circuit format

IP

RD (Port B)

Data bus

Port B direction

Port B output selection

"0" when reset

Port B data

"0" when reset

SO

Output enable

Port B

Port C

Port E

1 pin

High level

Hi-Z

Hi-Z

PB4/SO0

PB7/SO1

1 pin

8 pins

Hi-Z

PC0/KR0

to

PC7/KR7

6 pins

PE0/EC0/INT0
PE1/EC1/INT1
PE2/INT2
PE3/INT3/NMI
PE4/RMC
PE5/CTL

Port B

IP

RD (Port C)

Data bus

Port C direction

Port C data

"0" when reset

Key input signal

∗

Large current drive of 12mA possible

∗

RD (Port E)

IP

EC0/INT0
EC1/INT1
INT2
INT3/NMI
RMC
CTL

Data bus

Schmitt input

RD (Port B)

Data bus

Port B output selection

"1" when reset

Port B data

"1" when reset

SO

Output enable

Internal reset signal

∗

∗

Pull-up transistor approx.

10kΩ