Sony CXL5509P, CXL5509M Datasheet

CMOS-CCD 1H/2H Delay Line for NTSC

Description

The CXL5509M/P is a CMOS-CCD delay line developed for video signal processing. Usage in conjunction with an external low-pass filter provide 1H and 2H delay signals simultaneously (For NTSC signals).

Features

• Single power supply (5V)

• Low power consumption 130mW (Typ.)

• Built-in peripheral circuits

• Built-in quadruple PLL circuit

• For NTSC signals

• 1 input and 2 outputs

(Outputs for both 1H and 2H delays)

Functions

• 906-bit (1H) and 1816-bit (2H) CCD register

• Clock driver

• Auto-bias circuit

• Sync tip clamp circuit

• Sample-and-hold circuit

• Quadruple PLL circuit Structure

CMOS-CCD

Absolute Maximum Ratings (Ta = 25°C)

• Supply voltage VDD 6V

•Operating temperature Topr –10 to +60 °C

• Storage temperature Tstg –55 to +150 °C

• Allowable power dissipation

PD CXL5509M 400 mW CXL5509P 800 mW

Recommended Operating Condition (Ta = 25°C)

Supply voltage VDD 5 ± 5% V

Recommended Clock Conditions (Ta = 25°C)

• Input clock amplitude VCLK 0.3 to 1.0 Vp-p

(0.5Vp-p typ.)

• Clock frequency fCLK 3.579545 MHz

• Input clock waveform sine wave Input Signal Amplitude

VSIG 571mVp-p (Max.) (at internal clamp condition)

– 1 –

E91401B7X-PS

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

CXL5509M/P

Blook Diagram and Pin Configuration (Top View)

Output circuit

(S/H 1bit)

CLK

1

2

3

4

5

7

Auto-bias circuit

Timing circuit

CCD

(1816bit)

Driver

Bias circuit

Clamp circuit

6

VCO IN

V

DD

AB

OUT1 (1H)

VG2

VG1

IN

9

10

11

12

13

14

V

SS

V

SS

V

SS

(VCO OUT)

V

SS

V

SS

PC OUT

PLL

15

16

Output circuit

(S/H 1bit)

8

V

DD

906bit 1816bit

OUT2 (2H)

CXL5509M

16 pin SOP (Plastic)

CXL5509P

16 pin DIP (Plastic)

– 2 –

CXL5509M/P

Pin Description

Pin No. Symbol Description Impedance

I/O 1 2

3

∗

4 5 6 7

8 9

10 11 12 13 14 15 16

IN VG1

VG2 OUT1 VSS OUT2 VSS (VCO OUT)

VSS VDD CLK VSS PC OUT VCO IN VDD AB VSS

I

O

I

O

—

O

(O)

— —

I

—

O

I

—

O

—

Signal input (Non-inverted signal)

Gate bias 1 DC output Gate bias 2 DC input 1H signal output

(Inverted signal) GND 2H signal output

(Inverted signal) GND or VCO output (4fsc) GND Power supply (5V) Clock input (fsc) GND Phase comparator output VCO input Power supply (5V) Autobias DC output GND

> 10kΩ (at no clamp)

40 to 500Ω

> 10kΩ

600 to 200kΩ

∗

Description of Pin 3 (VG2) Control of input signal clamp condition

0V ........ Sync tip clamp condition

5V ........ Center bias condition

The input signal is biased to approx. 2.1V by means of the IC internal resistance (approx. 10kΩ). In this mode, the input signal is limited to APL 50% and the maximum input signal amplitude is at 200mVp-p.

– 3 –

CXL5509M/P

b b b a a b b b b b b b b

a a b a b a b a b a b a b

16 –2

–2 –2.0 –2.0

—

52

—

26

0

0 –1.0 –1.0

3

56 56 — —

36

2 2 0 0 5 5 5

5 — —

350 350

mA

dB

%

degree

dB

mVp-p

2

3

4

5

6

7

Unit

Note

Max.Min. Typ.

Electrical Characteristics

(Ta = 25°C, VDD = 5V, fCLK = 3.579545MHz, VCLK = 500mVp-p, sine wave)

See "Electrical Characteristics Test Circuit"

Item Symbol

Test conditions

(Note 1)

SW conditions

1

2

3 4 a a a

b

←→

c

b

←→

c

d d d d e e

f f

a b b b b c c c c d d a a

—

200kHz, 500mVp-p, sine wave

200kHz ←→ 3.58MHz, 150mVp-p, sine wave

5-staircase wave

50% white video signal

No signal input

IDD GL1 GL2 fR1 fR2 DG1 DG2 DP1 DP2 SN1 SN2 CP1 CP2

Supply current Low frequency

gain Frequency

response Differential

gain Differential

phase

S/N ratio

S/H pulse coupling

Electrical Characteristics Test Circuit

1000p

1µ

AB

V

DD

VCO

IN

CLK

1000p

82k

3.3µ

0.1µ

CLK

f

SC (3.579545MHz), 500mVp-p

sine wave

IN

VG2

OUT1

V

SS

a

b

1M

5V

1µ

SW1

c

a

b

d

e

a

SW4

b

c

d

× 3

LPF

BPF

0

–3

–50

6M

14.3M

[dB]

6M

14.3M

200

1000p

0

–3

–50

[dB]

f

1

2

3

4

5

7

8

6

9

10

11

12

13

14

VSS

PC

OUT

V

SS

VSS

VG1

V

SS

(VCO

OUT)

1000p

3.3µ

0.1µ

120

15

16

V

DD

OUT2

CXL5509M/P

SW2

SW3

a

b

00

200kHz

500mVp-p

sine wave

200kHz

150mVp-p

sine wave

3.58MHz

150mVp-p

sine wave

5-staircase wave

50% white

video signal

Oscilloscope

Spectrum

analyzer

Vector scope

Noise meter

Note 1)

Note 2)

Note 1)

LPF frequency response

Frequency [Hz]

Note 2)

BPF frequency response

Frequency [Hz]

– 4 –

CXL5509M/P