Sony CXD3519TQ Datasheet

Reference Voltage and Driver IC for LCD

Description

The CXD3519TQ is suitable IC for applying
reference voltage for gamma correction which is
necessary for TFT liquid crystal display. This IC has
a built-in 9 channels of rail-to-rail buffer circuit which
enables 2-input switch and a common driver circuit.

Features

• Built-in 9 channels of rail-to-rail buffer circuit

• Built-in common driver circuit

• Current consumption: 3.6mA (typ.)

• Package: 48-pin TQFP

Structure

CMOS IC

Absolute Maximum Ratings (Ta = 25°C)

• Supply voltage VDD VSS – 0.3 to +6.0 V

• Input pin voltage VI VSS – 0.3 to VDD + 0.3 V

• Storage temperature Tstg –55 to +150 °C

• Allowable power dissipation (Ta ≤ 85°C)

CXD3519TQ

48 pin TQFP (Plastic)

PD 220 mW

Applications

Small liquid crystal monitor

Operating Conditions

• Supply voltage VDD 4.5 to 5.5 (5.0 typ.) V

• Operating temperature

Topr –35 to +85 °C

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

– 1 –

E00Y07-PS

Block Diagram

NC

VL4

VH4

VL5

VH5

VL6

VH6

VL7

VH7

VL8

2627282930313233343536

VH8

CXD3519TQ

NC

25

NC

GND

V6

V5

V4

NC

VDD

V1

V0

GND

NC

NC

37

38

39

40

41

42

43

44

45

46

47

48

1 2 3 4 5 6 7 8 9 10 11 12

VH3

VL3

VH2

VL2

VH1

VL1

VH0

VL0

SW

SW

buff

GND

NC

24

23

22

21

20

19

18

17

16

15

14

13

NC

GND

V7

V8

NC

VDD

V2

V3

GND

DD

V

COMOUT

NC

– 2 –

Pin Description

CXD3519TQ

Pin
No.

1
2
3
4
5
6
7

8
26
27
28
29
30
31
32
33
34
35

Symbol Pin voltage Equivalent circuit Description

VH3

0.5 to 4.0V

DC input when SW is high.

(max.:

VL3
VH2
VL2
VH1
VL1
VH0
VL0
VH8
VL8
VH7
VL7
VH6
VL6
VH5
VL5
VH4
VL4

2.0Vp-p)

0.2 to 4.8V

0.5 to 4.0V
(max.:

2.0Vp-p)

VH

VL

V

DD

1
3
5
7

2
4
6
8

GND

26
28
30
32
34

27
29
31
33
35

DC input when SW is low.
DC input when SW is high.
DC input when SW is low.
DC input when SW is high.
DC input when SW is low.
DC input when SW is high.
DC input when SW is low.
DC input when SW is high.
DC input when SW is low.
DC input when SW is high.
DC input when SW is low.
DC input when SW is high.
DC input when SW is low.
DC input when SW is high.
DC input when SW is low.
DC input when SW is high.

DC input when SW is low.
45
44
18
39
22
21
17
41
40

10

V0
V1

VDD

V2
V6
V7
V8
V3
V4

0.2 to 4.8V

0.5 to 4.0V

17
18
21
22

39
40
41
44
45

GND

V5

V

DD

9

SW

9

10

V0 output.

V1 output.

V2 output.

V6 output.

V7 output.

V8 output.

V3 output.

V4 output.

V5 output.

Input switch.

For V0 to V8 output, VL is

output for low; VH for high.

For COMOUT output, V

DD level

is output for low; GND level for

high.

Also, Pins 9 and 10 are

connected internally. Input the

SW

GND

same signal, or input one signal

and leave the other signal open.

– 3 –