Post-Amplifier for Optical Fiber Communication Receiver
Description
The CXB1573R achieves the 2R optical-fiber
communication receiver functions (Reshaping and
Regenerating) on a single chip. This IC is equipped
with the signal detection function, which is used to
enable TTL/ECL outputs. Also, the output disable
function performs the output shutdown.
Features
• Output disable function (TTL input)
• Signal detection function (TTL/ECL output)
Applications
• SONET/SDH: 622.08Mbps
• Fibre Channel: 531.25Mbps
: 1.062Gbps
• Gigabit-Ethernet: 1.25Gbps
Absolute maximum Ratings
• Supply voltage VCC – VEE –0.3 to +6 V
• Storage temperature Tstg –65 to +150 °C
• Input voltage difference|VD – VD
|
Vdif 0 to +2 V
• SW input voltage Vi VEE to VCC V
• ECL output current IOQ/SD-ECL –30 to 0 mA
• TTL output current (High level) IOH SD-TTL –20 to 0 mA
• TTL output current (Low level) IOL SD-TTL 0 to 20 mA
• D/DB input voltage Vcc – 2 to Vcc V
• ODIS input voltage VEE – 0.5 to VEE + 5.5 V
Recommended Operating Conditions
• Supply voltage VCC – VEE 3.3 ± 0.2 V
• Termination voltage (for data) VCC – VTD 1.8 to 2.2 V
• Termination voltage (for alarm 1,alarm 2) VTA VEE V
• Termination resistance (for data) RTD 46 to 56 Ω
• Termination resistance (for alarm 1) RTA1 240 to 300 Ω
• Termination resistance (for alarm 2) RTA2 460 to 560 Ω
• Operating temperature Ta –40 to +85 °C
Structure
Bipolar silicon monolithic IC
– 1 –
E98401-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXB1573R
32 pin LQFP (Plastic)
– 2 –
CXB1573R
Block Diagram and Pin Configuration
V
EE
4
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
V
EE
3
ODIS
SW
VccX
V
EE
2
V
EE
1
TM
VccZ
CAP3
CAP2
V
EE
2
V
EE
I
DN
UP
VCC3
QB
Q
SDB-ECL
SDB-TTL
SD-TTL
V
CC4
V
CC1
VccY
CAP1B
CAP1
D
V
CC2
V
CC
2
DB
V
EE1
SD-ECL
peak hold
peak hold
∆V
– 3 –
CXB1573R
Pin Description
Pin
No.
1
VEE3
0
Negative power supply for ECL
output buffer.
Switches the identification
maximum voltage amplitude.
High voltage when open; the
identification maximum voltage
amplitude becomes 40mVp-p.
Low voltage when connected to
VEE; the amplitude becomes
20mVp-p.
2
ODIS
0
or
3.3
(Open)
3
SW
0
or
3.3
(Open)
Positive power supply for digital
block.
Negative power supply for digital
block.
Negative power supply for analog
block.
Chip temperature monitor.
4
VCC2 3.3
3.3
5
VccX
6
7
VEE2
0
VEE1
0
8
TM
1.6
Controls the output shutdown
function. High voltage when
open; the Q output is fixed to
Low. Low voltage when
connected to VEE; the D input
results in the Q output with ECL
level. TTL level is also available.
Symbol
Typical pin
voltage (V)
DC
AC
Equivalent circuit
Description
2
VCC2
VEE2
VREF
10k
10k
300
Positive power supply for digital
block.
9
VCC1
3.3
Positive power supply for analog
block.
– 4 –
CXB1573R
11
12
13
14
15
16
17
18
19
20
CAP1B
CAP1
DB
D
VEE1
VCC2
UP
DN
VEEl
VEE2
1.6
to
2.4
1.6
to
2.4
Pins 11 and 12 connect a
capacitor which determines the
cut-off frequency for DC
feedback block.
Pins 13 and 14 are input pins
for limiting amplifier block. Input
the signal with AC coupled.
DC
AC
Negative power supply for analog
block.
Positive power supply for digital
block.
Connects a resistor for alarm
level setting.
Default voltage can be generated
without an external resistor by
shorting the VEEI pin to VEE.
Generates the default voltage
between UP and DOWN.
The voltage (8.0mV for input
conversion) can be generated
between UP and DOWN (Pins 17
and 18)
as alarm setting level by
connecting this pin to VEE.
2
2
0
3.3
0
0
1k
1k
V
CC1
V
EE1
2007.5k
100p
2007.5k
11
12
13
14
Pin
No.
Symbol
Typical pin
voltage (V)
Equivalent circuit
Description
VCC2
VEE2
100
986
100
140.9
140.9
VCS
SW
SW
17
18
19
Negative power supply for digital
block.
Positive power supply for analog
block.
3.3
10
VccY
– 5 –
CXB1573R
DC
AC
21
CAP2
1.5
Connects a peak hold circuit
capacitor for alarm block.
470pF should be connected to
Vcc each.
CAP2 pin connects a peak
hold capacitor for alarm level
setting block.
CAP3 pin connects a peak
hold capacitor for limiting
amplifier signal.
VCC2
VEE2
80
200
5µA
10p
21
22
CAP3
1.5
24
25
VEE4
VCC4
0
3.3
VCC2
VEE2
80
200
5µA
10p
22
Pin
No.
Symbol
Typical pin
voltage (V)
Equivalent circuit
Description
Negative power supply for TTL
output buffer.
Positive power supply for TTL
output buffer.
26
SD-TTL
VEE
or
2.2
Alarm signal TTL level output.
Positive power supply for ECL
output buffer.
3.323
VccZ
– 6 –
CXB1573R
DC
AC
27
SDB-TTL
VEE
or
2.2
28
29
SD-ECL
SDB-ECL
1.6
or
2.4
1.6
or
2.4
Alarm signal ECL level output.
Terminate this pin in 270Ω to
VEE.
Pin
No.
Symbol
Typical pin
voltage (V)
Equivalent circuit
Description
Alarm signal TTL level output.
30
Q
1.6
or
2.4
Data signal output.
Terminates this pin in 50Ω to
VTT = Vcc – 2V.
31 QB
1.6
or
2.4
32
VCC3
3.3
Positive power supply for ECL
output buffer.
– 7 –
CXB1573R
Supply current
Q/QB High output voltage
Q/QB Low output voltage
SD-ECL/SDB-ECL High output voltage
SD-ECL/SDB-ECL Low output voltage
SD-TTL/SDB-TTL High output voltage
SD-TTL/SDB-TTL Low output voltage
SW High input voltage
SW Low input voltage
SW High input current
SW Low input current
ODIS High input voltage
ODIS Low input voltage
ODIS High input current
ODIS Low input current
D/DB input resistance
TM voltage
Electrical Characteristics
DC Characteristics
Item
IEE
VOH
VOL
VOH-E
VOL-E
VOH-T
VOL-T
VIHSW
VILSW
IIHSW
IILSW
VIHOD
VILOD
IIHOD
IILOD
Rin
VTM
50Ω to VTT
270Ω to VEE
IOH = –0.4mA
Ta = 0 to +85°C
IOL = 2mA
Ta = 0 to +85°C
at SW pin Open: High
at ODIS pin Open: High
VIH = Vcc
VIL = VEE
Iin = 1mA
–74
VCC – 1100
VCC – 1860
VCC – 1100
VCC – 1900
2.2
VCC – 0.5
0
–100
2.0
0
–400
765
1.2
–51
1020
VCC – 860
VCC – 1620
VCC – 860
VCC – 1620
0.5
VCC
0.5
10
VCC + 0.5
0.8
20
1275
2.0
mA
mV
V
µA
V
µA
Ω
V
Symbol Min. Typ. Max. UnitConditions
VCC = 3.3 ± 0.2V, VEE = GND, Ta = –40 to +85°C