I2C Bus-Compatible Audio/Video Switc h with Electronic Volume
Description
The CXA2078Q is an I2C programmable audio,
video switch designed for set top box applications. It
interfaces from digital encoder sources to TV, VCR
and auxilliary scart connectors.
• 0 to –63dB volume control with click noise reduction
• 5 stereo audio inputs
• I2C control with two address setting
• Scart Function Switching input and output
• Scart Fast Blanking for OSD
• RF modulator output with Y/C mix option
• On-chip +12V to +9V voltage regulator
• 4 logic outputs
64 pin QFP (Plastic)
Applications
Audio/Video switch featuring I2C bus compatibility
for set top box
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings
• Supply voltageVCC12V
• Operating temperature Topr–20 to +75°C
• Storage temperatureTstg–65 to +150°C
• Allowable power dissipation
PD500mW
Operating Conditions
• Supply voltage+10.7 to +12V
• Operating voltage9 ± 0.5V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E97843-PS
Pin Configuration
CXA2078Q
CC
VOUT2
FBLK_OUT
VOUT1
CC_12V
V
VREG_9V
VREG_BASE
VIDEO_V
CC
RIN5
FBLK_IN2
LIN5
VIN1
RIN1
VIN3
52
53
54
55
56
57
58
59
60
61
62
63
64
51
1
RTV
50
2
LIN1
LTV
VOUT3
49
48
4
3
VIN5
BIAS_VIDEO
DIG_V
VOUT4
47
5
VIN9
FNC_VCR
LOG_1
46
6
VIN6
LOG_3
LOG_2
45
44
8
7
VIN10
FNC_AUX
DIG_GND
LOG_4
43
41
42
9
10
11
SCL
VIDEO_GND
FBLK_IN1
LIN4
HW MUTE
40
39
13
12
SDA
ADR
AUDIO_GND
FNC_TVA
37
38
14
15
VIN7
TRAP
RIN4
FNC_TVB
35
36
17
16
LIN2
RIN2
VIN11
MONO
34
18
VIN2
VOUT8
33
19
RIN3
32
ROUT1
31
VOUT5
30
LOUT1
29
VOUT6
28
ROUT2
27
VOUT7
26
LOUT2
25
AUDIO_V
24
VIN12
23
BIAS_AUDIO
22
VIN8
21
LIN3
20
VIN4
CC
– 2 –
Block Diagram
CXA2078Q
TYPICAL CONFIGURATION
SOURCE
AUX
ENC
DIGITAL (OSD)
AUX
DIGITAL (OSD)
AUX
DIGITAL (OSD)
DIGITAL (NO OSD)
VCR
AUX
DIGITAL (OSD)
DIGITAL (NO OSD)
VCR
AUX
(OSD = On-Screen Display)
MODE1 MODE2
BLUE
BLUE
GREEN
GREEN
RED
RED
CVBS
CVBS
CVBS
CVBS
OUTPUT
CVBS
CHROMA
CHROMA
CHROMA
CHROMA
LUMA
LUMA
LUMA
LUMA
FBLK_IN1
FBLK_IN2
VIN10
VIN11
VIN12
RIN1
RIN2
RIN3
RIN4
RIN5
LIN1
LIN2
LIN3
LIN4
LIN5
V
CC_12V
VREG_BASE
VREG_9V
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
VIN8
VIN9
41
60
62
18
64
20
2
6
14
22
4
8
16
24
6k
63
6k
15
6k
19
6k
36
6k
59
6k
1
6k
17
6k
21
6k
39
6k
61
55
57
56
Comparator
Comparator
Mute
BIAS
Input attenuation = 6dB
with 6k external resistor.
ADR: Selects the I2C
address for the IC.
< 1.5V = Low Add = 90H
> 2.5V = High Add = 92H
VCC = 9V
40k
8µA
Open collector logic Pins.
3V
Maximum current sink
= 1mA
4.5k
7.5k
35
53
TRAP
FBLK_
OUT
3.9V
—
VCC = 12V
35
VCC = 12V
53
1k
147
100
100µA
VCC = 9V
470µA
VCC = 9V
100µA
Connection to external
trap circuit.
Trap components should
be kept as close as
possible to this pin.
Fast Blank output set by
I2C, FBLK_IN1 or
FBLK_IN2.
High = 5.1V
Low = 1.2V
Connected to external
emitter follower.
Maximum load current
= 800µA
– 7 –
CXA2078Q
Pin
No.
41
60
5
7
Symbol
FBLK_IN1
FBLK_IN2
FNC_VCR
FNC_AUX
Pin
voltage
—
—
VCC = 12V
41
60
5
7
Equivalent circuitDescription
V
CC = 9V
50µA
Fast Blank inputs.
147
Low = < 0.4V
High = > 1.0, < 3.0
90µA
VCC = 9V
80µA
50k
50k
Function switching input
(Scart pin 8).
Typical levels
= 0V/6V/12V
10k
100k
– 8 –
CXA2078Q
Electrical Characteristics
Absolute Maximum Ratings
Supply VoltageVcc_12V12V
Operating Conditions
• Supply VoltageVcc_12V12 to 10.7V
• Voltage RegulationVreg_9V9 ± 0.45V (from 12V supply)
• Operating Voltage Video_Vcc, Dig_Vcc,9 ± 0.5V
Audio_Vcc9 ± 0.5V
FNC_TVA (pin 38) and FNC_TVB (pin 39) are static sensitive.
Precaution should be taken (note 8 in "Notes on Operation").
Operation of the CXA2078Q using a 9V supply connected directly to the VCC_12V, Video_VCC, AUDIO_VCC
and Dig_VCC pins is possible but not recommended. (The unused on-chip voltage regulator is then forced to
have pins Vreg_base and Vreg_9V floating.)
– 9 –
CXA2078Q
Electrical Characteristics
Nominal conditions (Ta = 25°C)
ItemSymbolConditionsMin.Typ.Max.Unit
Current ConsumptionICC305070mA
VCC_12V = 12V, No signal, no load
Video systemNominal conditions (Ta = 25°C, Vcc_12V = 12V)
ItemSymbolConditionsMin.Typ.Max.Unit
Input pin voltage
Output pin
voltage
Vout1 – 8
Vout8 (mix)
Gain (except Y/C mixer)
Gain of Y/C mixer
Bandwidth
(except Y/C mixer)
VVPin
VVPout
VVPoutm
GVv
GVYC
fV3dB
No signal, no load (Fig.1)
No signal,no load,Y/C mix inactive
(Fig.1)
No signal, no load, Y/C mix active
(Fig.1)
f = 200kHz, 0.3Vp-p input (Fig.2)
f = 200kHz, 0.3Vp-p input (Fig.2)
0.3Vp-p input, frequency where output
level is –3dB with 200kHz serving as
0dB (Fig. 2)
4.3
3.6
3.5
5.5
5.4
15
4.6
3.9
3.8
6.0
6.0
20
4.9
4.2
4.2
6.5
6.4
V
V
V
dB
dB
MHz
0.3Vp-p input, frequency where output
Bandwidth of Y/C Mixer
fYC3dB
level is –3dB with 200kHz serving as
0dB. No trap connected. (See note below)
7
15
—
MHz
(Fig.2)
Input dynamic range
Output dynamic range
Cross talk
VDRVI
VDRVO
Vctv
200kHz input (Fig.2)
200kHz, 2.5Vp-p input (Fig.2)
f = 4.43MHz, 1Vp-p input (Fig.2)
2.5
5.0
—
—
—
—
—
—
–50
Vp-p
Vp-p
dB
Ratio of 0.7Vp-p white video signal to
S/N ratio
S/NV
black line noise. Weighted using
CCIR 567. HPF @ 5kHz,
—
72
—
dB
LPF @ 5MHz. (Fig.2)
1Vrms 1kHz input through 56kΩ.
Input Impedance
ZinV
Attenuation measured to calculate ZinV
94
120
kΩ
(Fig.3)
V2
V1
(Fig.4)
–3
–0.4
+3
%
Non-linearity
Input/V
Lin
V1 = Pin Voltage +0.5V
V2 = Pin Voltage +1V
At output, non-linearity = –1 × 100
V2
V1 × 2
1.7Vp-p 5-step modulated staircase.
Differential Gain
DG
(Chroma and Burst are 150mVp-p
1.5
%
4.43MHz) (Fig.2)
Differential Phase
DP
as above. (Fig.2)
1
Deg
Percentage reduction in sync pulse
Sync crush
SC
(0.4Vp-p), with tip at –1.2V input offset.
0.2
3
%
(Fig.4)
Delay of Luma over
Chroma through mixer
tcld
0.4Vp-p square wave input. Input to
output edge delay measured. No trap.
(Fig.2)
15
40
ns
Note) Input output path from Vin9 – 12 to Vout 8 through mixer has BW reduced by external stray capacitance
on TRAP pin.
– 10 –
CXA2078Q
Electrical Characteristics
Audio system
Unless otherwise stated: input coupling capacitor 1µF in series with 6kΩ resistor; output coupling capacitor of
10µF; load of 10kΩ.Nominal conditions (Ta = 25°C, Vcc_12V = 12V)
ItemSymbolConditionsMin.Typ.Max.Unit
Input pin voltage
R/LOUT1, 2
Gain
RTV, LTV
MONO
Audio frequency
response
VAPIN
GVA
GVATV
GVAM
FAF
No signal, no load (Fig. 5)
f = 1kHz, 1Vrms input. (Fig. 6)
f = 1kHz, 1Vrms input. (Fig. 6)
f = 1kHz, 1Vrms "stereo" input. (Fig. 6)
0.3Vp-p input. Output level at 30kHz
with 1kHz serving as 0dB. 6kΩ
removed. (Fig. 7)
4.2
–0.5
–0.65
–0.65
–0.3
4.5
0
0
0
0
4.8
+0.5
+0.35
+0.45
+0.3
V
dB
dB
dB
dB
0.3Vp-p input; frequency where output
Frequency B/W
FBWA1
level is –3dB with 1kHz serving as
—
1
—
MHz
0dB. 6kΩ removed. No load (Fig. 7)
f = 1kHz, 0.5Vrms, unweighted
Distortion
THD
response; LPF @400Hz,
—
0.004
0.2
%
HPF @ 80KHz. (Fig. 6)
Input Dynamic Range
Cross talk
(Channel separation)
R/LOUT1, 2
Ripple
rejection
RTV, LTV
MONO
DC Offset -R/Lout1, 2
Input impedance
Output Impedance
VdA
VctA
RRA
RRATV
RRAM
Voff
Zin
Zout
f = 1kHz (Fig. 6)
f = 1kHz, 1Vrms input on one input,
measure on any other audio output.
(Fig.6)
f = 100Hz, 0.3Vp-p applied to Vcc_aud
(Fig. 8)
f = 100Hz, 0.3Vp-p applied to Vcc_aud
(Fig. 8)
f = 100Hz, 0.3Vp-p applied to Vcc_aud
(Fig. 8)
Offset voltage between any audio input
and R/Lout1, 2 (Fig. 5)
(excluding series external 6kΩ)
(excluding any external series resistor)
2
—
—
—
—
–30
48
—
—
–88
–62
–75
–44
+2
60
10
—
–76
—
—
—
+30
72
—
Vrms
dB
dB
dB
dB
mV
kΩ
Ω
f = 1kHz, 1Vrms input to two channels.
Phase Difference
Vpda
Phase difference of stereo output
—
0.05
—
Deg
measured
S/N ratio
S/NA
f = 1kHz, 1Vrms input (at maximum
volume).
72
95
—
dB
HPF @ 20Hz, LPF @ 20kHz. (Fig. 6)
Electronic Volume Control
Fine volume attenuation
step
Coarse volume
attenuation step
Mute
DC Offset -RTV, LTV
AEVC
AEVF
Amute
VoffTV
f = 1kHz, 0.5Vrms input. Set by I2C
(Fig.6)
f = 1kHz, 0.5Vrms input. Set by I2C
(Fig.6)
f = 1kHz, 1Vrms input. (Fig.6)
Offset voltage between any audio input
and RTV, LTV outputs (Fig.5)
0.6
7.5
–30
1
8
>80
+2
1.4
8.5
+30
dB
dB
dB
mV
– 11 –
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