Sony CXA2055P Datasheet
—1—
E96Z18-TE
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any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Description
The CXA2055P is a bipolar IC developed for high
resolution computer displays.
Features
• Built-in wide band amplifier
(130 MHz/–3 dB typ.@4 Vp-p)
• Input dynamic range : 1.0 Vp-p (typ.)
• R, G and B in a single package
• I2C bus control
Contrast control
Subcontrast control
Brightness control
OSD contrast control
Power save function
Input clamp pulse polarity selection
Output composite sync polarity selection
5-channel, 8-bit D/A
Blanking level control
• Built-in sync separator (G channel only)
• Built-in blanking mixing function
• Built-in OSD mixing function
• Built-in ABL function
• Video interval detection function
Applications
High resolution computer displays
Structure
Bipolar silicon monolithic IC
Preamplifier for High Resolution Computer Display
28 pin DIP (Plastic)
CXA2055P
Absolute Maximum Ratings (Ta=25 °C)
• Supply voltage VCC 14 V
• Operating temperature
Topr –20 to +75 °C
• Storage temperature Tstg –65 to +150 °C
• Allowable power dissipation
PD 1794 mW
(when mounted on a 11.5 cm × 12.0 cm substrate)
Operating Conditions
Recommended supply voltage
VCC1 12±0.5 V
VCC2 5±0.25 V
SDA
SCL
COFF-R
COFF-G
COFF-B
RIN
V
CC2
GIN
SYNC CON
BIN
CLP
OSD-R
OSD-G
OSD-B
VDET/COFF-RGB
DA/CSYNC/ABL
R-S/H
R-OUT
GND-R
G-S/H
G-OUT
GND-G
V
CC1
B-S/H
B-OUT
GND-B
BLK
YS
3
4
5
9
1
2
6
7
8
10
11
12
13
14
22
21
20
19
18
17
16
15
28
27
26
25
24
23
—2—
CXA2055P
SDA
SCL
COFF-R
COFF-G
COFF-B
RIN
V
CC2
GIN
SYNC
CON
BIN
CLP
OSD-R
OSD-G
OSD-B
VDET
/COFF-RGB
DA
/CSYNC
/ABL
R-S/H
R-OUT
GND-R
G-S/H
G-OUT
GND-G
V
CC1
B-S/H
B-OUT
GND-B
BLK
YS
D/A CONVERTER
CUTOFF (RGB)
CONTRAST
SUB CONTRAST (R)
SUB CONTRAST (G)
SUB CONTRAST (B)
OSD GAIN
BRIGHTNESS (R)
BRIGHTNESS (G)
BRIGHTNESS (B)
BLANKING
VDET LEVEL
CUTOFF (R)
CUTOFF (G)
CUTOFF (B)
PINSW1
BRIGHTNESS (R, G, B)
PINSW
LOGIC
PINSW0, 2
BRIGHTNESS
BLANKING
BUFFER AMP
BLANKING
OSD LOGIC
OSD PULSE (12PIN)
YS PULSE (15PIN)
BLANKING PULSE
ABL (27PIN)
GAIN
CONTROL
AMP
OSD YS
GENERATOR
CONTRAST
GAIN CONTROL DATA
SUB CONTRAST
Rch
OSD GAIN
VDET
COMPARATOR
VDET, SYNC SEP
VDET LEVEL
SYNC
COMPARATOR
SYNC POL
12V
Gch
Bch
to OSD
LOGIC
to OSD
LOGIC
to OSD
LOGIC
to OSD
LOGIC
5V
22
21
20
19
18
17
16
15
28
27
26
25
24
23
CLP
POL
I2C BUS
DECODER
3
4
5
9
1
2
6
7
8
10
11
12
13
14
To each MODE switch
Same as R channel
Same as R channel
—3—
CXA2055P
Pin Description
Pin
Symbol
Pin
Equivalent circuit Description
No. voltage
1
2
3
4
5
6
8
10
7
SDA
SCL
COFF-R
COFF-G
COFF-B
RIN
GIN
BIN
VCC2
—
—
—
—
5 V
1
VCC2
GND
4k
7.5k
7.5k
10k
5k
10k
15k
50µA
2
VCC2
GND
4k
10k
10k
5k
10k
15k
50µA
VCC2
GND
3
100
4
5
100
60k
50k
6
VCC2
GND
124
50µA
VCC1
8
10
5k
1mA
1k 1k
2k
2k
1k
I2C bus address and data input.
I2C bus clock signal input.
D/A converter outputs.
The variable range is 1 to 4 V.
Use as cut-off control voltages is
recommended.
R, G and B inputs.
When clamped, the input
voltage black level is
approximately 3.2 V.
Connect 0.1 µF or more in
series as a clamp capacitor.
5 V power supply.
—4—
CXA2055P
Pin
Symbol
Pin
Equivalent circuit Description
No. voltage
9
11
12
13
14
15
16
SYNC
CON
CLP
OSDR
OSDG
OSDB
YS
BLK
—
—
—
—
VCC2
GND
10k
9
1k
24k 70k
50µA50µA
11
VCC1
GND
22µA
30k
1.3V
12
VCC1
GND
150µA
13
14
124
1.25V
15
VCC1
GND
150µA
124
1.25V
16
VCC1
GND
49k
124
1.5V
100µA
Sync signal separation circuit
block during sync-on-video
signal input. Connect a sampleand-hold capacitor.
Clamp pulse input. The polarity
can be switched via the I2C bus.
The threshold level is
approximately 1.3 V.
R, G and B OSD pulse inputs.
The threshold level is
approximately 1 V.
OSD-BLK pulse input.
The threshold level is
approximately 1.7 V.
BLK pulse input.
The threshold level is
approximately 1.5 V.
—5—
CXA2055P
Pin
Symbol
Pin
Equivalent circuit Description
No. voltage
17
21
24
18
22
25
19
23
26
21
27
28
GND-B
GND-G
GND-R
B-OUT
G-OUT
R-OUT
B-S/H
G-S/H
R-S/H
VCC1
DA
/CSYNC
/ABL
VDET
/COF-RGB
0 V
—
—
12 V
—
VCC1
GND
200
18
22
25
VCC1
GND
19
23
26
1k
2.5V
1k1k1k
225µA
27
VCC2
GND
100
5k
50k
100k
100
4k
7.4k
1V
VCC2
GND
100
5k100
100
28
R, G and B independent GND.
R, G and B outputs.
Connection for external sampleand-hold capacitor (0.1 µF).
12 V power supply.
General-purpose D/A converter
output. Composite sync output.
TTL drive is possible.
VL=0.5 V or less, VH=4.0 V or more
RGB output amplitude gain
compensation input.
(common for all three channels)
Function switching is performed
via the I2C bus.
Video signal detection output.
VL=0.5 V or less, VH=4.0 V or more
General-purpose D/A converter
output.
The variable range is 1 to 4 V.
Function switching is performed
via the I2C bus.
—6—
CXA2055P
Electrical Characteristics Measurement Circuit
SDA
SCL
COFF-R
COFF-G
COFF-B
RIN
V
CC2
GIN
SYNC CON
BIN
CLP
OSD-R
OSD-G
OSD-B
VDET/COFF-RGB
DA/CSYNC/ABL
R-S/H
R-OUT
GND-R
G-S/H
G-OUT
GND-G
V
CC1
B-S/H
B-OUT
GND-B
BLK
YS
0.1µ
5V
10µ
0.1µ
0.01µ
0.1µ
0.1µ
0.1µ
0.1µ
12V
10µ
Video detector output
DAC4 output
DAC1 output
DAC2 output
DAC3 output
75
75
75
0.1µ
S1
3
4
5
9
1
2
6
7
8
10
11
12
13
14
S2
Rch OUT
Gch OUT
0.1µ
Bch OUT
22
21
20
19
18
17
16
15
28
27
26
25
24
23
ABL input
I2C bus
control
Composite sync output
DAC5 output
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