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Description
The CXA2040Q is an I2C bus-compatible 5-input,
3-output video switch for TVs.
Features
• Serial data control via I2C bus
• 5 composite video input systems
• 2 Y/C (S terminal) input systems
• 3 composite video output systems
• 1 Y/C (S terminal) output system
• Input can be selected independently for each
output system.
• SYNC_ID function for CV1 system input
• Built-in 6dB amplifier for CVOUT2 system output
• Built-in Y/C MIX circuit
• Slave address can be changed (90H/92H).
• High impedance maintained by I2C bus line (SDA,
SCL) even when power is OFF.
Applications
TVs
Pin Configuration (Top View)
CXA2040Q
32 pin QFP (Plastic)
Absolute Maximum Ratings (Ta = 25°C)
• Supply voltageVCC12V
• Operating temperatureTopr–20 to +75°C
• Storage temperatureTstg –65 to +150 °C
• Allowable power dissipation PD1.0W
(when mounted on a 50mm × 50mm board)
Operating Conditions
Supply voltageVCC9.0 ± 0.5V
Structure
Bipolar silicon monolithic IC
CV2
CC
V
CV3
NC
CV4
GND
CV5
BIAS
25
26
27
28
29
30
31
32
24
NC
23
1
2
Y1
CV1
NC
SYNCTC
22
3
C1
21
4
SDA
S1
20
5
SCL
Y2
19
6
ADR
S2
18
NC
CVOUT1
17
NC
16
CVOUT2
15
NC
14
13
CVOUT3
12
NC
YOUT
11
10
NC
9
COUT
8
7
C2
NC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E95Z44-ST
Block Diagram
30
GND
26
CXA2040Q
CC
V
SCL
20
SDA
21
2
C BUS DECODER
I
19
ADR
S1
4
S2
6
SYNCTC
CV1
CV2
CV3
CV4
CV5
Y1
C1
22
23
25
27
29
31
SYNC DETECT
CV1
CV2
CV1
CV2
CV3
CV4
CV5
1
3
CV6
CV3
CV4
CV5
CV6
CV7
MUTE
CV1
CV2
CV3
CV4
CV5
CV6
CV7
MUTE
CV1
CV2
CV3
CV4
CV5
CV6
CV7
MUTE
SW1
SW2
SW3
6dB
17
15
13
CVOUT1
CVOUT2
CVOUT3
5
Y2
C2
7
32
BIAS
∗
Numbers inside circles indicate the IC pin numbers.
BIAS
CV7
MUTE
Y1
Y2
MUTE
C1
C2
MUTE
– 2 –
SW4
SW5
11
9
YOUT
COUT
Pin Description
Pin
SymbolPin voltageEquivalent circuitDescription
No.
1
Y1
5
Y2
3
C1
7
C2
46S1
S2
4.5V
CXA2040Q
V
CC
Y/C separation signal inputs.
Biased to approximately 4.5V.
1
5
3
7
20k
147
× 2
28k
Input the input signals through
capacitors. Connect protective
resistor of 220Ω between these
pins and the capacitors.
Y1 and Y2 pins: Luminance
signals input.
C1 and C2 pins: Chrominance
signals input.
CC
V
Applying a DC voltage to S1 and
S2 pins allows these voltages to
be applied to the microcomputer
50k
50k
4
6
100k
× 4
as the I2C bus status register data.
S1, S2 = 0 to 2V
OPEN = 0, SEL = 1
S1, S2 = 4.75 to 7.25V
OPEN = 0, SEL = 0
S1, S2 = 9.5 to 12V
OPEN = 1, SEL = 0
119YOUT
COUT
17
CVOUT1
15
CVOUT2
13
CVOUT3
4.5V
4.5V
2001.2k
× 5
11
× 6
9
2001.2k
× 5
17
15
× 6
13
× 2
× 2
× 2
× 2
VCC
Y/C signal outputs.
YOUT pin: Luminance signal
output.
COUT pin: Chrominance signal
output.
VCC
Composite video signal outputs.
CVOUT1, CVOUT2:
0dB output with respect to
the input signal.
CVOUT2:
+6dB output with respect
to the input signal.
– 3 –
Pin
SymbolPin voltageEquivalent circuitDescription
No.
VCC
CXA2040Q
19ADR
20SCL—
20
19
× 4
72k
28k
4k
Selects the slave address for the
I2C bus.
90H at 1.0V or less
92H at 3.5V or more
90H when open
V
CC
I2C bus signal input.
Connect protective resistor of
220Ω between this pin and the
SCL line.
21SDA—
22SYNCTC
22
21
× 6
147
147
1.2k
4k
1.2k
CC
V
I2C bus signal input.
Connect protective resistor of
220Ω between this pin and the
SDA line.
CC
V
Sync tip clamp time constant for
Sync Separation.
Connect 68kΩ resistor between
this pin and VCC.
Connect 10µF capacitor between
this pin and GND.
– 4 –
Pin
SymbolPin voltageEquivalent circuitDescription
No.
CXA2040Q
23CV14.5V
25
CV2
27
29
31
CV3
CV4
CV5
4.5V
23
25
27
29
31
20k
147
28k
20k
147
28k
V
CC
Composite video signal input.
Biased to approximately 4.5V.
Input the input signal through
capacitor. Connect protective
resistor of 220Ω between this pin
and the capacitor.
The composite video signal input
to CV1 is also taken into the
"SYNC DETECT circuit" of which
SYNC is existed or not.
V
CC
Composite video signal input.
Biased to approximately 4.5V.
Input the input signals through
capacitors. Connect protective
resistor of 220Ω between these
pins and the capacitors.
26VCC
30GND
32
BIAS
2
8
10
12
14
NC
16
18
24
28
9.0V
0.0V
4.5V
∗1
∗1
32
1.2k
20k
22.5k
Power supply.
Apply 9.0V.
GND.
CC
V
4.5V bias.
Attach a decoupling capacitor
between this pin and GND.
This pin cannot be used as an
external power supply.
NC (not connected).
Connect to GND.
If these NC pins are not connected
to GND, the cross talk and other
desired values indicated in the
Electrical Characteristics cannot
be obtained.
– 5 –
∗1
Applied externally.
CXA2040Q
V
mA
39.0
4.75
27.7
4.50
18.0
4.25
Measurement contentsMin.Typ.Max.Unit
Measure the pin inflow
current.
Measure the pin voltage.
VCV11
dB
0.40
0.00
–0.40
VCV11
0.3Vp-p
20Log
VCV21
dB
6.75
6.25
5.75
VCV21
0.3Vp-p
20Log
VCVM11
dB
0.60
0.10
–0.40
VCVM11
0.3Vp-p
Since the sum of 0.15Vp-p
and 0.15Vp-p is input to
each switch, calculations
20Log
∗
are performed with 0.3Vp-p.
26
32
15
13, 17
Measurement pins
C bus
2
C bus
2
Measurement conditions
CC = 9V, no signal
V
VCC = 9V, no signal
CV1 In, CV2 In, CV3 In,
CV4 In or CV5 In
100kHz, 0.3Vp-p CW
Select each input with I
control and obtain the I/O gain.
CV1 In, CV2 In, CV3 In,
CV4 In or CV5 In
100kHz, 0.3Vp-p CW
Select each input with I
control and obtain the I/O gain.
Y1 and C1 (CV6) In or
Y2 and C2 (CV7) In
See Electrical Characteristics Measurement Circuit 1 for all other items.
Symbol
CC
VBIAS
I
GCV11
GCV21
13, 17
C bus
2
100kHz, 0.15Vp-p CW
Select each input with I
control and obtain the I/O gain.
GCVM11
Electrical CharacteristicsSee Electrical Characteristics Measurement Circuit 2 for Cross talk and MUTE.(Ta = 25°C, VCC = 9V)
Current
No.Item
consumption
Pin voltage
1
2
CV system
gain 1
3
CV system
gain 2
4
– 6 –
CV system
(Y/C MIX)
gain 1
5
CXA2040Q
Typ.Max.Unit
Measurement contentsMin.
VCVM21
dB
7.05
6.40
5.75
VCVM21
0.3Vp-p
Since the sum of 0.15Vp-p
and 0.15Vp-p is input to
each switch, calculations
20Log
∗
are performed with 0.3Vp-p.
VY11
dB
0.40
0.00
–0.40
VY11
0.3Vp-p
20Log
VC11
dB
0.40
0.00
–0.40
VC11
0.3Vp-p
20Log
VCV12
dB
0.55
–0.15
–0.85
VCV12
20Log
VCV11
VCV11 and VCV12 should be
∗
the same I/O.
15
Measurement pins
C bus
2
Measurement conditions
Y1 and C1 (CV6) In or
Y2 and C2 (CV7) In
100kHz, 0.15Vp-p CW
Symbol
Select each input with I
CVM21
G
11
C bus
2
control and obtain the I/O gain.
Y1 In or Y2 In
100kHz, 0.3Vp-p CW
Select each input with I
control and obtain the I/O gain.
GY11
9
C bus
2
C1 In or C2 In
100kHz, 0.3Vp-p CW
Select each input with I
control and obtain the I/O gain.
GC11
13, 17
C bus
2
CV1 In, CV2 In, CV3 In,
CV4 In or CV5 In
10MHz, 0.3Vp-p CW
Select each input with I
control and obtain the I/O gain.
Then obtain the difference from the
I/O gain measured by Test 3.
∆GCV12
Item
No.
CV system
(Y/C MIX)
gain 2
6
Y system
gain
7
– 7 –
C system
gain
8
CV system
frequency
response 1
9
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