Sony CXA1992R Datasheet
CXA1992R
For the availability of this product, please contact the sales office.
RF Signal Processing Servo Amplifier
Description
The CXA1992R is a bipolar IC developed for CD
player RF signal processing and servo control. This
IC supports three-spot optical system pickups.
Features
• Automatic focus bias adjustment circuit
• Automatic tracking balance and gain adjustment
circuits
• RF level control circuit
• Interruption countermeasure circuit
• Sled overrun prevention circuit
• Anti-shock circuit
• Defect detection and prevention circuits
• RF 1-V amplifier, RF amplifier
• APC circuit
• Focus and tracking error amplifier
• Focus, tracking and sled servo control circuits
• Focus OK circuit
• Mirror detection circuit
• Single power supply and dual power supplies
Absolute Maximum Ratings (Ta = 25°C)
• Supply voltage VCC 12 V
• Operating temperature Topr –20 to +75 °C
• Storage temperature Tstg –65 to +150 °C
• Allowable power dissipation
Recommended Operating Conditions
Operating supply voltage VCC – VEE 3.0 to 5.5 V
Preliminary
52 pin LQFP (Plastic)
PD 600 mW
Applications
CD players
Structure
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
PE96527-ST
Block Diagram
CXA1992R
FE_BIAS
ATSC
TDFCT
8
RF_I
VEE
MIRR
TGFL
VCC
Charge
VEE
SRCH
CP
31
VCC
VEE
IIL DATA REGISTER
INPUT SHIFT REGISTER
ADDRESS DECODER
SENS SELECTOR
OUTPUT DECODER
BAL1-4
TOG1-4
up
9
TGU
CB
CC1
29
DFCT1
FSET
11
28
CC1
PS1-4TM1-7TG1-2FS1-4IFB1-6
12
FSET
30
VCC
DFCT
IIL
↓
TTL
MIRR
TM7
TG2
10
TG2
CC2
TA_M
FOK
27
SENS2
26
IIL
↓
TTL
TTL
↓
IIL
VCC
ISET
VCC
VCC
TM6
TM4
TM5
TM3
VEE
VEE
13
TA_O
SENS1
25
C. OUT
24
XRST
23
DATA
22
XLT
21
CLK
20
19
LOCK
18
CC
V
ISET
17
16
SL_O
15
SL_M
14
SL_P
TM2
PD
VEE
LASER POWER CONTROL
IFB3
IFB4
TRK. GAIN
WINDOW COMP.
TG1
DFCT
FS4
3
FDFCT
LD
35
36
VEE
FE AMP
IFB5
IFB6
TRACKING
PHASE COMPENSATION
FOCUS
PHASE COMPENSATION
4
FGD
PD2
PD1
37
38
39
PD1 IV
PD2 IV
AMP
AMP
40
41
F
E
42
43
EI
V
EE
44
TEO
45
46
LPFI
47
TEI
48
49
TZC
50
51
VC
52
FZC
V
EE
E IV AMP
TOG2
TOG1
TZC COMP.
VCC
FZC COMP.
F IV AMP
BAL2
BAL1
TOG4
TOG3
ATSC
WINDOW
COMP.
VCC
BAL3
VEE
BAL4
1
FEO
TGFL
E-F BALANCE
WINDOW COMP.
DFCT
TM1
2
FEI
VCC
APC
VCC
IFB2
IFB1
VEE
RFTC
FO. BIAS
WINDOW COMP.
5
FLB
RF_M
34
RF SUMMING AMP
FOH
FOL
TGH
TGL
BALH
BALL
ATSC
TZC
FZC
6
FE_O
RF_O
32
33
VEE
LEVEL S
VCC
FOK
LDON
LPC
LPCL
DFCTO
FS1
FS2
7
FE_M
– 2 –
Pin Description
CXA1992R
Pin
No.
1
2
3
Symbol
FEO
FEI
FDFCT
I/O
O
I
I
Equivalent circuit
25p
147
1
174k
300µ
147
2
100k
147
3
10µ
10µ
3µ
Focus error amplifier output.
Connected internally to the window
comparator input for bias
adjustment.
Focus error input.
Capacitor connection pin for defect
Description
time constant.
4
5
6
13
16
FGD
FLB
FE_O
TA_O
SL_O
Ground this pin through a capacitor
for cutting the focus servo highfrequency gain.
External time constant setting pin
for boosting the focus servo lowfrequency.
Focus drive output.
Tracking drive output.
Sled drive output.
40k
68k
130k
4µ
330k
470k
I
147
4
5
I
O
6
O
O
13
16
250µ
FE_M
7
I
7
147
90k
Focus amplifier inverted input.
50k
2µ
– 3 –
CXA1992R
Pin
No.
8
9
10
Symbol
SRCH
TGU
TG2
I/O
I
I
I
Equivalent circuit
147
8
50k
110k
20k
9
147
11µ
External time constant setting pin for
generating focus search waveform.
External time constant setting pin
for switching tracking high-
Description
frequency gain.
82k
External time constant setting pin for
10
470k
switching tracking high-frequency
gain.
11
12
14
FSET
TA_M
SL_P
I
11
147k
Peak frequency setting pin for focus
and tracking phase compensation
amplifier.
15k 15k
147
100k
Tracking amplifier inverted input.
11µ
Sled amplifier non-inverted input.
2µ
I
I
12
14
147
15
SL_M
I
15
147
22µ
Sled amplifier inverted input.
– 4 –
CXA1992R
Pin
No.
17
Symbol
ISET
18 VCC
19 LOCK
CLK
20
22
DATA
I/O
I
I
Equivalent circuit
Description
Connect an external capacitance to
17
147
set the current which determines
the Focus search, Track jump, and
Sled kick heights.
50µ
V
18
CC
Positive power supply.
The sled overrun prevention circuit
I
19
I
20
22
147
1k
20µ
I
operates when this pin is Low.
(no pull-up resistance)
Serial data transfer clock input from
CPU. (no pull-up resistance)
Serial data input from CPU.
(no pull-up resistance)
21
23
24
25
26
27
XLT
XRST
C. OUT
SENS1
SENS2
FOK
I
147
21
23
I
2k
5p
20µ
O
O
24
25
26
147
O
20k
100k
Latch input from CPU.
(no pull-up resistance)
Reset input; resets at Low.
(no pull-up resistance)
Track number count signal output.
Outputs FZC, DFCT1, TZC, BALH,
TGH, FOH, ATSC, and others
according to the command from CPU.
Outputs DFCT2, MIRR, BALL, TGL,
FOL, and others according to the
command from the CPU.
20k
O
27
147
40k
Focus OK comparator output.
– 5 –
100k
CXA1992R
Pin
No.
28
29
30
31
Symbol
CC2
CC1
CB
CP
I/O
I
O
I
I
30
31
120k
Equivalent circuit
147
11k
100k
147
147
43k
29
1.5k
Description
Input for the defect bottom hold
output with capacitance coupled.
Defect bottom hold output.
Connected internally to the
interruption comparator input.
28
Connection pin for defect bottom
hold capacitor.
Connection pin for MIRR hold
capacitor.
MIRR comparator non-inverted
input.
RF_I
32
33
RF_O O
34
RF_M
RFTC
35
I
147
32
147
33
147
Input for the RF summing amplifier
output with capacitance coupled.
RF sunning amplifier output. Eyepattern check point.
34
RF summing amplifier inverted
10k10k
I
input.
The RF amplifier gain is determined
by the resistance connected
between this pin and RFO pin.
I
35
147
50µ
50µ
External time constant setting pin
during RF level control.
10µ
– 6 –
CXA1992R
Pin
No.
36
37
Symbol
LD
PD
I/O
O
I
37
Equivalent circuit
36
8µ
147
1k
10k
20µ
55k
10k
Description
APC amplifier output.
APC amplifier input.
38
39
40
41
42
PD1
PD2
FE_BIAS
F
E
10k
I
I
38
39
147
4k
100µ
8k
2k
RF I-V amplifier inverted input.
Connect these pins to the photo
diode A + C and B + D pins.
11.6k
Bias adjustment of focus error
I
40
I
I
41
42
147
6µ
12p
260k
147
500
10µ
amplifier.
Leave this pin open for automatic
adjustment.
F I-V and E I-V amplifier inverted
input.
Connect these pins to photo diodes
F and E.
– 7 –
CXA1992R
Pin
No.
43
44
45
Symbol
EI
VEE
TEO
I/O
—
—
O
45
43
Equivalent circuit
6.8k
260k
147
44
147
16k 7.5k 1.5k7.5k
10k
110k 56k 13k
75k
150k
27k
VEE
3.3k
150k
Description
I-V amplifier E gain adjustment.
(When not using automatic balance
adjustment)
Negative power supply.
Tracking error amplifier output.
E-F signal is output.
46
47
50
LPFI
TEI
TDFCT
I
46
147
Comparator input for balance
adjustment.
(Input from TEO through LPF)
7µ
I
47
I
50
147
147
100k
3µ
Tracking error input.
Capacitor connection pin for defect
time constant.
– 8 –
CXA1992R
Pin
No.
48
49
Symbol
ATSC
TZC
I/O
I
I
48
Equivalent circuit
147
49
1k
100k
10µ 10µ
147
Description
100k
Window comparator input for ATSC
detection.
1k
10µ
Tracking zero-cross comparator
input.
75k
51
52
VC
FZC
10µ
120
(VCC + VEE)/2 direct voltage output.
120
51k
Focus zero-cross comparator input.
O
I
51
52
50
VC
147
75k 9k
– 9 –
CXA1992R
Electrical Characteristics (VCC = 1.5V, VEE = 1.5V, Topr = 25°C)
TEST
T1
T2
T3
T4
T5
T6
T7
T8
T9
Item
Current
consumption 1
Current
consumption 2
Center amplifier
output offset
Offset
Voltage gain
RF amplifier
Max. output
amplitude - High
Max. output
amplitude - Low
Offset
Voltage gain 1
(PHD1)
SW conditions
(ON switches)
51
51
51, 51D
33S, 38, 39
33D, 38
33D, 39
1D
1S, 38
SD
RST
RST
RST
RST
RST
RST
RST
39F
39F
Input
pin
18
44
—
38
39
38
39
38
39
38
Measurement pin
18
44
51
33
33
33
33
1
1
Measurement
conditions
1kHz I/O ratio
V2 = 0.2VDC
V2 = 0.2VDC
1FB6: ON
1kHz I/O ratio
Min. Typ. Max. Unit
mA
31.2
24.0
16.8
100
50
31.1
—
–0.3
120
33
mA
mV
mV
dB
mV
dB
–31.2
–100
–50
25.1
1.2
—
–120
27
–24.0
0
0
28.1
0
30
–16.8
V
V
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
Voltage gain 2
(PHD2)
Voltage gain
difference
Max. output
voltage – High
Max. output
voltage – Low
BIAS0
FE amplifier
BIAS1
BIAS2
BIAS3
BIAS4
BIAS5
1S, 39
1S
1D, 39
1D, 38
1D
1D
1D
1D
1D
1D
39F
39F
39F
39F
3BF
3BE
3BD
3BB
3B7
3AF
39
39
38
1
1
1
1
1
1
1
1
1
1kHz I/O ratio
V2 = 100mVDC
V2 = 100mVDC
IFB1, 2, 3, 4, 5, 6:
OFF
IFB1: ON, BIAS0:
reference
IFB2: ON, BIAS0: reference
Output gain difference with T15
IFB3: ON, BIAS0: reference
Output gain difference with V17
IFB4: ON, BIAS0: reference
Output gain difference with V18
IFB5: ON, BIAS0: reference
Output gain difference with V19
27
–3
1
—
560
30
0
1.3
–1.3
801
–25
6
6
6
6
33
3
—
–1
1042
dB
dB
V
V
mV
mV
dB
dB
dB
dB
T20
BIAS6
1D
39F
1
– 10 –
IFB6: ON, BIAS0: reference
Output gain difference with V20
6
dB
CXA1992R
TEST Item
T21
T22
T23
T24
T25
T26
T27
T28
FOH threshold
FOL threshold
FE amplifierTE amplifierAPC
Offset
GAIN UP (F)
GAIN UP (E)
Voltage gain
F0
Voltage gain
F1
Voltage gain
F2
SW conditions
(ON switches)
1D, 25D, 40
1D, 26D, 40
45D
41, 45S
42, 45S
41, 45S
41, 45S
41, 45S
SD
39F
39F
34F
308
36F
308
36F
308
34F
34E
30F
34D
Input
pin
40
40
41
42
41
42
41
41
41
Measurement pin
1
1
45
45
45
45
45
45
Measurement
conditions
I
FB6: ON
Pin 1 voltage when SENS1
(Pin 25) goes from High to Low
IFB6: ON
Pin 1 voltage when SENS2
(Pin 26) goes from High to Low
TOG: OFF,
BAL1, 2, 3: ON
V1 = 2 kHz, I/O ratio
TOG: OFF, BAL1, 2, 3: ON
V1 = 2 kHz, I/O ratio
TOG: OFF, BAL1, 2, 3: ON
V1 = 2kHz, TOG: OFF
I/O ratio
V1 = 2kHz, TOG1: ON
Reference to F0
V1 = 2kHz, TOG2: ON
Reference to F0
Min. Typ. Max. Unit
–25
8.6
8.6
2.5
–2.6
–4.4
20
–20
0
11.6
11.6
5.5
–2.1
–3.9
25
14.6
14.6
8.5
–1.6
–3.4
mV
mV
mV
dB
dB
dB
dB
dB
T29
T30
T31
T32
T33
T34
T35
T36
T37
T38
Voltage gain
F3
Voltage gain
F4
Voltage gain
E0
Voltage gain
E1
Voltage gain
E2
Voltage gain
E3
Voltage gain
E4
Max. output
voltage – High
Max. output
voltage – Low
Output voltage
1
41, 45S
41, 45S
42, 45S
42, 45S
42, 45S
42, 45S
42, 45S
41, 45D
42, 45D
36D, 37
34B
347
34F
30F
00
30E
30D
30B
307
34F
308
34F
308
3C4
41
41
42
42
42
42
42
41
42
37
45
45
45
45
45
45
45
45
45
36
V1 = 2kHz, TOG3: ON
Reference to F0
V1 = 2kHz, TOG4: ON
Reference to F0
V1 = 2kHz, BAL: OFF
I/O ratio
V1 = 2kHz, BAL1: ON
Reference to E0
V1 = 2kHz, BAL2: ON
Reference to E0
V1 = 2kHz, BAL3: ON
Reference to E0
V1 = 2kHz, BAL4: ON
Reference to E0
V1 = 1VDC, TOG: OFF,
BAL1, 2, 3: ON
V1 = 1VDC, TOG: OFF,
BAL1, 2, 3: ON
I37 = 364µA
–7.7
–12.2
–0.33
0.17
0.6
1.46
3.03
0.5
—
–7.2
–11.7
2.67
0.47
0.9
1.76
3.33
–704
–6.7
–11.2
5.67
0.77
1.2
2.06
3.63
—
–0.5
dB
dB
dB
dB
dB
dB
dB
V
V
mV
T39
T40
T41
T42
Output voltage
2
Output voltage
3
Output voltage
4
LD OFF
36D, 37
36D, 37
36, 36D
36, 36D, 37
3C4
3C4
3C4
3C0
37
37
37
37
36
36
36
36
– 11 –
I37 = 439µA
I37 = 515µA
0.8mA sink
I37 = 515µA,
LD: OFF
0
1.1
–233
669
1.3
500
—
mV
mV
mV
V
CXA1992R
TEST Item
T43
T44
T45
T46
T47
T48
T49
T50
T51
30% limit
10% limit
RF AGC
–30% limit
–10% limit
Direct voltage
gain
FCS total gain
Feed through
1
FZC threshold
Max. output
voltage – High
Focus servo
SW conditions
(ON switches)
32, 36D, 37
32, 36D, 37
36D, 37, 38,
39
36D, 37, 38,
39
2, 6D
2, 6S
26D, 52
2, 6D, 6S
SD
3C7
3C5
3C7
3C5
08
—
00
08
00
08
Input
pin
37
32
37
32
37
38
39
37
38
39
2
—
2
52
2
Measurement pin
36
36
36
36
6
—
6
52
6
Measurement
conditions
I37 = 439µA
Output difference with T39
I37 = 439µA
Output difference with T39
I37 = 515µA
Output difference with T40
I37 = 515µA
Output difference with T40
T9 + T47
Output gain difference between
SD = 00 and SD = 08.
Pin 52 voltage when SENS1
(Pin 25) goes from Low to High
V1 = 200mVDC
Min. Typ. Max. Unit
18
49
—
181
1
1304
470
–1307
–466
21
51
—
221
1.3
24
53
–30
261
—
mV
mV
mV
mV
dB
dB
dB
mV
V
T52
T53
T54
T55
T56
T57
T58
T59
T60
T61
T62
T63
T64
Max. output
voltage – Low
Search
voltage (–)
Search
voltage (+)
Direct voltage
gain
TRK total gain
Feed through
1
Max. output
voltage – High
Max. output
voltage – Low
Jump output
voltage (–)
Tracking servo
Jump output
voltage (+)
ATSC
threshold (–)
ATSC
threshold (+)
TZC threshold
2, 6D, 6S
6D
6D
13D, 47
13S, 47
13D, 47
13D, 47
13D
13D
10, 10D, 48
10, 10D, 48
25D, 49,
49B
08
02
03
25
—
20
25
20
25
20
25
2C
28
10
10
20
—
—
47
—
47
47
47
48
48
49
V1 = –200mVDC
2
6
6
6
13
—
13
13
13
T26 + T55
Output gain difference between
SD = 20 and SD = 25.
V1 = –0.5VDC
V1 = 0.5VDC
13
13
48
48
49
Input voltage when TG2
(Pin 10) goes from Vcc/2 to Vcc
Input voltage when TG2 (Pin 10)
goes from Vcc/2 to Vcc
Pin 49 voltage when
SENS1 (Pin 25) is 0V
—
–640
360
12.2
18.1
—
1
—
–640
360
–25
7
–20
–1.3
–500
500
14.6
20.1
—
1.3
–1.3
–500
500
–15
15
0
–360
640
17.6
22.1
–39
–360
640
–1
—
–1
–7
25
20
V
mV
mV
dB
dB
dB
V
V
mV
mV
mV
mV
mV
– 12 –
CXA1992R
TEST Item
T65
T65
T67
T68
T69
T70
T71
T72
T73
BAL COMP
threshold – High
BAL COMP
threshold – Low
GAIN COMP
threshold – High
Tracking servoFOKSled servo
GAIN COMP
threshold – Low
FOK
threshold
Voltage gain
Feed through
Max. output
voltage – High
Max. output
voltage – Low
SW conditions
(ON switches)
25D, 46,
46B
26D, 46,
46B
25D, 45,
45D
26D, 45,
45D
27D, 32
14, 14B, 15,
16S
14, 14B,
16S
14, 14B,
16D
14, 14B,
16D
SD
300
300
340
340
—
25
20
25
25
25
Input
pin
46
46
45
45
32
14
14
14
14
Measurement pin
46
46
45
45
32
16
16
16
16
Measurement
conditions
Pin 46 voltage when SENS1
(Pin 25) goes from High to Low
Pin 46 voltage when SENS2
(Pin 26) goes from High to Low
Pin 45 voltage when SENS1
(Pin 25) goes from High to Low
Pin 45 voltage when SENS2
(Pin 26) goes from Low to High
Pin 32 voltage when
Pin 27 is 0V
V1 = 100 Hz, I/O ratio
Output gain difference between
SD = 20 and SD = 25.
V1 = 400mVDC
V1 = 400mVDC
Min. Typ. Max. Unit
50
—
1
—
20
–20
400
300
–367
—
—
1.3
–1.3
—
–34
—
–1
mV
mV
mV
mV
mV
dB
dB
V
V
T74
T75
T76
T77
T78
T79
T80
T81
T82
Kick voltage 1
Kick voltage 2
Max. operating
frequency 1
Min. input
operating voltage 1
MIRROR
Max. input
operating voltage 1
Min. operating
frequency 1
Max. operating
frequency 1
Min. input
DEFECT
operating voltage 1
Max. input
operating voltage 1
16D
16D
26S, 32
26S, 32
26S, 32
25S, 38, 39
25S, 38, 39
25S, 38, 39
25S, 38, 39
20
20
20
20
20
10
10
10
10
—
—
32
32
32
38
39
38
39
38
39
38
39
16
16
26
26
26
25
25
25
25
REV × 1
FWD × 1
Measures at SENS2
pin.
Measures at SENS2
pin.
Measures at SENS2
pin.
Measures at SENS1
pin.
Measures at SENS1
pin.
Measures at SENS1
pin.
Measures at SENS1
pin.
–750
450
30
—
1.8
—
2.5
—
1.8
–600
600
—
—
—
—
—
—
—
–450
750
—
0.3
—
1
—
0.5
—
mV
mV
kHz
Vp-p
Vp-p
kHz
kHz
Vp-p
Vp-p
– 13 –
CXA1992R
DC OUTPUT
GND
GND
STORAGE2
R21
R18
GND
100
10k
I36
I37
R35
R31
0mA
0mA
R24
GNDGND
10k
100k
XRST
DATA
XLT
CLK
20
CLK
LPFI
46
D_GND
C10 33µ
S19
19
LOCK
TEI
47
R43 120k
S17
18
CC
V
ATSC
48
10k
R50
100
R49
C11 47µ
A18
17
TZC
49
ISET
S16D
R37
S16S
120k
R42
16
SL_O
TDFCT
50
R41
R36
R44
13k
5.1k
S15
A14
S16
10k
60k
15
SL_M
VC
51
14
SL_P
FZC
52
S14B
S14
13k
S10
1000P
R13
R33
R30
R27
S10D
R23
47k
C3
200k
100k
10k
200k
1000P
R34
S13S
S6S
R16
R8
100
R32
S13D
10k
R29
10k
R26
10k
R25
S8D
S6D
10k
R22
100
R19
13k
A3
100
R10
R7
10k
10k
TA_O
TA_M
FSET
TG2
TGU
SRCH
FE_M
FE_O
FLB
FGD
FDFCT
FEI
FEO
13
S12
121
C8
0.01µ
11
R28
510k
10
S9
9
8
S7
7
R20
100k
6
C4
5
S5
4
S4
S3
3
S2
2
S1S
S1D
STORAGE1
GND
GND
100
100
R47
S26D
RF_O
RF_M
RFTC
R52
10k
10k
R40
26
SENS2
FE_BIAS
40
S25S
R46
S25D
R51
10k
R39
25
SENS1
F
41
100
10k
S24S
R45
S24D
10k
10k
R38
24
C. OUT
E
42
23
XRST
EI
43
22
DATA
EE
V
44
21
XLT
TEO
45
100
R54
C9
S28
3300p
C7
1000p
C6
3300p
10k
S33S
C5
S33D
1M
R15
10k
R14
330
R12
10k
R11
R9
10k
S27S
0.1µ
S37
S38
S39
S32
S27D
R17
S36D
S36
R53
S26S
10k
R48
FOK
2728
CC2
CC1
29
CB
30
CP
31
RF_I
32
33
22k
34
35
LD
36
PD
37
PD1
38
PD2
39
AC
DC
V2
EE
GND
V
VCC
S40
S41
S42
S43
I40
0mA
R5
390k
R4
R6
390k
S45
13k
C2 33µ
A44
Electrical Characteristics Measurement Circuit
S45S
R2
100
S46
S45D
S46B
R1
10k
– 14 –
S47
S48
A46
S50
S49
A50
S49B
A49
C1
1000P
S52
S51
S51I
I51
S51D
R3
0mA
10k
AC
DC
V1
GND
Application Circuit 1 (±2.5V power supply)
CXA1992R
1k
100k
0.01µ
0.047µ
330k
0.022µ
Vcc
A
C
B
D
F
E
VEE
150k
0.01µ
47k
470p
0.022µ
3.3µ
0.1µ
40
41
42
43
44
45
46
47
48
49
50
51
52
V
EE
39
FE_BIAS
F
E
EI
V
EE
TEO
LPFI
TEI
ATSC
TZC
TDFCT
VC
FZC
1
10k
10k
2200p
PD2
FEO
500
Vcc
1µ
22
100µ
10µH
LD
PD
VEE VEE
100
37
38
PD
PD1
FDFCT
FEI
2
3
680k
0.1µ
36
4
LD
FGD
0.1µ
1µ
0.01µ
22k
1M
35
5
RFTC
FLB
0.1µ
DRIVER
34
FE_O
6
RF_M
100k
33
7
RF_O
FE_M
32
RF_I
SRCH
8
4.7µ
0.033µ
31
CP
TGU
9
0.033µ
0.01µ
30
10
CB
TG2
510k
Vcc
0.033µ
29
FSET
11
CC1
28
CC2
TA_M
12
100k
0.015µ
27
FOK
SENS2
SENS1
C. OUT
XRST
DATA
XLT
CLK
LOCK
Vcc
ISET
SL_O
SL_M
SL_P
TA_O
13
DRIVER
26
25
24
23
22
21
20
19
18
17
16
15
14
60k
0.015µ
100k
82k
Vcc
3.3µ
22µ
MICRO
COMPUTER
DSP
V
EE
DRIVER
8.2k
15k
Application Circuit 2 (Single +5V power supply)
10k
10k
PD2
FEO
500
Vcc
1µ
22
100µ
10µH
LD
PD
100
1M
37
38
36
LD
PD
PD1
FDFCT
FEI
FGD
4
2
3
680k
0.1µ
0.1µ
2200p
100k
0.01µ
0.047µ
0.022µ
CC
V
1k
330k
Vcc
A
C
B
D
F
E
150k
0.01µ
47k
470p
10µ
10µ
0.022µ
3.3µ
0.1µ
40
41
42
43
44
45
46
47
48
49
50
51
52
39
FE_BIAS
F
E
EI
V
EE
TEO
LPFI
TEI
ATSC
TZC
TDFCT
VC
FZC
1
35
5
RFTC
FLB
0.1µ
DRIVER
1µ
34
FE_O
6
22k
RF_M
100k
33
7
0.01µ
RF_O
FE_M
32
SRCH
8
4.7µ
RF_I
0.033µ
31
CP
TGU
9
0.033µ
0.01µ
30
10
CB
TG2
510k
Vcc
0.033µ
29
FSET
11
CC1
28
CC2
TA_M
12
100k
0.015µ
27
SENS2
SENS1
C. OUT
XRST
DATA
XLT
CLK
LOCK
ISET
SL_O
SL_M
SL_P
TA_O
13
DRIVER
FOK
Vcc
MICRO
COMPUTER
DSP
26
25
24
23
22
21
20
19
Vcc
18
60k
17
100k
82k
3.3µ
22µ
0.015µ
8.2k
15k
DRIVER
16
15
14
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
– 15 –
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