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VCR2N/4N/7N
Vishay Siliconix
JFET Voltage-Controlled Resistors
PRODUCT SUMMARY
Part Number V
VCR2N −7 −25 60
VCR4N −7 −25 600
VCR7N −5 −25 8000
FEATURES BENEFITS APPLICATIONS
D Continuous Voltage-Controlled
Resistance
D High Off-Isolation
D High Input Impedance
DESCRIPTION
Max (V) V
GS(off)
(BR)GSS
Min (V)
r
DS(on)
Max ()
D Gain Ranging Capability/Wide Range
Signal Attenuation
D No Circuit Interaction
D Simplified Drive
D Variable Gain Amplifiers
D Voltage Controlled Oscillator
D AGC
The VCR2N/4N/7N JFET voltage controlled resistors have an
ac drain-source resistance that is controlled by a dc bias
voltage (VGS) applied to their high impedance gate terminal.
Minimum r
pinch-off voltage, r
occurs when VGS = 0 V. As VGS approaches the
DS
rapidly increases. This series of junction
DS
FETs is intended for applications where the drain-source
voltage is a low-level ac signal with no dc component.
TO-206AA
(TO-18)
S
1
23
D
G and Case
Key to device performance is the predictable r
versus V
These n-channel devices feature r
bias where:
GS
rDSbias [
r
(@ VGS+ 0)
DS
Ť
1–
V
V
GS
GS(off)
Ť
ranging from 20 to
DS(on)
change
DS
8000 . All packages are hermetically sealed and may be
processed per MIL-S-19500 (see Military Information).
TO-206AF
(TO-72)
S C
1
23
D G
4
VCR2N, VCR4N
For applications information see AN105.
Document Number: 70293
S-41225—Rev. F, 28-Jun-04
Top View
Top View
VCR7N
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VCR2N/4N/7N
DS(on)
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Gate-Source, Gate-Drain Voltage −25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Current 10 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation
Operating Junction Temperature Range −55 to 175_C. . . . . . . . . . . . . . . . . . .
Storage Temperature −65 to 200_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPECIFICATIONS (T
b
= 25_C UNLESS OTHERWISE NOTED)
A
a
Parameter Symbol Test Conditions TypaMin Max Min Max Min Max Unit
Static
Gate-Source Breakdown Voltage V
Gate-Source Cutoff Voltage V
Gate Reverse Current I
Drain-Source On-Resistance r
Gate-Source Forward Voltage V
(BR)GSS
GS(off)
GSS
DS(on)
GS(F)
IG = −1 A, VDS = 0 V
VDS = 10 V, ID = 1 A
VGS = −15 V, VDS = 0 V −5 −0.2 −0.1 nA
VGS = 0 V, ID = 10 mA 20
VGS = 0 V, ID = 1 mA 200
VGS = 0 V, ID = 0.1 mA
VDS = 0 V, IG = 1 mA 0.7 V
Dynamic
Drain-Source On-Resistance r
Drain-Gate Capacitance C
Source-Gate Capacitance C
ds(on)
dg
sg
VGS = 0 V, ID = 0 mA
f = 1 kHz
VGD = −10 V, IS = 0 mA
f = 1 MHz
VGS = −10 V, ID = 0 mA
f = 1 kHz
Lead Temperature (
300 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes:
a. T
= 25_C unless otherwise noted.
A
b. Derate 2 mW/_C above 25_C.
1
/16” from case for 10 sec.) 300_C. . . . . . . . . . . . . . . . . . .
Limits
VCR2N VCR4N VCR7N
−55
−25 −25 −25
−3.5
20
−3.5
−7
60
200
60
7.5 3 1.5
7.5 3 1.5
−2.5
−7
600
4000 8000
600 4000 8000
−5
V
pF
Notes: NCB/NPA/NT
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
TYPICAL CHARACTERISTICS (TA = 25_C UNLESS OTHERWISE NOTED)
30
25
20
15
10
− Drain Current (mA)
D
I
5
0
0 0.2 0.4 0.6 0.8 1
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Output Characteristics (VCR2N)
V
= −4 V
GS(off)
−0.5 V
−1.0 V
VDS − Drain-Source Voltage (V)
VGS = 0 V
−1.5 V
−2.0 V
−2.5 V
−3.0 V
1.0
0.8
0.6
0.4
− Drain Current (mA)
D
I
0.2
0
Output Characteristics (VCR4N)
VGS = 0 V
−1.5 V
−2.0 V
= −4.2 V
)
−3.5 V
−4.0 V
−2.5 V
−3.0 V
V
GS(off
0 0.1 0.2 0.3 0.4 0.5
VDS − Drain-Source Voltage (V)
Document Number: 70293
S-41225—Rev. F, 28-Jun-04
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TYPICAL CHARACTERISTICS (TA = 25_C UNLESS OTHERWISE NOTED)
VCR2N/4N/7N
Vishay Siliconix
200
V
= −2.5 V
160
120
80
− Drain Current (A)
D
I
40
0
GS(off)
0 0.2 0.4 0.6 0.8 1
VDS − Drain-Source Voltage (V)
APPLICATIONS
A simple application of a FET VCR is shown in Figure 1, the
circuit for a voltage divider attenuator.
R
Output Characteristics (VCR7N)
V
= 0 V
GS
−0.5 V
−1.0 V
−1.5 V
−2.0 V
The output voltage is:
V
V
=
OUT
IN rDS
R +
r
DS
It is assumed that the output voltage is not so large as to push
the VCR out of the linear resistance region, and that the r
DS
is
not shunted by the load.
V
IN
−
V
+
FIGURE 1. Simple Attenuator Circuit
Document Number: 70293
S-41225—Rev. F, 28-Jun-04
V
OUT
GS
VCR
The lowest value which V
V
=
OUT(min)
can assume is:
OUT
V
IN rDS(on)
r
DS(on)
R +
Since rDS can be extremely large, the highest value is:
V
= V
OUT(max)
IN
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Disclaimer
All product specifications and data are subject to change without notice.
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Document Number: 91000 www.vishay.com
Revision: 18-Jul-08 1
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