SLS SL74HC533D, SL74HC533N Datasheet

SL74HC533

Semiconductor

Octal 3-State Inverting Transparent Latch

High-Performance Silicon-Gate CMOS

The SL74HC533 is identical in pinout to the LS/ALS533. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.

These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. The data appears as the
outputs in inverted form. When Latch Enable goes low, data meeting
the setup and hold time becomes latched.

The Output Enable input does not affect the state of the latches,
but when Output Enable is high, all device outputs are forced to the
high-impedance state. Thus, data may be latched even when the
outputs are not enabled.

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 µA

• High Noise Immunity Characteristic of CMOS Devices

ORDERING INFORMATION

SL74HC533N Plastic

SL74HC533D SOIC

TA = -55° to 125° C for all packages

PIN ASSIGNMENT

LOGIC DIAGRAM

PIN 20=VCC

PIN 10 = GND

FUNCTION TABLE

Inputs Output

Output

Enable

L H H L
L H L H
L L X no

H X X Z

X = don’t care
Z = high impedance

Latch

Enable

D Q

change

SLS

System Logic

SL74HC533

Semiconductor

MAXIMUM RATINGS*

Symbol Parameter Value Unit

VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V
VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V

V

DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V

OUT

IIN DC Input Current, per Pin ±20 mA

I

DC Output Current, per Pin ±35 mA

OUT

ICC DC Supply Current, VCC and GND Pins ±75 mA
PD Power Dissipation in Still Air, Plastic DIP+

SOIC Package+

750
500

Tstg Storage Temperature -65 to +150 °C

TL Lead Temperature, 1 mm from Case for 10 Seconds

260 °C

(Plastic DIP or SOIC Package)

*

Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

VCC DC Supply Voltage (Referenced to GND) 2.0 6.0 V

VIN, V

DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V

OUT

TA Operating Temperature, All Package Types -55 +125 °C

tr, tf Input Rise and Fall Time (Figure 1) VCC =2.0 V

VCC =4.5 V
V

=6.0 V

CC

0

1000
0
0

500
400

mW

ns

This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and V
GND≤(VIN or V

OUT

)≤VCC.

should be constrained to the range

OUT

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.

System Logic

SLS