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SL74HC109
Dual J -K Flip-Flop with Set and Reset
High-Performance Silicon-Gate CMOS
The SL74HC109 is identical in pinout to the LS/ALS109. The device
inputs are compatible with standard CMOS outputs, with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device consists of two J-K flip -flops with individual set, reset,
and clock inputs. Changes at the inputs are reflected at the outputs
with the next low-to-high transition of the clock. Both Q to Q outputs
are available from each flip-flop.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0 µA
•
High Noise Immunity Characteristic of CMOS Devices
LOGIC DIAGRAM
ORDERING INFORMATION
SL74HC109N Plastic
SL74HC109D SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
PIN 16=V CC
PIN 8 = GND
FUNCTION TABLE
Inputs Outputs
Set Reset Clock J K Q Q
L H X X X H L
H L X X X L H
L L X X X H* H*
H H L L L H
H H H L Toggle
H H L H No Change
H H H H H L
H H L X X No Change
X = Don’t care
*
Both outputs will remain high as long as Set and
Reset are low, but the output states are
unpredictable if Set and Reset go high
simultaneously.
SLS
System Logic
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SL74HC109
MAXIMUM RATINGS*
Symbol Parameter Value Unit
V CC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V
V IN DC Input Voltage (Referenced to GND) -1.5 to V CC +1.5 V
V OUT DC Output Voltage (Referenced to GND) -0.5 to V CC +0.5 V
IIN DC Input Current, per Pin
IOUT DC Output Current, per Pin
ICC DC Supply Current, V CC and GND Pins
±
20 mA
±
25 mA
±
50 mA
PD Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
Tstg Storage Temperature -65 to +150
TL Lead Temperature, 1 mm from Case for 10 Seconds
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V CC DC Supply Voltage (Referenced to GND) 2.0 6.0 V
V IN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) 0 V CC V
TA Operating Temperature, All Package Types -55 +125
tr, tf Input Rise and Fall Time (Figure 1) V CC =2.0 V
V CC =4.5 V
V CC =6.0 V
0
1000
0
0
500
400
mW
°
C
°
C
°
C
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range
GND≤(V IN or VOUT)≤V CC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.
System Logic
SLS