SLS SL4070BD, SL4070BN Datasheet

SL4070B

System Logic

Semiconductor

SLS

Quad Exclusive-OR Gate

High-Voltage Silicon-Gate CMOS

The SL4070B types consist of four independent Exclusive-OR
gates. The SL4070B provides the system designer with a means for
direct implementation of the Exlusive-OR function.

• Operating Voltage Range: 3.0 to 18 V

• Maximum input current of 1 µA at 18 V over full package-

temperature range; 100 nA at 18 V and 25°C

• Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

ORDERING INFORMATION

SL4070BN Plastic

SL4070BD SOIC

TA = -55° to 125° C for all packages

LOGIC DIAGRAM

PIN 14 =VCC

PIN 7 = GND

PIN ASSIGNMENT

FUNCTION TABLE

Inputs Output

A B Y

L L L

L H H
H L H
H H L

SL4070B

System Logic

Semiconductor

SLS

MAXIMUM RATINGS*

Symbol Parameter Value Unit

VCC DC Supply Voltage (Referenced to GND) -0.5 to +20 V
VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V

V

OUT

DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IIN DC Input Current, per Pin ±10 mA
PD Power Dissipation in Still Air, Plastic DIP+

SOIC Package+

750
500

mW

PD Power Dissipation per Output Transistor 100 mW

Tstg Storage Temperature -65 to +150 °C

TL Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP or SOIC Package)

260 °C

*

Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

VCC DC Supply Voltage (Referenced to GND) 3.0 18 V

VIN, V

OUT

DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V

TA Operating Temperature, All Package Types -55 +125 °C

This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and V

OUT

should be constrained to the range

GND≤(VIN or V

OUT

)≤VCC.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.