Singer SYSTEM TEN Reference Manual

SYSl1!M

lB'I

BY

SltlG~

CPU INSTRUCTIONS
MACHINE

REFERENCE

MANUAL

TABLE OF

CONTENTS

1

...

.INTROOUCTION

2

....

AOO

3

....

BRANCH

4

....

COMPARE

S

....

OIVIOE

6

....

EOIT

7

....

EXCHANGE

8

....

FORM NUMERIC

9

....

MOVE CHARACTER

IO

...

MOVE NUMERIC

11

...

MULTIPLY

12

...

READ

13

...

SUBTRACT

14

...

WRITE

Read

Write

Add
Subtract
Multiply
Divide

Move

Character

Move Numer

ic

Exchange

Edit
Form

Numeric
Compare
Branch

524 -700504 -M6

COPYRIGHT

C

1970

FRIDION

D,V,SION.

THIO

SINGER

COMPANY

INTRODUCTION TO CPU INSTRUCTIONS

INSTRUCTION FORMAT

1·1

Each

system

Ten

instruction

is

ten

characters

in

length.

Each

instruction

must

be

positioned

so

that

the

address

of

the

leftmost

character

is a multiple

of

10

(e.g.,

0,

10,

20,

30

....

etc.).

The

first

few

characters

of

an

instruction

as

they

appear

in

memory

have

the

following

format:

CHARACTER

2

3

[F3

LA

I

F2

A3

IFl

A2

BIT

7

5 4

3

2

1

7 5 4

3

2

7 5

4

3 2

Figure

Gl·l

Instruction Format .

Sequential

524 -700504 -M6

COPYRIGHT

©

1970

FRIDEN

O'VISIDN

THE

SINGER

COMPANY

INTRODUCTION TO CPU INSTRUCTIONS

Operation Code

Address Fields

1-2

A

more

useful

representation

of

instruction

format

is

achieved

by

giving

a

vertical

orientation

to

the

bits

of

a

character

as

is

done

below.

CHARACTER

l)

0

2

3

4

5

6 7 8 9

BIT

<:>

7

5

4

LA

A3

A2

A1

AO

LB

B3

B2

B1

BO

3
2

Figure G

1-2

Instruction Format - Parallel Blocking

In

this

representation

functionally

related

bits

such

as

'F3

-

FO

also

have a close

spatial

relationship.

The

operation

code

of

an

instruction

is

specified

by

the

four

bit

binary

number

F =

F3F2F1FO,

e.g.,

an

ADD

instruction

is

indicated

when

F =

0100

and a COMPARE

when

F-1110.

Each

instruction

contains

two

These

are

generally

used

to

two

operands

which

participate

by

F.

Each

address

is a four

0000

and

9999

inclusive.

address

fields

A

and

B.

specify

the

addresses

of

the

in

the

operation

specified

digit

decimal

number

between

The

A-address

is

given

by

A3A2A1AO,

the

numeric

portion

(bits'

thru

4)

of

characters

1

thru

4.

The

8-address

is

given

by

83828180,

the

numeric

portion

of

characters

6

thru

9.

524 -700504 -Me

COPYRIGHT

C

11170

FRIIJE.N

D'VISIO

....

THE

SI~GER

COMPANY

INTRODUCTION

TO

CPU

INSTRUCTIONS

Addressing Mode

Indexing

1·3

An

instruction

address

may

refer

to a location

in

COMMON

or

in

partition.

AC

= 1

Means

the A address

refers

to

a

location

in

COMMON.

.

AC

= 0

Means

the

A

address

refers

to

a

location

in

partition.

BC

= 1

Means

the

B

address

refers

to a location

in

COMMON.

BC

= 0

Means

the

B

address

refers

to a location

in

partition.

In

most

instructions

both

the

A

and

B

address

may

be

indexed.

Index

register

selection

for

the A address

is

determined

by

lA,

and

for

the B address

by

IB,

according

to

the

table

below:

IAl

lAO

IBl

IBO

0

0

0

1

1 0

1

1

Table

Gl-l

NO

INDEXING

INDEX

REGISTER

ONE

INDEX

REGISTER

TWO

INDEX

REGISTER

THREE

I ndex Addresses

524

-

700504

-

M6

COPYRIGHT

C

1970

FRIDEN

D'VISION

"THE

SINGER

COMPANY

INTRODUCTION TO CPU INSTRUCTIONS

Operand Lengths

1·4

Operand

lengths

are

explicitly

defined

using

LA

and

LB,

the

numeric

portion

of

characters

0

and

5

respectively.

Certain

instructions

use

LA

and

LB

differently

as

will

be

discussed

later.

LA--length,

in

number

of

characters

of

the

Operand-A.

LB--length,

in

number

of

characters

of

the

Operand-B.

524

-700504 -M6

COPYRIGHT

C

1!l70

FRIDEN

D,V,SION

THE

SINGER

COMPANY

ADD INSTRUCTION

ADD INSTRUCTION

INSTRUCTION

FIELDS

The

Add

instruction

adds

the

operands

algebraically.

The

.operand

and

leaves

the

first

fields

do

not

overlap.

numeric

portions

sum

replaces

the

operand

unchanged

of

two

second

if

the

Machine Operation

Code

I

F---Binary

0100

(4).

Address Specification

I

A---Address

of

the

leftmost

position

of

Operand-A.

B---Address

of

the

leftmost

position

of

Operand-B.

Indexing Specification

IA--Index

register

for

determining

effective

address

of

Operand-A.

IB--Index

register

for

determining

effective

address

of

Operand-B.

Common Partition Specification

AC--If

AC

is

0,

A

is

address

in

controlling

partition.

If

AC

is

1 ,

A

is

address

in

Common.

BC--If

BC

is

0,

B

is

address

in

controlling

partition.

If

BC

is

1 ,

B

is

address

in

Common.

Length Specification

LA--Length

of

Operand-A.

LB--Length

of

Operand-B.

2

..

1

ADD INSTRUCTION

OPERAND FIELDS

Operand-A Address

Operand-B Address

Operand Lengths

OPERATION

General Description

2·2

If

IA

is

0,

then

A

is

the

effective

address.

If

IA

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to A to

determine

the

effective

address

of

Operand-A.

If

AC

is

1,

the

effective

address

lies

in

Common.

If

IB

is

0,

then

B

is

the

effective

address.

If

IB

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to B to

determine

the

effective

address

of

Operand-B.

If

BC

is

1,

the

effective

address

lies

in

Common.

If

LA

is

0,

the

length

of

Operand-A

is

10

characters.

If

LA

is

1

thru

9,

the

length

of

Operand-A

is 1 thru

9

characters.
If

LB

is

0,

the

length

of

Operand-B

is

10

characters.

If

LB

is 1 thru

9,

the

length

of

Operand-B

is 1 thru

9

characters.

The

add

operation

proceeds

from

right

to

left

starting

with

the

rightmost

characters

of

Operand-A

and

Operand-B.

Character

by

character,

the

algebraic

sum

is

developed

in

Operand-B.

If

Operand-A

is

shorter

than

Operand-B,

the

operation

proceeds

normally

until

Operand-A

is

exhausted.

After

that,

the

process

continues

in

similar

fashion

except

that

a

zero

character

is

automatically

substituted

every

time

the

adding

logic

calls

for

a

character

from

Operand-A.

In

effect,

Operand-A

is

given

enough

preceding

zeros

to

make

it

the

same

length

as

Operand-B.

If

Operand-A

is

longer

than

Operand-B,

addition

stops

after

the

leftmost

position

in

Operand-B

has

been

added.

The

remaining

positions

in

Operand-A

are

ignored,

and

do

not

affect

the

sum

or

the

Condition

Code.

524 -700504 -M6

COPYRIGHT

©

1970

ADD

INSTRUCTION

Condition Codes

The

algebraic

sign

of

the

sum

is

placed

in

bit-7

of

the

rightmost

position

of

Operand-B,

and

bit-5

is

turned

ON.

Except

for

the

rightmost

character,

the

other

zone

bits

of

Operand-B

are

unchanged.

Operand-A

is

unchanged

by

the

add

operation.
If

the

sum

exceeds

the

capacity

of

Operand-B,

a

carry-to-

the-left

from

the

leftmost

position

does

not

occur.

Condition

Code

4

is

set

to

indicate

the

overflow.

After

completion

of

the

Add

instruction.

1

==

Negati

ve,

non-zero

sum.

2

==

Zero

sum.

3

==

Positive,

non-zero

sum.

4 =

Overflow.

Execution Time (T) in Microseconds

T =

42.2

+

3.3

(LA) +

10.0

(LB)

+ TIX + TOO,

if

LA

is

equal

to

or

less

than

LB.

T

=

42.2

+

11

(LA) +

12.

2

(LB)

+ TIX + TOO,

if

LA

is

greater

than

LB.

Key:

TIX = 0.0,·

if

IA

and

IB

are

both

zero.

TIX = 58.9,

if

IA

and

IB

are

both

non-zero.

TIX

=31.1,

if

IA

~

IB

is

non-zero.

TOO = 0.0,

if

an

overdraft

does

not

occur.

TOO = 10.0

(LB),

if

an

overdraft-OCcurs.

An

overdraft

will

always

occur

when

the

absolute

value

of

Operand-A

exceeds

the

absolute

value

of

Operand-B

~

they

have

~like

signs.

PROGRAMMING HINTS

O~erlapped

Operands

In

case

of

overlapped

operands,

the

result

is

unspecified.

2·3

524 -700504 -M6

COPYRIGHT

©

1970

FRIOEN

D'VISION.

THE

SINGER

COMPANY

BRANCH INSTRUCTION

BRANCH INSTRUCTION

The

Branch

instruction

permits

departure

from

the

sequential

path

by

which

instructions

are

normally

executed.

Branching

can

be

unconditional,

it

can

depend

upon

the

current

status

of

the

Condition

Code,

or

it

can

depend

upon

signals

from

Input/Output

devices

requesting

service

from

the

CPU. A

variant

of

the

Branch

instruction

passes

control

to

a

subroutine

after

first

setting

the

return

address

at

which

the

main

program

will

be

resumed.

Execution

of

the

Branch

instruction

does

not

alter

the

Condition

Code.

INSTRUCTION

FIELDS

Machine Operation Code

I

F---Binary

1011

(11).

Address Specification

I

A---Address-A
B---Address-B

Indexing Specification

I

IA--Ignored.

IB--Ignored.

Branch

instructions

are

not

indexed.

Branch

instructions

are

not

indexed.

Common Partition Specification

Variant Specification

3·1

AC--If

AC

is

0,

If

AC

is

1 ,

BC--If

BC

is

0,

If

BC

is

1 ,

I

LA--A

digit

0-9.

LB--A

digit

0-6,

A
A

B
B

is

an

address

in

controlling

partition;

is

an

address

in

Common.

is

an

address

in

controlling

partition.

is

an

address

in

Common.

8,

9.

524 -700504 -M6

COPYRIGHT

©

1970

FRIOlN

a'VISION

THE

SINGER

COMPANY

BRANCH INSTRUCTION

OPERATION

Order

of

Presentation

The

Branch

instruction

consists

of

several

variants.

The

LA

and

LB

instruction

fields

determine

which

variant

is

executed.

"Link"

(variant

6)

and

"Branch

on

Service

Request"

(variant

7)

require

that

the

entire

instruction

be

decoded.

These

variants

are

discussed

later

under

separate

headings.

The

other

variants

are

decoded

and

executed

a

half

instruction

at

a

time

and

are

most

conveniently

discussed

as a group

in

the

next

paragraph.

Variants

0,

1,

2,

3, 4,

5,

8,

9

3·2

The

first

five

characters

of

the

instruction

are

fetched.

LA

is

examined.

If a branch

is

required,

control

passes

to

Address-A,

and

the

right

half

of

the

instruction

is

ignored.

If a branch

is

not

required

in

the

left

half

of

the

instruction,

the

right

half

is

fetched.

LB

is

examined.

If

a

branch

is

required,

control

passes

to

Address-B.

If

a

branch

is

not

required,

execution

continues

with

the

next

sequential

instruction.

The

following

table

shows

the

values

which

LA

and

LB

may

assume.

Beside

each

variant

number

is

the

meaning

applied

by

the

ACU.

Variant

6

and

variant

7

are

purposely

omitted.

They

are

discussed

under

"Link"

and

"Branch

on

Service

Request".
Variant

0---00

not

branch

("no

operation").

Variant

1---Branch

if

Condition

Code

is

1.

Variant

2---Branch

if

Condition

Code

is

2.

Variant

3---Branch

if

Condition

Code

is

3.

Variant

4---Branch

if

Condition

Code

is

4.

Variant

5---Branch,

unconditionally.

Variant

8---Branch

and

switch

partitions,

unconditionally.

Variant

9---00

not

branch

("no

operation").

524 -700504 -M6

COPYRIGHT

©

1970

FRIOEN

DIVISlON.

"THE

SINGER

COMPANY

BRANCH INSTRUCTION

Partition Switching

If

a

Branch

instruction

does

not

require

execution

simply

continues

with

the

next

instruction.

a

branch,

sequential

If

the

host

partition

has

been

in

continuous

control

for

more

than

37.5

milliseconds

when a branch

is

required,

the

branch

is

taken

but

the

execution

of

the

instruction

at

the

branch

address

is

postponed

and

control

passes

to

the

next

partition.

When

control

returns,

execution

resumes

at

the

branch

address.

If

the

branch

is

caused

by

variant

8

("Branch

and

switch,

unconditionally"),

the

branch

is

taken

but

the

execution

of

the

instruction

at

the

branch

address

is

postponed

and

control

passes

to

the

next

partition

even

though

37.5

milliseconds

have

not

elapsed.

LINK

- BRANCH VARIANT 6

LA--Must

be

6.

LB--May

be 0 thru

5,

8,

or

9.

If

LB

is 0 or

9,

no

link

occurs;

control

simply

passes

to

the

next

instruction.

If

LB

is

1-Q,

the

corresponding

Condition

Code

is

tested.

If

the

specified

Condition

Code

is

ON,

the

link

operation

is

performed.

Otherwise,

control

simply

passes

to

the

next

instruction.

If

LB

is 5 or

8,

the

link

operation

is

performed,

unconditionally.

Return Address/Start Address

The

address

of

the

next

instruction

(return

address)

is

inserted

into

the

numerical

portion

of

the

four

position

field

starting

at

Address-A.

The

zone

portions

of

the

three

left

character

positions

are

unchanged.

Bit-5

of

the

rightmost

position

is

set

to

1.

Bit-7

is

set

to

1

if

the

return

address

is

in

common;

it

is

set

to 0 if

the

return

address

is

in

partition.

Control

then

passes

to

Address-B

(start

address).

BRANCH

ON

SERVICE

REQUEST

- BRANCH VARIANT 7

3·3

I

LA--Must

be

7.

LB--Must

be 0 or

9.

COPYRIGHT

C 110170

524 -700504 -M6

FRIOEN

01

VI

SION'

THE

SINGER

COMPANY

I

UCTION

CC

:?

I;,..'''.'

T=.7.·.

-

..

_._

...

:._-

...•

:

··~X~'

~DD

MINUS

ZERO

PLUS

OVERFLOW

~RANCH

/QOND

ITlONAl

---

---

---

---

(gOMPARE

A

IS

LESS

EQUAL

A IS

GREATER

A

NOT

LESS

(Q]IVIDE

MINUS

ZERO

PLUS

OVERFLOW

~DIT

MINUS

ZERO

PLUS

---

E~CHANGE

---

2

ALWAYS

SET

---

---

fE)ORM

~UMERIC

FIELD

MINUS

ZERO

PLUS

OVERFLOW

~OVE

(gHARACTER

---

2

ALWAYS

SET

---

---

~OVE

~UMERIC

---

2

ALWAYS

SET

---

---

~Ul

TlPlY

MINUS

ZERO

PLUS

---

~EAD

ERROR

NORMAL

FLAG

FAULT

~UBTRACT

MINUS

ZERO

PLUS

OVERFLOW

~RITE

ERROR

NORMAL

FLAG

FAULT

Table G3·1 Condition

Code

Settings

524 -700504 -Me

BRANCH INSTRUCTION

Operation . Storing Device Number

Condition Codes

Each

IOC

continually

polls

the

input/output

devices

attached

to

it

to

see

if a device

has

signalled

a

request

for

service.

If

the

IOC

encounters

such a signal,

further

polling

for

service

requests

is

temporarily

discontinued,

and

the

device

number

is

held

in a counter

until

the

CPU

executes

"Branch

on

Service

Request".

"Branch

on

Service

Request"

causes

the

counter

to

be

stored

in

the

numeric

portion

of

the

character

position

pOinted

to

by

Address-A.

Control

then

passes

to

Address-B.

Polling

resumes

with

the

next

higher

device

number

(or

0,

if

the

requesting

device

was

9

>.

If

the

IOC

is

holding

no

such

request

for

service,

"Branch

on

Service

Request"

has

no

effect.

Execution

continues

with

the

next

sequential

instruction.

I

Condition

Codes

are

unchanged

by

the

Branch

instruction.

Execution Time (T)

in

Microseconds

T

=37.8

for

no

branch.

T =

27.8

for

branch

to

Address-A.

T=44.4

for

branch

to

Address-B

(except

variants

6,7)

•

T=75.5

for

"Link"

(variant

6)

.

T=51.1

for

"Branch

on

Service

Request"

(variant

7).

PROGRAMMING

HINTS

3-4

I

Since

each

instruction

(with

the

exception

of

Branch)

sets

the

condition

code,

it

is

necessary

to

test

the

condition

code

immediately

after

the

performance

of

an

operation.

524 -700504 -M6

COPYRIGHT

©

1970

FRIOE.N

DIVISION

"THE

SINGER

COMPANY

COMPARE INSTRUCTION

COMPARE INSTRUCTION

I

The

Compare

instruction

compares

two

fields

and

sets

Condition

Code

to

indicate

the

relation

between

them.

the

INSTRUCTION

FIELDS

Machine Operation

Code

F---Binary

1110

(14).

Address Specification

I

A---Address

of

the

leftmost

position

of

Operand-A.

B---Address

of

the

leftmost

position

of

Operand-B.

Indexing Specification

IA--Index

register

for.

determining

effective

address

of

Operand-A.

IB--Index

register

for

determining

effective

address

of

Operand-B.

Common Partition Specification

Length Specification

4-1

AC--If

AC

is

0,

A

is

address

in

controlling

partition.

If

AC

is

1 ;

A

is

address

in

Common.

BC--If

BC

is

0,

B

is

address

in

controlling

partition.

If

BC

is

1 , B

is

address

in

Common.

LA--Tens

position

of

length

of

both

Operand-A

and

Operand-

B.

LB--Units

position

of

length

of

both

Operand-A

and

Operand-

B.

524

-700504 -M6

COPYRI

GHT © 1970

FRIOEN

0,

VI

SION

THE

SINGER

COMPANY

COMPARE INSTRUCTION

COMPARE INSTRUCTION
OPERAND FIELDS

Operand-A Address

Operand-B Address

Operand Lengths

OPERATION

General Description

4-2

If

IA

is

0,

then

A

is

the

effective

address.

If

IA

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to A to

determine

the

effective

address

of

Operand-A.

If

AC

is

1,

the

effective

address

lies

in

Common.

If

IB

is

0,

then

B

is

the

effective

address.

If

IB

is

1,

2,

or

3,

then

corresponding

index

register

is

added

to B to

determine

the

effective

address

of

Operand-B.

If

BC

is

1,

the

effective

address

lies

in

Common.

Operand-A

and

Operand-B

are

equal

in

length.

10LA +

LB = Lengths

of

operands

for

the

Compare

instruction.

If

10LA +

LB=OO,

100

is

the

length

of

the

operands.

The

compare

operation

proceeds

from

left

to

right

starting

with

the

leftmost

character

of

Operand-A

and

Operand-B.

Character

by

character,

the

values

of

Operand-A

and

Operand-B

are

compared

until

a

difference

is

found

or

the

rightmost

position

has

been

compared.

When

the

characters

differ,

Condition

Code

1,

or 3 and 4 is

set

ON

(indicating

that

Operand-A

is

smaller

or-larger

than

Operand-B),

and

the

operation

is

complete.

If

the

characters

are

identical,

and

there

are

more

positions

to

be

compared,

the

comparison

is

repeated

for

the

next

position

on

the

right.

524 -700504 -M6

COPYRIGHT

©

1970

FRIDEN

DIVISION

THE

SINGER

COMPANY

COMPARE INSTRUCTION

COMPARE INSTRUCTION

Condition Codes:

When

the

characters

are

identical

and

there

are

no

more

positions

to

be

compared,

Condition

Codes 2 and 4 are

set

ON.

Operand-A

and

Operand-B

are

unchanged

by

the

operation.

compare

When

Condition

Code 3 or 2 is

set

ON,

Condition

4

is

also

set

ON.

1

1,

if

Operand-A

is

less

than

Operand-B.

2

and

4,

if

Operand-A

and

Operand-B

are

identical.

3

and

4,

if

Operand-A

is

greater

than

Operand-B.

Execution Time (T)

is

Microseconds

T =

40.0 + 7.78

(10LA

+ LB)

.+

TIX,

if

the

operands

are

identical.

T=

48.9 + 7.78

(y)

+

TIX,

if

the

operands

differ.

Key:

Y =

the

number

of

equal

compar

isons.

TIX =

0.0,

if

IA

and

IB

are

both

zero.

TIX

=58.9,

if

IA

and

IB

are

both

non-zero.

TIX

=31.1,

if

IA

or

IB

is

non-zero.

PROGRAMMING HINTS

Character Values

Sorting

4·3

The

reader

is

referred

to

the

Table

G4-1

entitled

"Characters

Arranged

in

Sequence

of

Value."

In

the

first

column

under

"Character

Code"

are

the

internal

codes

of

each

character

used

in

the

Model

20

Processor.

In

the

second

column

under

"Character"

are

the

corresponding

characters.

The

table

can

be

used

to

resolve

uncertainties

as

to

which

of

two

characters

the

Compare

instruction

considers

to

be

the

larger.

A

character

is

considered

greater

than

the

other

characters

which

precede

it

in

the

table.

It

is

less

than

those

which

follow

it.

A

prinCipal

use

of

the

Compare

instruction

is

in

sorting

data.

The

programmer

is

reminded

that

the

units

position

of a negative

numeric

field

is

coded

with

zone

bit-7

ON.

(If

the

digit

were

positive,

bit-7

would

be

OFF.)

Thus,

in

a

compare

operation,

a

negative

digit

is

of

greater

value

than

any

positive

digit.

524 -700504 -M6

COPYRI

G'" ©

1970

FRIOEN

01

VI

SION

THE

SINGER

COMf"ANY

b

7

0

0

0
0
0
0
0

0
0
0

0
0
0

0
0
0
0

0
0
0
0
0
0
0
0

0

0

0
0
0
0
0

I

I

I

I

I
I
I
I
I
I
I
I
I
I
I
I
I

1
1
1

1

I

I
I

1

1
1
1
1
1
1

1

Table

G4·1

Uldrd(.ter

Lode

b~

u

4

u)

U

z

0 0 0 0

0 0 0 0
0 0 0 I
0 0 0 I
0 0 I 0
0 0 I 0

0 0

I

I

0 0

1

I

0 I 0

0

0 I 0 0

0 I 0

I

0 I 0

I

0 I I

0

0

I I 0

0

I I I

0

1

1

I

1

0

0

0

1 0 0

0

I

0 0

1

1

0 0

1

1

0 1

0

I 0 I

0

I

0

1 I

I 0 I

I

I I 0 0

I

I 0 0

I

I

0

I

I

1 0 1

I I I 0
I

I

1

0

I I I

I

I I I

I

0

0 0 0

0 0 0

0

0 0

0

I

0

0 0

I

0

0 I 0

0

0 I

0

0 0 I

I

0

0 I

I

0

I 0

0

0

I

0

0

0 I 0

I

0

I 0 I

0

I I 0

0

I I 0

0

I I

I

0

I I

I

I

0 0

0

I

0 0

0

1 0 0

1

I 0 0

1

1

0 I

0

1

0 1 0

I 0

1

I

1

0

I

1

1

1

0

0

I

1

0

0

1

1

0

1

1

1

0

1

1

I 1 0

1 1 I 0

I

1

1

1

1

1 1

1

u

l

0

I

U

I

0

I

0

I

0

I

0

I

0

I

0
1
0

I

0

1

0

1

0

I

0

I

0

1

0

I

0

I

0

I

0

I

0

I

0

I

0

I

0

I

0

I

0

I

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Chdrdder

SP

!

,

$

%

&

(

)

.

+

I

0

1

2

)

4

5

6
7

8

9

;

?

@

A
B

C

D

[

F
G
H

I

J

K

L
H

N

0

P

Q

R

S
T

U

V

W

X

y

Z

I

\

}

.-

CH~RACTE

RS

ARRANr.r

0

I~

\f()IJ(NCE

or

VALUE

Sp.!ce
Exclamation

Point

Quota t i on

Ha

rk

NuRiJer

Si

gn

llo11ar

~ign

Pen:ent
Aqlersand

Prime.

Apos t

rophe

Left

Parenthes

is

Right

Parenthes

is
Asterisk
Plus

Sign

Comna

Hi

nus

Sign.

Hyphen

Period,'

Decimal

Point
Slash
Zero

One

Two
Three
Four
Five
Six
Seven
Eight
Nine
Colon
Semicolon

Less-than

Sign

[qual

Sign

Greater-than

Sign

Question

Hark

At

Sign

Openi

n9

Bracket
Reverse S hnt
ClosIng

Brac~et

Ci

rculllflex

Onderl

ine

Characters

Arranged

in

Sequence

of

Value

524 -700504

-

M6

COPYRIGHT

©

1970

FRIDEN

D,V'SION

THE

SINGLRCOMPANY

DIVIDE INSTRUCTION

DIVIDE INSTRUCTION

I

The

Divide

instruction

computes

the

algebraic

quotient

(and

remainder)

of

two

operands.

INSTRUCTION

FIELDS

Machine Operation Code

Address

Specification

Indexing Specification

F---Binary

0101

(5).

A---Address

of

the

leftmost

position

of

Operand-A.

B---Address

of

the

leftmost

position

of

Operand-B

(dividend)

Address

of

the

quotient.

IA--Index

register

for

determining

effective

address

of

Ol>erand-A.

IB--Index

register

for

determining

effective

address

of

Operand-B.

Common

Partition

Specification

AC--If

AC

is

0,

A

is

an

address

in

controlling

partition.

If

AC

is

1 ,

A

is

an

address

in

Common.

BC--If

BC

is

0, B is

an

address

in

controlling

partition.

If

BC

is

1 , B

is

an

address

in

Common.

Length Specification

LA--Length

of

Operand-A

(divisor).

LB--Length

of

the

quotient.

LA + LB--Length

of

Operand-B

(dividend).

5·1

524 -700504 -M6

COPYRIGHT

C

1970

FRtOEN

01

VI

SION.

·THE

SINGER

COMPANY

DIVIDE INSTRUCTION

OPERAND FIELDS

Operand-A Address

Operand-B Address

Operand Lengths

OPERATION

General Description

5-2

If

IA

is

0,

then

A

is

the

effective

address_

If

IA

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

A

to

determine,

the

effective

a4dress

of

Operand-A.

If

AC

is

1,

the

effective

address

lies

in

Common.

If

IB

is

0,

then

B

is

the

effective

address.

If

IB

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

B

to

determine

the

effective

address

of

Operand-B.

If

BC

is

1,

the

effective

address

lies

in

Common.

If

LA

is

0,

the

length

of

Operand-A

is

10

characters.

If

LA

is 1 thru

9,

the

length

of

Operand-A

is 1 thru

9

characters.
If

LB

is

0,

the

length

of

Quotient

is

10

characters.

If

LB

is 1 thru

9,

the

length

of

Quotient

is 1 thru

9

characters.
LA + LB

is

the

length

of

Operand-B

(dividend).

Operand-A

is

the

divisor.

The

dividend

begins

at

the B address

and

contains

LB

+

LA

positions.
At

the

end

of

the

operation,

the

quotient

occupies

the

leftmost

LB

positions

of

the

dividend

field,

and

the

remainder

occupies

the

rightmost

LA

positions

of

the

dividend

field.

If

the

divisor

and

the

dividend

differ

in

sign,

bit-7

of

the

quotient

is

turned

ON

to

indicate

a

negative

quotient.

If

the

signs

are"

alike,

bit-7

is

turned

OFF

to

indicate

a

positive

quotient.

Bit-5

is

turned

ON

for

all

positions

of

the

quotient;

bit-7

is

turned

OFF

for

all

positions

except

the

rightmost.

524 -700504 -M6

COPYRIGHT

©

1970

FRIOEN

01

VI

SION

THE

SINGER

COMPANY

DIVIDE INSTRUCTION

Process

Condition Codes

Bit-7

of

the

rightmost

position

of

the

remainder

is

unchanged.

It

continues

to

show

the

sign

of

the

dividend.

Bit-5

is

set

to

1.

The

zone

bits

of

the

other

positions

in

the

remainder

are

unchanged.

An

internal

counter

is

set

to

zero.

It

will

count

the

number

of

times

the

divisor

is

subtracted

from a subfield-

of-the-dividend.

The

subfield

length

is

one

yreater

than

the

length

of

the

divisor.

The

first

subfield

chosen

is

at

the

extreme

left

of

the

dividend.

The

divisor

is

repeatedly

subtracted

from

the

subfield

until

the

value

of

the

subfield

is

less

than

that

of

the

divisor.

Each

subtraction

increments

the

counter.

If

the

count

exceeds

9,

Condition

Code

4

is

set

(indicating

overflow),

and

the

operation

is

abandoned.

If

the

count

does

not

exceed

9,

and

the

subfield

value

is

less

than

the

divisor,

the

count

is

stored

in

the

leftmost

position

of

the

subfield

where

it

is

also

the

leftmost

position

of

the

quotient.

The

counter

is

cleared,

and

the

process

shifts

to

the

next

subfield

(one

character

position

to

the

right

in

the

dividend)

to

develop

the

second

position

of

the

quotient.

After

this,

another

shift

to

develop

the

third

position,

etc.

The

operation

ends

after

the

rightmost

subfield

in

the

dividend

is

processed

in

this

fashion.

After

completion

of

the

Divide

instruction:

1

=Negative,

non-zero

quotient.

2 =

Zero

quot

ient

.

3

=Positive,

non-zero

CJuotient.

4 =

Overf

low.

Execution Time (T)

in

Microseconds

5-3

T =

46.67

+

1.

11

(LA) +

26.

67

(LB) + 22.

22

(LA)

(LB)

+

(10.0

+

11.1

(LA»

(S) + TIX.

Key:

TIX

=

0.0,

if

IA

and

IB

are

both

zero.

TIX = 58.9,

if

IA.

and

IB

are

both

non-zero.

TIX=31.1,

if

IA

or

IB

is

non-zero.

S=Sum

of

digits

in

quotient.

524 -700504 -M6

COPYRIGHT

©

1970

FR10EN

01

VI

SION

THE

SINGER

COMPANY

DIVIDE INSTRUCTION

PROGRAMMING HINTS

Overlapped Operands

Division by

Zero

Preventing Overflow

5·4

In

case

of

overlapped

operands,

the

result

is

unspecified.

I

An

attempt

to

divide

by

zero

causes

Condition

Code 4 to

be

set

(indicating

overflow).

The

value

of

the

dividend

is

unchanged.

Overflow

will

only

occur

if

the

absolute

value

in

the

leftmost-LA

positions

of

the

dividend

equals

or

exceeds

the

absolute

value

of

the

divisor.

In

cases

where

it

is

necessary

to

accommodate

the

widest

possible

range

of

data,

including

division

by

1,

the

leftmost

LA

positions

of

the

dividend

should

contain

zero.

524 -700504 -M6

COPYRIGHT

©

1970

FRIDEN

O.

\/ISION.

THE

SINGER

COMPANY

EDIT INSTRUCTION

EDIT INSTRUCTION

The

Edit

instruction

moves a 1-100

digit

numerical

field

into

a

"control"

field

so

that

the

information

is

in a form

suitable

for

printing.

The

control

field

governs

the

suppression

of

preceding

zeros

(including

the

insertion

of

check

protection

characters

ahead

of

significant

digits),

the

insertion

of

punctuation

marks,

and'the

indication

of

sign.

INSTRUCTION

FIELDS

Machine Operation

Code

I

F---Binary

1100

(12).

Address Specification

I

A~--Address

of

the

leftmost

position

of

Operand-A.

B---Address

of

the

leftmost

position

of

Operand-B.

Indexing Specification

IA--Index

register

for

determining

effective

address

of

Operand-A.

IB--Index

register

for

determining

effective

address

of

Operand-B.

Common Partition Specification

Length Specification

6·1

AC--If

AC

is

0,

A

is

an

address

in

controlling

If

AC

is

1 ,

A

is

an

address

in

Common.

BC--If

BC

is

0,

B

is

an

address

in

controlling

If

BC

is

1 ,

B

is

an

address

in

Common.

I

LA--Tens

position

of

length

of

Operand-A.

LB--Units

position

of

length

of

Operand-A.

partition.

partition.

524 -700504 -M6

COPYRIGHT

©

1970

FRIDEN

DI

VISION.

THE

SiNGER

COMPANY

EDIT INSTRUCTION

OPERAND

FIELDS

Operand-A Address

Operand-B Address

Operand Lengths

OPERATION

If

IA

is

0,

then A is

the

effective

address.

If

IA

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

A

to

determine

the

effective

ad~ress

of

Operand-A.

If

AC

is

1,

the

effective

address

lies

in

Common.

If

IB

is

0,

then B is

the

effective

address.

If

IB

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

B

to

determine

the

effective

address

of

Operand-B.

If

BC

is

1,

the

effective

address

lies

in

Common.

The

length

of

Operand-A

is

(10)LA+LB.

If

(10)LA+LB=00,

the

length

=100.

The

length

of

Operand-B

is

the

sum

of

the

following:

Operand-A

length

+

1.

The

number

of

punctuation

characters

in

Operand-B.

The

number

of @ characters

in

Operand-B.

Operand-B, the Control Field

6-2

A

filler

character

is

defined

as

any

character

other

than

the

@sign

or a punctuation

mark

(comma,

decimal

point,

hyphen,

slash).

Minimally,

a

control

field

consists

of

as

many

filler

characters

as

there

are

digits

in

Operand-A

plus

one

trailing

character

to

show

sign.

In

addition,

the

filler

characters

may

be

freely

interspersed

with

punctuation

characters

(comma,

period,

hyphen,

slash)

and

@signs.

Since

the

Edit

instruction

destroys

the

control

field,

the

programmer

normally

moves

the

control

field

to

the

Operand-

B

address

before

each

use

of

the

Edit

instruction.

524 -700504 -M6

COPYRIGHT

©

'970

FRIOEN

01

VI

SION.

THE

SiNGER

COMPANY

·EDIT

INSTRUCTION

The

filler

characters

designate

the

mask

positions

into

which

Operand-A

digits

can

be

moved.

Significant

digits

from

Operand-A

simply

replace

the

corresponding

filler

positions

in

the

control

field.

Filler

characters

corresponding

to

non-significant

zeros

in

Operand-A

are

not

replaced,

they

are

undisturbed.

This

permits

the

suppression

of

preceding

zeros

(i.e.,

the

filler

positions

are

preset

to

contain

blank

characters)

or

the

use

of

check

protection

characters

ahead

of

significant

digits

(i.e.,

the

filler

positions

are

preset

to

contain

a

protect

character

such

as

asterisk).

The

punctuation

characters

are

used

to

punctuate

the

significant

information

received

from

Operand-A.

At

the

completion

of

the

Edit

instruction,

any

punctuation

characters

which

find

themselves

embedded

in

the

significant

portion

of

the

control

field

remain

undisturbed

by

the

operation

and

thus

show

the

desired

punctuation.

Any

punctuation

character

to

the

left

of

the

significant

portion

of

the

control

field

will

have

been

replaced

by

the

neighboring

character

on

the

left

and

thus

wiped

out.

A

control

field

should

not

begin

with

a

punctuation

character.
The @ sign

is

used

to

insert

blank

characters

between

filler

positions.

Execution

of

the

Edit

instruction

replaces

each

@sign

in

the

mask

with a blank

character.

The

rightmost

position

of

the

control

field

is

used

to

show

the

sign

of

Operand-A.

Ordinarily,

the

programmer

presets

the

position

to

contain

a

hyphen

or

some

other

character

to

indicate

minus.

If

Operand-A

is

negative,

the

minus

character

remains.

If

Operand-A

is

zero

or

positive,

the

minus

character

is

overwritten

with a blank

character.

Execution

of

Edit Instruction

6-3

I

The

Edit

instruction

begins

by

extracting

the

leftmost

digit

of

Operand-A

and

by

finding

the

leftmost

filler

•

character

in

the

control

field.

During

the

hunt

for

the

filler

character,

any

intervening

@

sign

in

the

control

field

is

replaced

by a blank

character,

and

any

intervening

punctuation

mark

is

replaced

by

the

neighboring

character

on

the

left.

If

the

Operand-A

digit

is

significant,

the

numeric

portion

is

put

into

the

filler

position

of

the

control

field,

and

the

zone

bits

of

that

position

are

set

to

0/1

to

insure

that

the

position

will

print

as a numerical

value.

If

the

digit

is

non-significant

zero,

but

the

filler

character

is

0,

the

digit

is

stored

in

the

filler

position

as

a

significant

zero

(as

are

any

to

the

right

of

it

in

Oper

and-A)

.

524 -700504 -M6

FRIOEN

DIVISION

THE

SINGER

COMPANY

EDIT INSTRUCTION

Condition Codes

6-4

If

the

digit

is

non-significant,

the

filler

character

is

left

undisturbed.

The

process

is

repeated

using

the

next

digit

to

the

right

in

Operand-A

and

the

next

filler

character

in

the

control

field.

Once

a

significant

digit

has

been

moved

from

Operand-A

into

the

control

field,

any

punctuation

mark

to

the

right

of

it

is

allowed

to

stand

an~

is

not

replaced

by

its

left-hand

neighbor.

The

process

continues

until

the

rightmost

digit

in

Operand-

A

and

the

rightmost

filler

character

of

the

control

field

have

been

dealt

with.

The

Condition

Code

is

set.

If

Operand-A

contains

a

positive

value

or

zero,

a

blank

character

is

set

in

the

sign

position

of

the

control

field

(the

position

just

to

the

right

of

the

rightmost

filler

character).

After

completion

of

the

Edit

instruction.

1

Negative,

non-zero

Operand-A.

2

Zero

Operand-A.

)

Positive,

non-zero

Operand-A.

An

overflow

condition

is

not

possible.

524 -700504 -M6

COPYRIGHT

e

1970

FRIOEN

DIVISION

THE

SiNGERCOMPANV

EDIT INSTRUCTION

Execution Time (T)

in

Microseconds

6-5

T

41.1

+

10.0

(LA + LB) +

6.67

(x1)

+

3.33

(X2)

+

2.22

(X3) + 2.22

(X4) + TIX.

Key

X1 = Number

of

'@'

signs

in

control

field

pluS

number

of

periods

C.),

commas

(,),

slash

(I),

and

minus

(-)

signs

before

signifi-

cance

in

Operand-B

control

field.

X2

Number

of

periods

(.),

commas

(,),

slash

(I),

and

minus

(-)

signs

after

significance

in

Operand-B

control

field.

X3

Number

of

significant

digits

in

Operand-A.

X4

0

for a negative

operand.

1

for a positive

operand.

TIX = 0.0,

if

IA

and

IB

are

both

zero.

TIX

=58.9,

if

IA

and

IB

are

both

non-zero.

TIX = 31.1,

if

IA

or

IB

is

non-zero.

524 -700504 -M6

COPY"'G"'~

©

11170

Fq!O£N

D'VISION.

THE

S.'NG£R

COMPAN'f

EDIT INSTRUCTION

EXAMPLES

Printing Social Security Numbers

Check Protection

Use

of

Commas

I

Operand-A
Operand-B
Operand-B

I

Operand-A
Operand-B
Operand-B

Operand-A
Operand-B
Operand-B

098144159
000-00-0000­098-14-4159

0000001234

.·,.··,

•••.

00-

••••••••

12.34

1234567890

bb,bbb,bbb.OO-

12,345,678.90

before

editing

after

editing

before

editing

after

editing

before

editing

after

editing

Note---b

is

here

used

to

represent

a

blank

character.

Suppressing Preceding Zeros

Operand-A
Operand-B
Operand-B

0000012345

bb,bbb,bbb.OO-

bbbbbbb123.45

before

editing

after

editing

Note---b

is

here

used

to

represent

a

blank

character.

6-6

524 -700504 -M6

COPYRIGHT

©

1970

FRIDEN

01

V!

SION

TH[

SINGER

COMPANY

EXCHANGE

INSTRUCTION

EXCHANGE INSTRUCTION

I

The

Exchange

instruction

interchanges

the

characters

in

two

fields

of

equal

length

in

main

memory.

Each

field

can

comprIse

1 -

100

characters.

INSTRUCTION FIELDS

Machine Operation

Code

F---Binary

1111

(15).

Address Specification

I

A---Address

of

the

leftmost

position

of

Operand-A.

B---Address

of

the

leftmost

position

of

Operand-B.

Indexing Specification

IA--Index

register

for

determining

effective

address

of

Operand-A.

IB--Index

register

for

determining

effective

address

of

Operand-B.

Common

Partition Specification

Length Specification

7-1

AC--If

AC

is

0,

A

is

an

address

in

controlling

partition.

If

AC

is

1 ,

A

is

an

address

in

Common.

BC--If

BC

is

0,

B

is

an

address

in

controlling

partition.

If

BC

is

l,

B

is

an

address

in

Common.

LA--Tens

position

of

length

of

both

Operand-A

and

Operand-

B.

LB--Units

position

of

length

of

both

Operand-A

and

Operand-

B.

524 -700504 -M6

COPYRIGHT

©

1970

F-.

R L

r.

E.

,'\j D v (

s:

;)

NTH

r

c:;

til G

t.

K C ,J

"'"

~,

to.

r'IoI

'I

EXCHANGE INSTRUCTION

OPERAND

FIELDS

Operand-A Address

Operand-B Address

Operand Lengths

OPERATION

General Description

Condition Code·

If

IA

is

0,

then

A

is

the

effective

address.

If

IA

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

A

to

determine

the

effective

address

of

Operand-A.

If

AC

is

1,

the

effective

address

lies

in

Common.

If

IB

is

0,

then

B

is

the

effective

address.

If

IB

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

B

to

determine

the

effective

address

of

Operand-B.

If

BC

is

1,

the

effective

address

lies

in

Common.

Operand-A

and

Operand-B

are

equal

in

length.

10LA +

LB = Lengths

of

operands

for

Move

Character
instruction.
If

10LA +

LB = 00,

100

is

the

length

of

the

operands.

The

leftmost

character

of

Operand-B

is

extracted

and

held

temporarily

in

a

register.

The

character

in

the

leftmost

position

of

Operand-A

is

moved

to

the

leftmost

position

in

Operand-B,

and

the

character

in

the

register

is

then

store~

in

the

leftmost

position

of

Operand-A.

This

operation

is

repeated

from

left

to

right

until

the

entire

fields

have

been

interchanged.

12,

after

completion

of

the

Exchange

instruction.

Execution Time (T)

in

Microseconds

7·2

T=38.9

+

13.3

(10LA + LB) + TIX.

Key:

TIX = 0.0
TIX = 58.9­TIX

= 31 . 1

if

IA

and

IB

are

both

zero

if

IA

and

IB

are

both

non-zero

if

IA

or

IB

is

non-zero.

524 -700504 -M6

COPYRIGHT

©

1970

FRIDEN

DiVISION

THE

SINGEH

COMPANY

EXCHANGE INSTRUCTION

PROGRAMMING HINTS

7-3

If

Operand-A

and

Operand-B

do

not

overlap,

a

simple

exchange

occurs.

If

Operand-A

and

Operand-B

overlap

each

other,

the

programmer

can

predict

the

result

for

any

particular

case

by

mentally

stepping

through

the

operation

as

described

in

"General

Description"

above.

NOTE----Using

an

overlapped

exchange

instruction

can

be

useful

for

rotating

characters

of

a

field.

If

Operand-A

and

Operand-B

overlap

for

all

but

one

character,

then

each

time

the

exchange

instruction

is

executed

the

leftmost

character

moves

to

the

rightmost

position,

and

all

other

characters

move

one

position

to

the

left.

524 -700504 -M6

COPYRIGHT

C

1970

F~IOEN

DIVISION

THE

SINGER

COMPANY

FORM NUMERIC INSTRUCTION

FORM NUMERIC

The

Form

Numeric

instruction

moves

numeric

information

from

a

1-10

position

mixed

field

to

a

second

1-10

position

field.

After

the

operation,

the

second

field

is

of

the

numerical

form

normally

used

for

arithmetic

operations.

INSTRUCTION

FIELDS

Machine Operation

Code

I

F---Binary

1101

(13).

Address Specification

Indexing

Common

I

A---Address

of

the

leftmost

position

of

Operand-A.

B---Address

of

the

leftmost

position

of

Operand-B.

Specification

Partition

IA--Index

register

for

determining

effective

address

of

Operand-A.

IB--Index

register

for

determining

effective

address

of

Operand-B.

Specification

AC--If

AC

is

0,

A

is

an

address

in

controlling

partition.

If

AC

is

1 , A

is

an

address

in

Common.

BC--If

BC

is

0,

B

is

an

address

in

controlling

partition.

If

BD

is

1 , B

is

an

address

in

Common.

Length Specification

8-1

I

LA--Length

of

Operand-A.

LB--Length

of

Operand-B.

524

-700504 -M6

COPYRIGHT

©

1970

FORM NUMERIC INSTRUCTION

OPERAND

FIELDS

Operand-A Address

Operand·B Address

Operand Lengths

OPERATION

If

IA

is

0,

then

A

is

the

effective

address.

If

IA

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

A

to

determine

the

effective

address

of

Operand-A.

If

AC

is

1,

the

effective

address

lies

in

Common.

If

IB

is

0,

then

B

is

the

effective

address.

If

IB

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

B

to

determine

the

effective

address

of

Operand-B.

If

BC

is

1,

the

effective

address

lies

in

Common.

If

LA

is

0,

the

length

of

Operand-A

is

10

characters.

If

LA

is 1 thru

9,

the

length

of

Operand-A

is 1 thru

9

characters.
If

LB

is

0,

the

length

of

Operand-B

is

10

characters.

If

LB

is 1 thru

9,

the

length

of

Operand-B

is 1 thru

9

characters.

Execution

of

Form Numeric Instruction

8·2

Execution
rightmost
sign:

begins
digit

with

a

right-to-left

search

for

the

in

Operand-A

and a determination

of

its

----If

the

rightmost

non-blank

character

is a digit,

it

is

moved

unchanged

into

the

rightmost

position

of

Operand-B.

The

sign

of

Operand-B

is

positive.

----If

the

rightmost

non-blank

character

is

one

of

the

characters

P

thru

Y,

it

is

considered

to

be a digit

with a minus

sign.

It

is

moved

unchanged

into

the

rightmost

position

of

Operand-B.

The

sign

of

Operand-B

is

negative.

----If

the

rightmost

non-blank

character

is

a

hyphen

(minus

sign),

the

rightmost

digit

is

converted

to

the

corresponding

character

P

thru

Y

(i.e.,

bit-7

is

set

ON)

and

is

stored

in

the

rightmost

position

of

Operand-B.

The

sign

of

Operand-B

is

negative.

524 -7ooe04 -Me

COPYRIGHT

C 11170

FORM NUMERIC INSTRUCTION

Condition Codes

----If

the

rightmost

non-blank

character

is

none

of

the

above,

it

is

skipped

over

and

the

rightmost

digit

is

moved

unchanged

into

the

rightmost

position

of

Operand-B.

The

sign

of

Operand-B

is

positive.

Once

the

rightmost

digit

is

selected

from

Operand-A

and

is

moved

into

Operand-B,

the

process

continues

from

right

to

left.

The

next

digit

to

the

left

is

found

in

Operand-A

and

is

moved

unchanged

into

the

next

left

position

of

Operand-

B.

Intervening

characters

which

are

not

digits

are

simply

passed

over

and

are

not

moved.

If

a

digit

is

moved

into

the

leftmost

position

of

Operand-

B

and

there

are

yet

unmoved

digits

in

Operand-A,

the

operation

is

abandoned

and

Condition

Code 4 is

set

to

show

the

overflow

condition.

When

the

leftmost

digit

of

Operand-A

is

moved

into

an

Operand-B

position,

any

unfilled

positions

in

Operand-B

are

set

to

zero

and

the

operation

is

finished.

If

Operand-A

consists

entirely

of

blank

characters,

digits

can

be

moved.

In

this

case,

Operand-B

is

set

zero

in

all

positions.

After

completion

of

the

Form

Numeric

instruction.

=Negative,

non-zero

Operand-B.

2 =

Zero

Operand-B.

3 =

Positive,

non-zero

Operand-B.

4 =

Overf

low.

no
to

Execution Time (T)

in

Microseconds

8-3

T =

43.3 + 3.33

(LA) +

7.78

(LB) + 2.22

(Z) + TIX,

if

LA

- Z

is

equal

to

or

less

than

LB.

T

= 45 . 5 5 +

1.

1 1 (LA) + 1 0 . 0

(L

B) +

4.

4 4

(z')

+ T I X ,

if

LA

- Z

is

greater

than

LB,

causing

an

improper

overflow.
Key

Z =

Number

of

non-numeric

characters

in

Operand-A.

Z' = Number

of

non-numeric

characters

encountered

i

Operand-A

before

LB

is

filled.

TIX = 0.0,

if

IA

and

IB

are

both

zero.

TIX=58.9,

if

IA

and

IB

are

both

non-zero.

TIX=31.1,

if

IA

or

IB

is

non-zero.

524 -700504 -M6

COPV.,GHT

©

1970

MOVE

CHARACTER

INSTRUCTION

MOVE

CHARACTER INSTRUCTION

I

The

Move

Character

instruction

moves

1-100

characters

one

location

in

main

memory

to

another.

from

INSTRUCTION

FIELDS

Machine Operation Code

I

F---Binary

1000

(8).

Address Specification

Indexing

Common

I

A---Address

of

the

leftmost

position

of

Operand-A.

B---Address

of

the

leftmost

position

of

Operand-B.

Specification

Partition

IA--Index

register

for

determining

effective

address

of

Operand-A.

IB--Index

register

for

determining

effective

address

of

Operand-B.

Specification

AC--If

AC

is

0,

A

is

an

address

in

controlling

partition.

If

AC

is

1 ,

A

is

an

address

in

Common.

BC--If

BC

is

0,

B

is

an

address

in

controlling

partition.

If

Be

is

1 ,

B

is

an

address

in

Common.

Length Specification

9-1

LA--Tens

position

of

length

of

both

Operand-A

and

Operand-

B.

LB--Units

position

of

length

of

both

Operand-A

and

Operand-

B.

524 -700504 -M6

COPY~IGHT

©

1970

FqIDE.N

0,

VISiON

THE

S'NGER

COMPANY

MOVE

CHARACTER

INSTRUCTION

OPERAND FIELDS

Operand-A Address

Operand-B Address

Operand Lengths

OPERATION

General Description

Condition Code

If

IA

is

0,

then

A

is

the

effective

address.

If

IA

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

A

to

determine

the

effective

address

of

Operand-A.

If

AC

is

1,

the

effective

address

lies

in

Common.

If

IB

is

0,

then

B

is

the

effective

address.

If

IB

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

B

to

determine

the

effective

address

of

Operand-B.

If

BC

is

1,

the

effective

address

lies

in

Common.

Operand-A

and

Operand-B

are

equal

in

length.

lOLA +

LB

Length

of

operands

for

Move

Character
instruction.
If

lOLA +

LB

00,

100

is

the

length

of

the

operands.

Operand-A

is

copied

into

Operand-B,

one

position

at a time,

from

left

to

right,

starting

with

the

leftmost

position

of

Operand-A

and

writing

it

into

the

leftmost

position

of

Operand-B.

12,

after

completion

of

the

Move

Character

instruction.

Execution Time. (T) in Microseconds

9-2

T = 4 0 • 0 + 1 1 . 1 ( lOLA + L B) + T I X
Key:

TIX

=

0.0

TIX=58.9
TIX = 31.1

if

IA

and

IB

are

both

zero

if

IA

and

IB

are

both

non-zero

if

IA

or

IB

is

non-zero

524 -700504 -M6

COPYRIGHT

©

1970

FRIOf:...N

D'V1510N

THE

S,NGERCOMPAII,IY

MOVE

CHARACTER

INSTRUCTION

PROGRAMMING HINTS

Move

Character

VS

Move Numeric

Overlapping Operands

9-3

The

Move

Character

instruction

is

similar

to

the

Move

Numeric

instruction.

The

Move

Numeric

instruction

will

extract

and

copy

only

the

numeric

portion

of

a

character

{leaving

the

zone

bits

unchanged};

the

Move

Character

instruction

will

copy

an

entire

character

including

both

numeric

and

zone

portions.

If

Operand-A

and

Operand-B

do

not

overlap,

then

Operand-A

is

unchanged

by

the

Move

Character

instruction.

To

shift

the

Operand-A

data

field

one

or

more

positions

to

the

left

{to

a

lower

machine

address}

the

Move

Character

instruction

can

be

used

when

the

operands

overlap

if

the

Operand-B

address

is

not

greater

than

the

Operand-A

address.

Only

the

unlapped

positions

of

Operand-A

will

be

unchanged.
To

propagate

a

given

character

throughout

a

data

field,

put

the

character

into

the

leftmost

position

of

the

field,

and

use

the

Move

Character

instruction

as

follows:

Operand-A

address

is

the

address

of

the

data

field.

Operand-B

address

is

the

address

of

the

data

field

+

1.

Operand

length

must

be 1 less

than

the

data

field

length.

524 -700504 -M6

COPYRIGHT

©

1970

rJ:JIC(~i

0;

VI

SION

THE

S[NG£.~

COMPANY

MOVE NUMERIC INSTRUCTION

MOVE

NUMERIC INSTRUCTION

I

The

Move

Numeric

instruction

moves

the

numeric

portion

of

1-100

characters

from

one

location

in

main

memory

to

another.

The

zone

bits

of

both

fields

are

unchanged.

INSTRUCTION FIELDS

Machine Operation

Code

F---Binary

1001

(9).

Address Specification

I

A---Address

of

the

leftmost

position

of

Operand-A.

B---Address

of

the

leftmost

position

of

Operand-B.

Indexing Specification

IA--Index

register

for

determining

effective

address

of

Operand-A.

IB--Index

register

for

determining

effective

address

of

Operand-B.

Common Partition Specification

Length Specification

10-1

AC--If

AC

is

0,

A

is

an

address

in

controlling

partition.

If

AC

is

1,

A

is

an

address

in

Common.

BC--If

BC

is

0, B is

an

address

in

controlling

partition.

If

BC

is

1, B is

an

address

in

Common.

LA--Tens

position

of

length

of

both

Operand-A

and

Operand-

B.

LB--Units

position

of

length

of

both

Operand-A

and

Operand-

B.

524 -700504 -M6

COPYRiGHT

©

1970

FR.OEN

DiVISION

THE.

SlNGEtl

COMPAN'r

MOVE

NUMERIC

INSTRUCTION

OPERAND FIELDS

Operand-A Address

Operand-8 Address

Operand Lengths

OPERATION

General Description

Condition Code

If

IA

is

0,

then

A

is

the

effective

address.

If

IA

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

A

to

determine

the

effective

address

of

Operand-A.

If

AC

is

1,

the

effective

address

lies

in

common.

If

IB

is

0,

then

B

is

the

effective

address.

If

IB

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

B

to

determine

the

effective

address

of

Operand-B.

If

BC

is

1,

the

effective

address

lies

in

common.

Operand-A

and

Operand-B

are

equal

in

length.

10LA +

LB = Length

of

operands

for

Move

Numer

ic

instruction.
If

10LA +

LB=

00,

100

is

the

length

of

the

operands.

The

numeric

portion

of

Operand-A

is

copied

into

the

numeric

portion

of

Operand-B,

one

position

at a time,

from

left

to

right,

starting

with

the

leftmost

position

of

Operand-A

and

writing

it

into

the

leftmost

position

of

Operand-B.

12,

after

completion

of

the

Move

Numeric

instruction.

Execution Time

(T)

in

Microseconds

10-2

T

40.0

+

11.1(10LA

+ LB) +

TIX

Key:

TIX = 0.0
TIX = 58.9
TIX

= 31 . 1

ifIA

and

IB

are

both

zero

if

~,

and

IB

are

both

non-zero

if

IA

or

IB

is

non-zero.

524

-700504 -M6

COP

y

~<, G ~

T © ' 9 7 0 F

H'

''I

E f\j D

v,

S.

'0"1

1

)o-i

f 5 N G E

,<

1...:

o'~

I'

A.

....

'>

MOVE NUMERIC INSTRUCTION

PROGRAMMING HINTS

Move Numeric

VS

Move Character

Overlapping

Operands

10-3

The

Move

Numeric

instruction

is

similar

to

the

Move

Character

instruction.

The

Move

Numeric

instruction

will

extract

and

copy

only

the

numeric

portion

of

a

character

(leaving

the

zone

bits

unchanged)~

the

Move

Character

instruction

will

copy

an

entire

character

including

both

numeric

and

zone

portions.

If

Operand-A

and

Operand-B

do

not

overlap,

then

Operand-A

is

unchanged

by

the

Move

Numeric

instruction.

To

shift

the

Operand-A

numeric

field

one

or

more

positions

to

the

left

(to a lower

machine

address)

the

Move

Numeric

instruction-can

be

used

when

the

operands

over-lap

if

the

Operand-B

address

is

not

greater

than

the

Operand-A

address.

The

unlapped

positions

of

Operand-A

and

all

zone

bits

in

both

operands

will

be

unchanged.

To

propagate

a

given

digit

throughout

a

data

field,

put

the

digit

into

the

leftmost

position

of

the

field,

and

use

the

Move

Numeric

instruction

as

follows:

Operand-A

address

is

the

address

of

the

data

field.

Operand-B

address

is

the

address

of

the

data

field

+

1.

Operand

length

must

be 1 less

than

the

data

field

length.

The

Move

Numeric

instruction

enables

the

programmer

to

change

the

numeric

portions

of

instructions.

If

is

most

frequently

used

in

address

modification

(A

and

B

fields).

It

is

also

useful

in

varying

the

LA

and/or

LB

fields.

524 -700504 -M6

Copy",

GH r ©

1970

FR1DlN

01

VI

SION

THE

SINGER

COMPANY

MULTIPLY INSTRUCTION

MULTIPLY INSTRUCTION

I

The

Multiply

instruction

computes

the

algebraic

product

two 1 to

10

position

numeric

operands.

INSTRUCTION FIELDS

Machine Operation Code

I

F---Binary

0110

(6).

Address Specification

Indexing Specification

A---Address

of

the

leftmost

position

of

Operand-A.

B---Address

of

the

leftmost

position

of

Operand-B,

and

Address

of

the

leftmost

position

of

Product

field.

of

IA--Index

register

for

determining

effectiv~

address

of

Operand-A.

IB--,Index

register

for

determining

effective

address

of

Operand-B.

Common Partition Specification

AC--If

AC

is

0,

A

is

an

address

in

controlling

partition.

If

AC

is

1 ,

A

is

an

address

in

Common.

BC--If

BC

is

0,

B

is

an

address

in

controlling

partition.

If

BC

is

1 ,

B

is

an

address

in

Common.

length

Specification

LA--Length

of

Operand-A.

LB--Length

of

Operand-B.

LB + LA--Length

of

Product

field.

11·1

524 -700504 -M6

COPYRIGHT

©

1970

F~'()EN

D'vISION

THE

S'NGEqCCMPANY

MULTIPLY INSTRUCTION

OPERAND FIELDS

Operand-A Address

Operand-8 Address

Operand

lengths

PRODUCT FIELD

OPERATION

General Description

11-2

If

IA

is

0,

then

A

is

the

effective

address.

If

IA

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

A

to

determine

the

effective

address

of

Operand-A.

If

AC

is

1,

the

effective

address

lies

in

Common.

If

IB

is

0,

then

B

is

the

effective

address.

If

IB

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to

B

to

determine

the

effective

address

of

Operand-B.

If

BC

is

1,

the

effective

address

lies

in

Common.

If

LA

is

0,

the

length

of

Operand-A

is

10

characters.

If

LA

is 1 thru

9,

the

length

of

Operand-A

is 1 thru

9

characters.
If

LB

is

0,

the

length

of

Operand-B

is

10

characters.

If

LB

is

1

thru

9,

the

length

of

Operand-B

is 1 thru

9

characters.

The

product

field

may

be

thought

of

as

the

multiplier

field

(Operand-B)

with

a

rightward

extension

of a length

equal

to

that

of

the

multiplicand

(Operand-A);

hence,

the

produ~t

field

will

be

located

at

the

Operand-B

address

and

will

have

the

length

LB

+ LA.

I

Operand-A

is

the

multiplicand.

Operand-B

is

the

multiplier.

524 -700504 -M6

COP Y RiG

H T ©

'970

F

~:

0

END

V 5

ION

THE

s· N G

(.( C (:

"'~

PAN"

MULTIPLY

INSTRUCTION

Condition Codes

11·3

The

product

is

developed

in

the

extended

Operand-B

field.

The

extension

is

cleared

to

zeros

before

the

following

computation

is

begun:

1---The

rightmost

digit

of

the

multiplier

is

put

into

a

register

to

govern

the

number

of

times

the

multiplicand

will

be

added

into

the

rightmost

positions

of

the

product

field.

2---The

rightmost

position

of

the

multiplier

field

is

cleared

to

provide

an

extra

left

position

for

the

add

operation.

3---The

multiplicand

is

added

into

the

rightmost

positions

of

the

product

field

the

number

of

times

specified

by

the

governing

multiplier

digit

stored

in

the

register.

4---Steps

1,

2,

and 3 are

repeated

with

the

next

left

digit

of

the

multiplier

acting

as

governing

digit.

The

multiplicand

is

repeatedly

added

into

the

next

left

positions

of

the

product

field.

The

process

continues

until

the

leftmost

multiplier

digit

has

served

as

governing

digit.

Bit-7

is

set

OFF

in

all

positions

of

the

product

except

the

rightmost

position

which

is

set

to

the

sign

of

the

product.

Bit-7

ON

factor

signs

differed.

Bit-7

OFF =

factor

signs

were

alike.

Bit-5

is

set

ON

in

all

positions

of

the

product

field.

Operand-A

is

unchanged

by

the

multiply

operation

if

the

fields

do

not

overlap.

An

overflow

condition

will

never

occur

if

the

numeric

portions

of

the

numeric

values

are

0

thru

9.

After

completion

of

the

Multiply

instruction:

I =

Negative,

non-zero

product.

2 =

Zero

product.

3 =

Positive,

non-zero

product.

5:24 -100504 -M6

MULTIPLY INSTRUCTION

Execution Time (T) in Microseconds

T

47.8

+

6.67

(LA

)+

10.0

(LB)

+ «

10.0

+

11.1

LA)

(S»)

+

TIX.

Key:

TIX

=

0.0,

if

lA

and

IB

are

both

zero.

TIX

=

58.9,

if

IA

and

IB

are

both

non-zero.

TIX

=

31

. 1 ,

if

IA

or

IB

is

non-zero.

S = Sum

of

digits

in

Operand-B.

PROGRAMMING

HINTS

Overlapped Operands

Overflow

11-4

In

case

of

overlapped

operands,

the

result

is

unspecified.

Overflow

will

never

occur

if

all

characters

ln

the

numeric

portions

of

the

operands

are

the

digits

0

thru

9.

Overflow

can

occur

if

the

numeric

portions

of

the

operands

contain

the

following

digits;

binary

1010

(

10)

1 a 1 1

( 1 1 )

1

100

(

12

)

1

10

1

(

13)

1 1

10

(

14

)

1 1 1 1

(

15

)

READ

INSTRUCTION

READ INSTRUCTION

I

The

Read

instruction

moves

data

from

sequential

locations

in

Main

Memory.

an

input

device

to

INSTRUCTION FIELDS

Machine Operation Code

I

F---Binary

0000

(0).

Channel Specification

LB--If

bit-1

is

0,

reading

will

be

routed

through

the

FAC.

If

bit-1

is

1 ,

reading

will

be

routed

through

the

IOC.

Mode Specification

I

LB--If

bit-4

is

0,

reading

will

be

in

the

"fill"

mode.

If

bit-4

is

1 ,

reading

will

be

in

the

"non-fill"

mode.

Input Device Specification

I

LA--Device

address

0 - 9

for

IOC.

Device

address

0 - 4

and 8 for

FAC.

Input Address Specification

Indexing Specification

12-1

A---Address

of

input

area.

B---If

the

input

device

is

not

the

disc,

B

is

the

count.

If

the

input

device

is

the

disc,

B

is

the

indirect

disc

address.

The

indirect

disc

address

points

to a 6-character

field

which

contains

the

disc

address.

The

format

of

this

field

is

illustrated

in

Figure

G12-1.

IA--Index

register

for

determining

effective

address

of

input

area.

IB--Index

register

for

determining

effective

indirect

disc

address

or

effective

count.

524 -700504 -M6

COP Y RIG

H T © 1

970

F.')

~

NOV

I S

ION

THE

5,

....

G E

~l

COM

PAN

'(

Only

the numeric portions

(1-4)

of

each

character

are used for

specifying

this

information.

Bit 7 may

be

either 0 or

1;

Bit

5

must

always

be

1.

The

information

is

specified

as

follows.

I Character

I

2..,

3

I

4

I

5

6

8.

It

-

I

1

0 A

T

T

S

S

I

4

I

I-

I

I

0 A

T

T

S

S

3

~~--

-~---

-

--_.

-t

-------

0 A

T

T

I

S

S

2

~

t

--+-------

0

I

T

T

T

S

S

I

!

I

••••••

t

DEVICE

NUMBER

(0-9)

~

HUNDREDS

DIGIT

(0

or

1)

OF

~

A

THREE

DIGIT

TRACK

NUMBER

~

TENS

DIG

IT

(0-9)

OF

A

~THREE

DIGIT

TRACK

NUMBER

..

UNITS

DIGIT

(0-9)

OF

A

~THREE

DIGIT

TRACK

NUMBER

..

TENS

DIGIT

(0-9)

OF

A

~

TWO

DIGIT

SECTOR

NUMBER

~

UNITS

DIGIT

(0-9)

OF

A

~

TWO

DIGIT

SECTOR

NUMBER

t)

ARM

NUMBER

(0-4)

NOTE:

-The

bits

in characters

1,3,4,5,

and 6 have

the following values:

Bit

1

has

the

value 1

when

it

is

ON.

Bit 2

has

the value 2

when

it

is

ON.

Bit 3

has

the value 4

when

it

;s

ON.

Bit 4

has

the

val

ue 8 when

it

is

ON.

-The

bits

in

character

2

have

the following

values:

Bit

1

has

the value 1

when

it

is

ON.

Bit 2

has

the

value 1

when

it

is

ON.

Bit

3

has

the

value 2

when

it

is

ON.

Bit

4

has

the

value 4

when

it

is

ON.

Figure G 12·1

Disc

Address Matrix Format

524 -700504 -M6

COPY~IGHT

©

1970

FR:DEN

D''''''.510N

THE

5

NGlRCOMPANY

READ

INSTRUCTION

Common Partition Specification

Count Specification

OPERATION

AC--If

AC

is

0, A is

an

address

in

controlling

partition.

If

AC

is

1, A is

an

address

in

Common.

BC--If

B

is

a

count,

the

BC

is

ignored.

If

BC

is

0,

B

is

an

address

in

controlling

partition.

If

BC

is

1,

B

is

an

address

in

Common.

If

the

disc

is

the

input

device,

the

count

is

always

100

and

is

not

specified

in

the

Read

instruction.

If

the

input

device

is

not

the

disc,

B

is

the

count.

A

count

of

0000

is

interpreted

as

10,000.

IOC General Operation

12-2

A

Read

instruction

that

specifies

data

transmission

through

the

IOC

is

executed

incrementally.

The

instruction

is

first

decoded,

and

parameters

are

set

into

registers

A, B,

and P for

the

partition

initiating

the

operation.

A

signal

is

sent

to

the

IOC

to

alert

the

input

device.

Control

is

then

relinquished

to

the

next

partition.

The

fulfillment

of

the

Read

instruction

is

performed

between

the

execution

of

instructions

in

the

other

partitions.

Before

each

instruction

begins,

the

CPU

stores

one

character

for

each

IOC

that

has a character

ready.

This

incremental

operation

proceeds

as

follows:

1---An

IOC

requests

a

character

from

the

input

device.

2---The

input

device

gives

a

character

to

the

IOC

which

sets

a

signal

to

inform

the

CPU

of

"character

ready"

.

3---Between

instruction

executions,

the

CPU

discovers

the

signal,

stores

the

character

being

held

by

the

IOC,

and

updates

the

parameter

registers.

4---If

the

number

of

characters

already

transmitted

has

reached

the

count

specified

in

the

Read

instruction,

no

more

characters

are

requested.

If

the

count

has

not

been

reached,

steps

1,

2,

3,

and

4

are

repeated.

524 -700504 -M6

Con)

0 , G ri T ©

~

Y 7 0 F-;" ,

r,

l..... C

v'S'GN T HE.

S.NG['~

CO~-1PA"-jl

READ

INSTRUCTION

If

control

returns

to

the

partition

which

initiated

the

Read

instruction

before

the

count

is

satisfied,

control

simply

passes

to

the

next

partition.

If

the

count

is

satisfied

when

control

returns

to

the

partition

which

initiated

the

Read

instruction,

a

Condition

Code

is

set

(see

description

of

individual

devices),

the

execution

continues

with

the

next

sequential

instruction

following

the

Read

instruction.

FAC General Operation

A

Read

instruction

that

specifies

data

transmission

through

the

FAC

does

not

relinquish

control

to

the

next

partition

during

data

transmission.

Instead,

the

CPU

is

devoted

exclusively

to

storing

data

provided

by

the

FAC

until

the

entire

count

is

satisfied.

During

this

period

the

CPU

does

not

service

any

IOC.

Service

to

the

IOCs

resumes

at

the

completion

of

the

Read

instruction.

Disc Access Sequence

12-3

A

Read

instruction

addressing

the

disc

does

not

typically

pre-empt

the

CPU

(as

described

above)

immediately.

It

is

sometimes

necessary

to

wait

until

the

disc

is

free,

and

then

to

wait

while

the

heads

move

to

the

required

cylinder.

During

either

type

of

wait,

control

passes

to

the

neighboring

partition,

and

returns

again

in

normal

sequence.
A

disc

is

free

if

it

is

not

bound

to

another

partition.

It

is

bound

to

a

given

partition

as

soon

as

the

partition

institutes

a

seek

upon

it;

it

remains

bound

until

data

transmission

is

complete.

If

the

disc

is

bound

to

another

partition

when a Read

instruction

is

attempted,

control

merely

passes

to

the

next

partition.

The

Read

instruction

will

be

attempted

again

when

control

returns

to

the

host

partition.

If

the

disc

is

free

when a Read

instruction

is

attempted,

a

seek

is

automatically

instituted,

and

the

disc

is

then

bound

to

the

host

partition.

If

head

movement

is

necessary,

control

passes

to

the

next

partition.

Transmission

begins

when

the

heads

reach

the

proper

cylinder,

when

control

returns

to

the

host

partition,

~nd

when

the

desired

sector

rotates

into

place.

If

the

heads

are

instituted,

control

Transmission

begins

into

place.

already

"on

cylinder"

when

the

seek

is

remains

with

the

host

partition.

as

soon

as

the

desired

sector

rotates

524 -700504 -M6

COPYRIGHT

©

1970

7RIOE.N

0'

VISION

THE

SINGER

COMPANY

READ

INSTRUCTION

Fill and Non-Fill

Condition Codes

When

the

disc

record

is

entirely

transmitted,

a

Condition

Code

is

set

to

indicate

the

outcome.

The

CPU

services

any

outstanding

IOC

for

signals,

and

execution

continues

with

the

next

sequential

instruction

following

the

Reao

instruction.

Succeeding

instructions

in

the

host

partition

which

access

the

same

cylinder

will

be

executed

without

switching

partitions.

The

first

attempt

to

access

another

cylinder,

however,

will

free

the

disc

and

pass

control

to

the

next

partition.

When

control

again

returns

to

the

host

partit~on,

the

Read/Write

instruction

will

be

subject

to

the

entire

wait

process

(as

described

above).

A

Read

instruction

using

the

IOC

will

terminate

prematurely

if

the

input

device

sends

the

IOC a

Unit

Separator

character.

In

such a case,

the

Unit

Separator

character

is

not

stored.

Remaining

positions

of

the

input

area

are

normally

filled

with

blank

characters.

If

the

non-fill

option

was

requested

(bit-4

of

instruction

field

LB),

the

remaining

positions

in

the

input

area

are

left

undisturbed.

After

completion

of

the

Read

instruction.

1 =

Error

2 =

Normal

3 =

Flag

4 =

Fault

Execution Time (T) in Microseconds

T -

91.1 + TIX

for

an

Input/Output

Channel

(IOC).

T=73.3

+

TIX

for

a

File

Access

Channel

(FAC)

.

Key:

TIX

=

0.0,

if

IA

and

IB

are

both

zero.

TIX

=

58.9,

if

IA

and

IB

are

both

non-zero.

TIX

=

31.

1 ,

if

IA

or

IB

is

non-zero.

12-4

524 -700504 -M6

COPYRIGHT

©

1970

FR,OEN

at

VISION T HE

SINGER

COMPANY

SUBTRACT INSTRUCTION

SUBTRACT INSTRUCTION

INSTRUCTION

FIELDS

The

Subtract

instruction

computes

the

algebraic

difference

between

the

numeric

portions

of

the

two

operands.

The

difference

replaces

the

second

operand

(the

minuend)

and

leaves

the

first

operand

unchanged

if

the

fields

do

not

overlap.

Machine Operation Code

F---Binary

0111

(7).

Address Specification

I

A---Address

of

the

leftmost

position

of

Operand-A.

B---Address

of

the

leftmost

position

of

Operand-B.

Indexing

Specifi catio n

IA--Index

register

for

determining

effective

address

of

Operand-A.

IB--Index

register

for

determining

effective

address

of

Operand-B.

Common Partition Specification

AC--If

AC

is

0,

A

is

address

in

controlling

p'artition.

If

AC

is

l,

A

is

address

in

Common.

BC--If

BC

is

0,

B

is

address

in

controlling

partition.

If

BC

is

1 , B

is

address

in

Common.

length

Specification

LA--Length

of

Operand-A.

LB--Length

of

Operand-B.

13·1

524 -700504 -M6

COPYRIGHT

©

1970

FRlDtN

DIVISION

TH(

SINGER

COMPANY

SUBTRACT

INSTRUCTION

OPERAND

FIELDS

Operand-A Address

Operand-B Address

Operand Lengths

13-2

If

IA

is

0,

then

A

is

the

effective

address.

If

IA

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to A to

determine

the

effective

address

of

Operand-A.

If

AC

is

1,

the

effective

address

lies

in

Common.

It

IB

is

0,

then

B

is

the

effective

address.

If

IB

is

1,

2,

or

3,

the

corresponding

index

register

is

added

to B to

determine

the

effective

address

of

Operand-B.

If

BC

is

1,

the

effective

address

lies

in

Common.

If

LA

is

0,

the

length

of

Operand-A

is

10

characters.

If

LA

is 1 thru

9,

the

length

of

Operand-A

is 1 thru

9

characters.

If

LB

is

0,

the

length

of

Operand-B

is

10

characters.

If

LB

is 1 thru

9,

the

length

of

Operand-B

is 1 thru

9

characters.

524 -700504 -M6

COPYRIGHT

©

'970

SUBTRACT

INSTRUCTION

OPERATION

General Description

Condition Codes

13-3

The

subtract

operation

proceeds

from

right

to

left

starting

with

the

rightmost

character

of

Operand-A

and

Operand-B.

Character

by

character,

the

algebraic

difference

is

developed

in

Operand-B.

The

hardware

acts

as

though

the

sign

of

Operand-A

were

reversed.

In

every

other

respect

the

instruction

behaves

like

the

Add

instruction.

If

Operand-A

is

shorter

than

Operand-B,

the

operation

proceeds

normally

until

Operand-A

is

exhausted.

After

that,

the

process

continues

in

similar

fashion

except

that

a

zero

character

is

automatically

substituted

every

time

the

logic

calls

for

a

character

from

Operand-A.

In

effect,

Operand-A

is

given

enough

preceding

zeros

to

make

it

the

same

length

as

Operand-B.

If

Operand-A

is

longer

than

Operand-B,

subtraction

stops

after

the

leftmost

position

in

Operand-B

has

been

subtracted.

The

remaining

positions

in

Operand-A

are

ignored,

and

do

not

affect

the

difference

or

the

Condition

Code.
The

algebraic

sign

of

the

difference

is

placed

in

bit-7

of

the

rightmost

position

of

Operand-B,

and

bit-5

is

turned

on.

Except

for

the

rightmost

character,

the

other

zone

bits

of

Operand-B

are

unchanged.

Operand-A

is

unchanged

by

the

subtract

operation.

If

the

difference

exceeds

the

capacity

of

Operand-B,

a

carry-to-the-Ieft

from

the

leftmost

position

does

not

occur.

Condition

Code 4 is

set

to

indicate

the

overflow.

After

completion

of

the

Subtract

instruction.

1

-=

Negative,

non-zero

difference.

2 =

Zero

difference.

3 =

Positive,

non-zero

difference.

4 =

Over

flow.

COPYRIGHT

©

1970

524 -700504 -M6

FRIOEN

01

VI

SION

THE

SING£.R

COMPANY

SUBTRACT

INSTRUCTION

Execution Time (T)

in

Microseconds

T

=42.2

+

3.3

(LA) +

10.0

(LB) + TIX

+ TOO,

if

LA

is

equal

to

or

less

than

LB.

T

=

42.2

+ 11 (LA) +

12.2

(LB) + TIX

+ TOO,

if

LA

is

greater

than

LB.

Key:

TIX

0.0,

if

IA

and

IB

are

both

zero.

TIX

=58.9,

if

IA

and

IB

are

both

non-zero.

TIX

=31.1,

if

IA

or

IB

is

non-zero.

TOO

=

0.0,

if

an

overdraft

does

not

occur.

TOO

=

10.0

(LB),

if

an

overdraft

occurs.

An

overdraft

will

always

occur

when

the

absolute

value

of

Operand-A

exceeds

the

absolute

value

of

Operand-B

and

they

have

like

signs.

PROGRAMMING HINTS

Overlapped Operands

In

case

of

overlapped

operands,

the

result

is

unspecified.

13·4

524

-700504 -M6

COPYRI

GHT @ 1970

FRIDEN

Dl

VI

SION

TH[

SINGER

COMPANY

Same

Characters

Changed

Characters

1nterna

1 Extema 1

1nterna 1 Extema 1

7

o

o

1

o

Bits

6

1

0

~------~~S~P--+-~SP~-----'--~·--~@--~--~NU~L--~

!!

A

SOH

II II

B

STX

# # C

ETX

$ $ 0 ruT

% % E

E~

&

~&~

____ ~ ______

~F

__

-4

__

~A~CK~~

I I G

BEL

(

+-_~{

____

-+

______

~H

__

~~B=S

__

~

--

-1

--

--+-----------.--------3~--~-:-~-'-::~:-----I

.--+---+---+-

~-

----.--------:"K:-----li---:'VT=----I

J--

__

-=--,~-

_ , L

FF

-:..

---

---

M

CR

~~:____4--~------.----~N-_4-~S~O------

/ / 0

S1

o 0 P

OLE

~l_~---~l----~----~Q~--~-~O~C~l-----

2

__

-+-_2~------

..

---

R.

__ _ __

QC2

__

3 3 S

OC3

1-----'-4

___

-+

_ ~ _______

r---

T

OC4

5 5 U

NAK

6 6 V

SYB

7 7 W

ETB

8 8 X

CAN

9 9 Y

EM

Z

SUB

{

ESC

<

<

\

FS

}

GS

> > A

RS

------

+---,,--------+-----------+---=-==----------

? ?

US

Table G 14·1 Write Control Conversions

524 -700504 -M6

COPYRIGHT

©

1970

FRIDEN

DIVISION

THE

SINGERCOMP

..

NY

WRITE INSTRUCTION

WRITE INSTRUCTION

The

Write

instruction

transmits

data

from

sequential

locations

in

Main

Memory

to

an

output

device.

A

control

option

enables

the

Write

instruction

to

communicate

control

information

to

the

input

or

output

device.

INSTRUCTION FIELDS

Machine Operation Code

I

F---Binary

0001

(1).

Channel Specification

I

LB--If

bit-1

If

bit-1

is

0,

writing

will

be

routed

through

the

FAC.

is

1,

writing

will

be

routed

through

the

IOC.

Write Control Specification

I

LB--If

bit-2

is

0,

If

bit-2

is

1,

normal

write.

write

control.

Output Device Specification

I

LA--Dev~ce

address

0 - 9

for

IOC.

DeVIce

address

0 - 4

and 8 for

FAC.

Output Address Specification

Indexing Specification

14-1

A---Address

of

output

area.

B---If

the

output

device

is

not

the

disc,

B

is

the

count.

If

the

output

device

is

the

disc,

B

is

the

indirect

disc

address.

The

indirect

disc

address

points

to a 6-character

field

which

contains

the

disc

address.

The

format

of

this

field

is

illustrated

in

Figure

G14-1.

IA--Index

register

for

determining

effective

address·

of

output

area.

IB--Index

register

for

determining

effective

indirect

disc

address

or

effective

count.

524 -700504 -M6

COPYRIGHT

©

\970

FRIOlN

D'vi

SION

THE

SINGER

COMPANY

Only

the numeric portions (1-4)

of

each character are

used

for

specifying

this

information. Bit 7

may

be

either

0 or

1;

Bit 5

must

always

be

1.

The

information

is

specified

as

follows.

Character

o

A

T T

s

s

4

o

A

T

T

s s

3

~

DEVICE

NUMBER

(0-9)

..

UNITS

DIGIT

(0-9)

OF

A

~THREE

DIGIT

TRACK

NUMBER

..

HUNDREDS

DIGIT

(0

or

1)

OF

~

A

THREE

DIGIT

TRACK

NUMBER

~

TENS

DIGIT

(0-9)

OF

A

~

TWO

DIGIT

SECTOR

NUMBER

~

TENS

DIGIT

(0-9)

OF

A

~THREE

DIGIT

TRACK

NUMBER

~

UNITS

DIGIT

(0-9)

OF

A

~

TWO

DIGIT

SECTOR

NUMBER

t

ARM

NUMBER

(0-4)

NOTE:

-The

bits

in characters

1.3.4.5,

and 6 have

the following values:

Bit 1

has

the value 1

when

it

is

ON.

Bit 2

has

the value 2

when

it

is

ON.

Bit 3

has

the value 4

when

it

is

ON.

Bit 4

has

the value 8

when

it

is

ON.

-The

bits

in character 2

have

the following values:

Bit 1

has

the value 1

when

it

is

ON.

Bit 2

has

the value 1

when

it

is

ON.

Bit 3

has

the value 2

when

it

;s

ON.

Bit 4

has

the value 4

when

it

is

ON.

Figure G 14-1 Disc Address Matrix Format

524 -700504 -M6

WRITE

INSTRUCTION

Common

Partition

Count Specification

OPERATION

Specification

AC--If

AC

is

0, A is

an

address

in

controlling

partition.

If

AC

is

1 ,

A

is

an

address

in

Common.

BC--If

B

is

a

count,

BC

is

ignored.

If

BC

is

0, B is

an

address

in

controlling

partition.

If

BC

is

1 ,

B

is

an

address

in

Common.

If

the

disc

is

the

output

device,

the

count

is

always

100

and

is

not

specified

in

the

Write

instruction.

If

the

output

device

is

not

the

disc,

B

is

the

count.

A

count

of

0000

is

interpreted

as

10,000.

IOC General Operation

14-2

A

Write

instruction

that

specifies

data

transmission

through

the

IOC

is

executed

incrementally.

The

instruction

is

first

decoded,

and

parameters

are

set

into

registers

A,

B,

and

P

for

the

partition

initiating

the

operation.

A

signal

is

sent

to

the

IOC

to

alert

the

output

device.

Control

is

then

relinquished

to

the

next

partition.

The

transmission

of

characters

occurs

between

the

execution

of

instructions

in

the

other

partitions.

Before

each

instruction

begins,

the

CPU

sends

one

character

to

each

IOC

which

is

ready

to

accept

one.

This

incremental

operation

proceeds

as

follows:

1---The

IOC

sets

a

signal

to

inform

the

CPU

that

it

is

ready

to

accept

a

character

from

the

output

area.

2---Between

instruction

executions,

the

CPU

discovers

the

signal

and

checks

the

count

balance.

If

the

count

has

been

reached,

no

more

characters

are

sent

to

the

IOC.

If

the

count

has

not

been

reached,

steps

3,

4,

1,

and 2 are

repeated,

in

that

order.

3---The

CPU

gives

a

character

to

the

IOC

and

updates

the

parameter

registers.

4---As

soon

as

it

can,

the

output

device

accepts

the

character.

524 -700504 -M6

CI..)P't'H

~Hr © '~7(;

F~::lEN

0

V,SION

THE

SINGER

COMPANY

WRITE

INSTRUCTION

the

partition

which

initiated

the

the

count

is

satisfied,

control

next

partition.

If

the

count

is

If

control

returns

to

Write

instruction

before

simply

passes

to

the

satisfied

when

control

initiated

the

Write

(see

description

of

continues

with

the

returns

to

the

partition

which

instruction,

a

Condition

Code

is

set

individual

devices),

and

execution

next

sequential

instruction

following

the

Write

instruction.

F

AC

General Operation

A

Write

instruction

that

specifies

data

transmission

through

the

FAC

does

not

relinquish

control

to

the

next

partition

during

data

transmission.

Instead,

the

CPU

is

devoted

exclusively

to

feeding

data

to

the

FAC

until

the

entire

count

is

satisfied.

During

this

period

the

CPU

does

not

service

any

IOC.

Service

to

the

IOCs

resumes

at

the

completion

of

the

Write

instruction.

Disc Access Sequence

14-3

A

Write

instruction

addressing

the

disc

does

not

typically

pre-empt

the

CPU

(as

described

above)

immediately.

It

is

sometimes

necessary

to

wait

until

the

disc

is

free,

and

then

to

wait

while

the

heads

move

to

the

required

cylinder.

During

either

type

of

wait,

control

passes

to

the

neighboring

partition,

and

returns

again

in

normal

sequence.

A

disc

is

free

if

it

is

not

bound

to

another

partition.

It

is

bound

to a given

partition

as

soon

as

the

partition

institutes

a

seek

upon

it;

it

remains

bound

until

data

transmission

is

complete.

If

the

disc

is

bound

to

another

partition

when

a

Write

instruction

is

attempted,

control

merely

passes

to

the

next

partition.

The

Write

instruction

will

be

attempted

again

when

control

returns

to

the

host

partition.

If

the

disc

is

free

when a Write

instruction

is

attempted,

a

seek

is

automatically

instituted,

and

the

disc

becomes

bound

to

the

host

partition.

If

head

movement

is

necessary,

control

passes

to

the

next

partition.

Transmission

begins

when

the

heads

reach

the

proper

cylinder,

when

control

returns

to

the

host

partition,

and

when

the

desired

sector

rotates

into

place.

If

the

heads

are

already

"on

cylinder"

when

the

seek

is

instituted,

control

remains

with

the

host

partition.

Transmission

begins

as

soon

as

the

desired

sector

rotates

into

place.

524 -700504 -M6

COPYRIGHT

©

1970

FRIDEN

DIVISION

THE

SINGEACOMPANY

WRITE

INSTRUCTION

Write Control Mode

Condition Codes

When

the

disc

record

is

entirely

transmitted,

a

Condition

Code

is

set

to

indicate

the

outcome.

The

CPU

services

any

outstanding

IOC

signals,

and

execution

continues

with

the

next

sequential

instruction

following

the

Write

instruction.
Succeeding

instructions

in

the

host

partition

which

access

the

same

cylinder

will

be

executed

without

switching

partitions.

The

first

attempt

to

access

another

cylinder,

however,

will

free

the

disc

and

pass

control

to

the

next

partition.

When

control

again

returns

to

the

host

partition,

the

Write

instruction

will

be

subject

to

the

entire

wait

process

(as

described

above).

A

Write

instruction

may

specify

the

transmission

of

control

characters

to

the

external

input/output

device

by

having

bit-2

of

the

LB

instruction

field

ON.

The

information

in

the

output

area

is

sent

to

the

external

device

one

character

at a time

and

exerts

a

controlling

effect.

The

particular

effect

depends

upon

the

information

transmitted

and

upon

the

external

device.

As

soon

as

the

last

character

is

accepted

by

the

external

device,

program

execution

is

free

to

continue

even

though

the

controlling

effect

is

not

yet

realized.

On

the

opposite

page

is

a

table

showing

how

each

internal

character

is

converted

to

exte~nal

form

by

an

IOC

Write

Control

instruction.

After

completion

of

the

Write

instruction.

1 =

Error

2 =

Normal

3

Flag

4 =

Faul

t

Execution Time (T) in Microseconds

14·4

T =

91

. 1 +

TIX

for

an

Input/Output

Channel

(IOC).

T =

73.3 + TIX

for a File

Access

Channel

(FAC).

Key:

TIX

0.0,

if

IA

and

IB

are

both

zero.

TIX

=58.9,

if

IA

and

IB

are

both

non-zero.

TIX=31.1,

if

IA

or

IB

is

non-zero.

524-700&04 -Me

GLOSSARY

INTRODUCTORY

NOTE

The

purpose

of

the

Glossary

is

to

define

all

new

terms

introduced

in

the

text

and

to

define

any

special

use

made

of

standard

terms.

standard

terms

which

are

used

in

a

standard

sense

are

not

included.

For

elucidation

on

these,

the

reader

is

referred

to

Computer

Dictionary

and

Handbook

by

Charles

J.

SippI

(Howard

W.

Sams

&

Co.,

Inc.,

Indianapolis,

1966).

Following

is

a

list

of

the

items

defined

in

the

Glossary:

Alphabetic

Field

Arithmetic

and

Control

Unit

(ACU)

Auxiliary

storage
Bootstrapping
Branch
Buffer
Burst

Mode

Transmission
Byte
Byte

Mode

Transmission

Central

Processing

Unit

(CPU)
Channel
Characters

Common

Area

of

Memory

Control

Character

Control

Field

Cycle-Stealing

Disc,

Bound

Disc,

Free

Double

Frame

Effective

Address

Filler

Characters

Flowcharting

Symbols

Hexadecimal

Number

fystem

Host

Partition

Index

Register
IOC
Link
Local

Mode

Main

Memory

Memory

Module

Mixed

Field
Multiprogramming
Numeric

Field

On-Line

Mode

Operation

Code
Overdraft
Overflow

Parity

Bit
Partition
Partition

Switching

Privileged

Area

of

Memory

Protected

Area

of

Memory

Return

Address
Sector
USASCII

524 -700504 -M6

COPYRIGHT

@

1970

FRIOEN

DIVISION

THE

SINGER

COMPANY

B

GLOSSARY

A

Alphabetic Field

I

A

field

consisting

strictly

of

the

alphabetic

characters

thru

z.

A

Arithmetic

and

Control Unit (ACU)

Auxiliary Storage

Bootstrapping

Branch

Buffer

I

In

System

Ten,

that

part

of

the

Central

Processing

Unit

(CPU)

which

controls

and

performs

the

execution

of

machine

instructions.

storage

in

addition

to

the

main

storage

of a computer.

Auxiliary

storage

usually

holds

much

more

information

than

the

main

storage,

and

the

information

is

accessible

less

rapidly.

In

System

Ten,

the

disc

is

considered

to

be

auxiliary

storage.

A

technique

for

loading

the

first

few

instructions

of

a

program

into

storage,

then

using

these

instructions

to

bring

the

rest

of

the

program

into

storage.

This

sometimes

involves

either

the

manual

entering

of a few

instructions

or

the

use

of a key

on

a

console.

In

System

Ten,

the

bootstrap

sequence

is

initiated

by

the

depression

of a LOAD

button

on

an

input

device

or

by

the

occurrence

of

certain

errors

during

program

execution.

In

System

Ten,

a

departure

from

the

normal

sequential

processing

of

instructions

as

caused

by

the

execution

of

the

Branch

instruction.

Another

type

of

departure

from

sequential

processing

is

the

switch

which

passes

control

to

a

neighboring

partition.

Temporary

storage

used

to

compensate

for

the

difference

in

operating

speeds

of

input/output

devices

and

the

Central

Processing

Unit

(CPU).

In

System

Ten,

the

card

reader

has

two

card

buffers,

the

card

punch

has

three

card

buffers,

the

line

printer

has

two

line

buffers,

etc.

Each

IOC

has

one

character

buffer.

::;24 -

700504 -M6

COPYRIGHT

©

1970

FRIDEN D VISION

THE

SINGl.~

COMPANY

c

GLOSSARY

Burst Mode Transmission

Byte

A

mode

of

communication

between

the

Central

Processing

Unit

(CPU)

and

external

input/output

devices.

The

information

is

transmitted

without

interruption

as a solid

procession

of

binary

bits.

In

System

Ten,

the

burst

mode

is

employed

in

transmitting

b~tween

Main

Memory

and

the

Friden

Model

40

Disc

Drive.

I

In

System

Ten,

a

group

of 6 adjacent

binary

bits.

The

bits

are

referred

to

as

bit-7,

bit-5, bit-4,

bit-3,

bit-2,

and

bit-1.

Bit-6

of

the

USASCII

Standard

Code

is

not

used.

Byte

Mode Transmission

A

mode

of

communication

between

the

Central

Processing

Unit

(CPU)

and

external

input/output

devices.

Transmission

proceeds

one

character

at a time

on a cycle-stealing

basis.

In

System

Ten,

all

transmission

through

the

Input/Output

Channel

(IOC)

is

accomplished

in

this

mode,

as

is

also

transmission

through

the

File

Access

Channel

(FAC)

when

the

Friden

Model

45

Magnetic

Tape

Drive

is

the

input/output

device.

Central Processing Unit (CPU)

Channel

Characters

In

System

Ten,

the

Central

Processing

Unit

(CPU)

comprises

the

Arithmetic

and

Control

Unit

(ACU),

the

File

Access

Channel

(FAC),

one

to

twenty

Input/Output

Channels

(IOC),

and

Main

Memory.

A

path

along

which

information,

particularly

a

series

of

bits

or

characters,

may

flow.

In

System

Ten,

each

partition

has

a

private

Input/Output

Channel

(IOC)

which

transmits

in

the

byte

mode.

Common

to

all

partitions

is

a

single

File

Access

Channel

(FAC)

which

transmits

in

the

burst

mode

when

the

disc

is

used.

A

set

of

coded

symbols

that

includes

the

decimal

digits

0

thru

9,

letters

A

thru

Z,

punctuation

marks,

operation

symbols,

and

other

symbols.

In

System

Ten,

each

character

is

represented

by 6 binary

bits.

524

-700504 -M6

COPYRIGHT

©

1970

FRtDEN

D'VISION.

THE

SING£RCOMPANY

o

GLOSSARY

Common Area

of

Memory

Control Character

Control

Fi~ld

Cycle-Stealing

Disc, Bound

Disc, Free

In

System

Ten,

that

portion

of

memory

which

is

not

partitioned.

The

Common

Area

comprises

Protected

storage

(locations

0-299),

a

Non-Privileged

area,

and

an

optional

Privileged

area

accessible

only

to

privileged

partitions.

\

A

character

whose

occurrence

in

a

particular

initiates,

modifies,

or

stops

a

control

operation.

context

l

In

System

Ten,

the

second

operand

used

by

the

Edit

instruction.

The

control

field

governs

the

format

of

the

edited

result.

Data

channels

give

the

Arithmetic

Control

Unit

(ACU)

the

ability

to

delay

the

execution

of

a

program

for

communication

of

an

input/output

device

with

memory.

If

an

input

unit

requires

a

memory

cycle

to

store

data

that

it

has

collected,

the

data

channel

makes

it

possible

to

delay

the

program

prior

to

the

execution

of

an

instruction,

and

to

store

the

data

without

changing

the

logical

condition

of

the

ACU.

After

the

data

is

stored,

the

program

continues

as

though

nothing

has

occurred.

In

System

Ten,

cycle-

stealing

occurs

between

instructions,

and

during

the

transmission

of

data

between

magnetic

tape

and

memory.

In

System

Ten, a disc

is

bound

to a given

partition

as

soon

as

the

partition

institutes

a

seek

upon

it.

The

disc

remains

bound

until

data

transmission

is

complete.

While

a

disc

is

bound

to a given

partition,

it

cannot

be

accessed

by

another

partition.

I

In

System

Ten, a disc

another

partition.

is

free

when

it

is

not

bound·

to

524

-700504 -M6

COPYRIGHT

©

1970

FR10E.N

D'VISION

THE

51NGEH

COMPANY

GLOSSARY

Double Frame

Effective Address

F

Filler Characters

In

System

Ten,

a

special

method

of

reading

or

writing

9-

track

magnetic

tape

in

which

the

eight

bits

of

data

in

each

tape

row

are

constructed

from

(or

read

into)

the

numeric

portions

of

two

consecutive

locations

in

main

memory.

The

same

method

can

also

be

used

on

eight-channel

paper

tape

readers

and

paper

tape

punches.

The

address

that

is

actually

used

in a particular

execution

of

an

instruction.

In

System

Ten

the

effective

address

for

a

given

instruction

address

field

is

the

sum

of

the

address

field

added

to

the

contents

of

whatever

index

register

is

associated

with

that

field.

I

All

characters

used

in

the

edit

machine

instruction

EXCEPT

the

'at'

sign

«(e),

slash

(I),

dash

(-),

comma

(,),

and

decimal

point

(.).

524 -7')0504 -M6

H

GLOSSARY

Flowcharting Symbols

D

<>

(

)

0

........

t t

~

PROCESSING

A

GROUP

OF

PROGRAM

INSTRUCTIONS

WHICH

PERFORM A PROCESSING

FUNCTION

OF

THE

PROGRAM.

DECISION

THE

DECISION

USED

TO

DOCUMENT

POINTS

IN

THE

PROGRAM

WHERE A BRANCH

TO

ALTERNATE

PATHS

IS

POSSIBLE

BASED

UPON

VARIABLE

CONDITIONS.
TERMINAL
THE

BEGINNING,

END,

OR

POINT

OF

INTERRUPTION

IN A PROGRAM.
CONNECTOR
AN

ENTRY

FROM,

OR

AN

EXIT

TO,

ANOTHER

PART

OF

THE

PROGRAM

FLOWCHART.

FLOW

01

RECTION

THE

01

RECTION

OF

PROCESS

ING

OR

DATA

FLOW.

Table J·1 Flow Chart Symbols

Hexadecimal Number System

Host Partition

I

A

number

system

using

the

equivalent

of

the

decimal

number

sixteen

as a base.

In

System

Ten,

the

digits

greater

than

9

are

written

as

10,11,12,13,14,15.

I

The

partition

in

control

executed.

when

the

given

instruction

is

524 -700504 -M6

COPYRIGHT

©

1970

FRIDEN

D'VISION

THE

SINGER

COMPANY

GLOSSARY

Index Register

loe

L

Link

Local Mode

M

Main Memory

Memory

Module

A

register

whose

primary

purpose

is

to

modify

addresses

in

computer

instructions.

In

System

Ten

there

are

three

index

registers

in

each

partition.

They

are

referred

to

by

number

and

occupy

partition

storage

locations

11-14

(index

register

1),

21-24

(index

register

2),

and

31-34

index

register

3).

I

An

abbreviation

for

Input/Output

Channel

on

the

System

Ten.

In

System

Ten,

a

variant

of

the

Branch

instruction

ordinarily

used

in

calling

subroutines.

Link

first

establishes

a

return

path

from a subroutine

and

then

passes

control

to

the

beginning

of

the

subroutine.

The

mode

in

which

data

may

NOT

be

transmitted

between

a

device

and

an

Input/Output

Channel

(IOC).

In

System

Ten,

the

entire

core

storage.

This

includes

the

storage

occupied

by

all

partitions

as

well

as

the

entire

common

region

which

includes

the

protected

area,

the

non-

privileged

area,

and

the

privileged

area.

In

System

Ten,

the

minimum

unit

of

core

storage.

A

Memory

Module

contains

10,000

character

positions.

In

System

Ten,

core

storage

may

contain

1-11

Memory

Modules.

524 -700504 -M6

COP),j::.IGHT

©

1970

FRIDE.N

O.VISION

THE.

SINGEHCOMPANY

GLOSSARY

Mixed Field

Multiprogramming

N

Numeric Field

o

On-Line Mode

Operation Code

Overdraft

Overflow

A

field

which

may

include

any

combination

including,

for

example,

alphabetic,

punctuation

characters.

In

System

Ten,

a

for

printing

by

the

Edit

instruction

is

field.

of

characters

numeric,

and

field

prepared

usually

a

mixed

A

technique

for

handling

numerous

routines

or

programs

simultaneously

by

overlapping

of

interleaving

their

execution.

In

system

Ten,

the

programs

being

executed

simultaneously

each

reside

in a separate

memory

partition.

Multiprogramming

is

achieved

by

passing

control

from

one

partition

to

another

in

round-robin

sequence.

IA

field

containing

numeric

information

and

sign

indication.

I

The

mode

which

permits

the

transmission

of

data

between

a

device

and

an

Input/Output

Channel

(IOC)

or

File

Access

Channel

(FAC).

I

The

part

of

a

System

Ten

machine

specifies

the

operation

to

be

performed.

instruction

which

In

System

Ten,

an

intermediate

condition

which

sometimes

occurs

in

the

subtraction

process.

Not

to

be

confused

with

Overflow,

which

yields

a

wrong

answer.

In

System

Ten,

an

erroneous

result

caused

by

an

attempt

to

develop

an

answer

too

large

for

the

field

assigned

to

it.

524 -700504 -M6

COPYRI(iHT

©

1970

FRIDEN

D'V!510N

THE

S,NGERCOMPANY

p

R

GLOSSARY

Parity Bit

Partition

Partition Switching

I

A

binary

digit

(i.e.,

either

0

or

1)

appended

to a string

of

bits

to

make

the

sum

of

all

the

bits

which

are

ON

either

always

odd

or

always

even.

In

System

Ten, a portion

of

core

storage.

A

system

may

contain

1-20

partitions.

Each

partition

has

3

index

registers

and

an

Input/Output

Channel

(IOC).

Partitions

may

communicate

with

each

other

only

through

common

storage

or

devices

on

the

File

Access

Channel

(FAC).

In

System

Ten,

an

automatic

process

by

which

control

passes

from

one

partition

to

its

neighbor.

Partition

Switching

consists

essentially

of

saving

status

information

necessary

to

resume

the

program

which

is

relinquishing

control,

selecting

the

partition

which

is

to

gain

control,

restoring

its

Condition

Code,

and

passing

control

to

the

appropriate

instruction

within

it.

Privileged Area of Memory

I

In

System

Ten,

an

optiohal

hardware

setting

that

reserves

an

upper

portion

of

cor~on

storage

for

use

by

privileged

partitions

which

are

designated

when

the

option

is

set.

Protected Area

of

Memory

Return Address

In

System

Ten,

locations

0-299

of

the

common

storage

area.

Programs

cannot

store

information

in

this

area

which

is

used

by

the

ACU

to

keep

information

pertinent

to

partition

switching

and

input/output

operations.

A

program

may

examine

information

in

the

protected

area

even

though

it

cannot

(directly)

alter

it.

In

System

Ten,

control

returns

subroutine.

the

address

of

the

instruction

to

which

after

a

particular

execution

of

a

~24 -700~04

-

Me

GLOSSARY

s

Sector

u

USASCII

A

sector

is

one-fiftieth

(1/S0th)

of a track

on

the

Friden

Model

40

Disc

Drive.

Each

sector

holds

100

characters

(each

consisting

of

6

bits).

Reading

and

writing

on

the

disc

is

always

done

in

groups

of

100

characters.

A

contraction

for

"United

states

of

America

Standard

Code

for

Information

Interchange".

This

standard

defines

the

graphics

and

codes

for

a

128

character

set.

Commonly

referred

to

as

ASCII.

524 -700504 -M6

COPYRIGHT

©

1970

FRIDE.N

D'VISION

THE

StNGERCOMPANY

SINGER

FRtDEN

DIVISION

INT.

10-202