This document describes operation of the Silicon Laboratories Si5xxUC-EVB evaluation
board designed to evaluate any of Silicon Labs’ pin-controlled or I2C configurable Si5xx
XOs or VCXOs. Three device sites are available to support one of either 5mm x 7mm,
3.2mm x 5mm, or 2.5mm x 3.2mm devices in either 4, 6, or 8 pin configurations. Selector switches make it easy to configure device control pins (pins 1, 2, 7, or 8) for proper
operation without the use of jumpers. Similarly, XO device VDD voltage (3.3V, 2.5V,
1.8V) can be selected via switches based on either external +5V (for stand-alone operation) or micro USB sourced +5V USB operation. The EVB also features flexible output
termination circuits and PCB layout optimized for superior signal integrity.
Ext +5V
micro
USB
+VDD
GND
SDA
Vc_In
Power
Select
Switch
Silicon Labs
MCU
Pin 1
Signal
Selector
Switch
I2C Bus
Pin 1
SDA
SCL
Pin 1
Pin 2
Pin 7
Pin 8
Power
Supply
+VDD
XO
Location 1
(5mm x 7mm)
KEY FEATURES
• Evaluation of any Silicon Labs XO or
VCXO (Si51x, Si53x, Si54x, Si55x, Si56x,
Si57x, Si59x)
• AC coupled differential/single-ended output
clocks.
• Voltage control (Vc) port for VCXO
evalution.
• Switch selectable settings. No jumpers.
• External power or USB powered.
• Use stand-alone or with our Pro-
grammable Oscillator Calculator SW tool
Voltage
Selector
Switches
Output
Termination
CLK1_P
CLK1_N
+VDD
GND
SCL
+VDD
GND
SDA
+VDD
GND
SCL
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Pin 2
Signal
Selector
Switch
Pin 7
Signal
Selector
Switch
Pin 8
Signal
Selector
Switch
Pin 2
Pin 7
Pin 8
Pin 1
Pin 2
Pin 7
Pin 8
Pin 1
Pin 2
Pin 7
Pin 8
XO
Location 2
(3.2mm x 5mm)
XO
Location 3
(2.5mm x 3.2mm)
Output
Termination
Output
Termination
CLK2_P
CLK2_N
CLK3_P
CLK3_N
Table of Contents
1. Quick Start - Board Configuration Check List ...................3
Mount your oscillator device on the board at appropriate oscillator site location (U1, U2, or U3, but on only one location) if a device is
not yet mounted.
1. Start with EVB board powered down/off.
2. Set DIP switches (described in Section 5. Control Signal Switch Settings) for your specific device:
a. Look up your device as appropriate in the tables of Sections 6. Supported Devices - Stand-Alone Mode or 7. Supported Devi-
ces - Software Controlled Mode - I2C.
b. Make DIP switch settings per table entry for pins 1,2,7,8 as appropriate. See Sections 6. Supported Devices - Stand-Alone
3. Verify output termination is appropriate for your device (see Section 9. Output Clock Terminations for more info).
4. Set +5V Select switch (SW5) based on how you will power the EVB, either via USB or via external +5V supply.
5. Connect power, either via USB port or external +5V power supply as chosen in previous step.
6. Output Clocks:
• For pin controlled oscillators, clock output should be available on output SMAs of DUT site in use.
• For I2C oscillators, run appropriate configuration software (e.g., Programmable Oscillator Software tool) and perform device
configuration to get desired output clock.
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UG298: Si5xxUC-EVB
Functional Description
2. Functional Description
The Si5xxUC-EVB is an evaluation board designed to support any Silicon Labs XO/VCXO device. The Si5xxUC-EVB is designed to
operate in one of two general operational modes:
• Stand-alone mode: The stand-alone mode is for evaluation of fixed output frequency or pin-controlled XO/VCXO devices
where I2C support is NOT required to operate or evaluate the device. Control of device pins, such as OE or FS, is done via on-board
switches. In Stand-alone mode the on-board switches must be set according to the requirements of the device installed on the
board. For example, if the installed device is a dual frequency part with output enable, the appropriate switches must be set to assert
output enable (OE) and the frequency select pin (FS) to give the desired output frequency. Device VDD voltage can be set via on-
board switches as well. Switch setting details for Stand-alone mode are shown in Section 4. Power Supply and I2C Bus Control (for
power supply) and Section 5. Control Signal Switch Settings (for device pins).
• Software controlled mode: The software controlled mode is for use with PC-based software tools (such as our Programmable Os-
cillator Calculator Tool) to control/configure the device being evaluated via the device I2C bus. The software controlled mode is pri-
marily intended for I2C controlled XO/VCXO devices. When using software controlled mode, some of the on-board switches must
be placed in specific default settings to allow the on-board MCU to perform I2C control. Other switches must still be used on certain
device signals, like output enable (OE). Switch setting details for software controlled mode are shown in Section 4. Power Supply
and I2C Bus Control (for power supply & I2C) and Section 5. Control Signal Switch Settings (for device pins).
For each of the 3 device locations on the Si5XXUC-EVB, separate sets of SMA outputs and terminations are provided per XO “Device
Under Test” (DUT) location even though only one device may be populated and used at a time (see Section 3. General Operational
Restrictions below). Separate outputs and terminations per device site provides the best possible clock signal integrity for each DUT
location.
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UG298: Si5xxUC-EVB
General Operational Restrictions
3. General Operational Restrictions
3.1 Evaluate Only a Single Device at a Time
Note: It is strongly recommended to populate only one device on the Si5xxUC-EVB board at a time. Carefully read the next paragraph
for important information.
The Si5xxUC-EVB supports evaluation of a single device in one of three different DUT locations. Device sizes supported are 5mm x
7mm, 3.2mm x 5mm, or 2.5mm x 3.2mm. All device locations can support 4, 6, or 8 pin configurations, but only one device at a time
should be installed in any one of the three locations on the Si5xxUC-EVB. This restriction is made to ensure no problems will occur due
to potential signal crosstalk, power supply over-loading/coupling, or signal contention/loading between multiple devices. Do not simply
remove power from a mounted device in an attempt to place it in an “unused”, but still mounted, state. Board control signals are wired in
parallel to all 3 locations and a non-powered device may load control signals to a powered device under test. Please follow this “one
device at a time” recommendation and only populate one device at a time.
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UG298: Si5xxUC-EVB
Power Supply and I2C Bus Control
4. Power Supply and I2C Bus Control
The power supply uses a linear voltage regulator to drop the +5 V input supply voltage to one of the supported nominal VDD voltages of
+3.3 V, +2.5 V, or +1.8 V. A switch is provided on the EVB (SW5) to select the +5 V source for the voltage regulator as either the USB
port +5V or an external +5 V source. The EVB power supply supports operation in one of 2 general modes that correspond to the two
operational EVB use cases.
• Stand-alone mode: Power can be sourced from either external supply or USB port, but software is not required and no EVB software
tool should be actively connected to Si5XXUC-EVB when being used in Stand-alone mode. In Stand-alone mode the oscillator device VDD voltage is set via the “VDD_DUT_SEL” switch according to the voltage select table shown below. By default this switch is
set to 1.8 V and will need to be changed if evaluating a non-I2C oscillator with 2.5 V or 3.3 V VDD.
• Software controlled mode: Power can be sourced from either external power supply or USB port, but the Programmable Oscillator
Software tool can be used to set the VDD voltage to the oscillator. In software controlled mode, “VDD_DUT_SEL” switches should
remain set to 1.8 V setting regardless of the desired VDD voltage.
The I2C Disable switch is typically set to the “Off” setting (to enable the on-board MCU to drive the I2C bus) unless the user is attempting to connect an external I2C master to communicate with the oscillator device. The I2C Disable control allows for disabling the onboard I2C buffer to disconnect the oscillator from the on-board MCU. This disconnection is useful if the user wishes to connect an external I2C bus master to communicate with the DUT.
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UG298: Si5xxUC-EVB
Control Signal Switch Settings
5. Control Signal Switch Settings
Four of the 5 on-board DIP switches (SW1, 2, 3, 4) are used for configuration of the EVB oscillator locations to match any standard
oscillator pin-out. Using this DIP switch arrangement, the Si5xxUC-EVB can be configured to support all Silicon Labs oscillator devices.
The oscillator device pins that can vary in function, depending on the device variant, are pins 1, 2, 7, and 8 as shown in the Device Pinout Mapping table below. Pins 3, 4, 5, and 6 are typically fixed function pins that do not change with device variant.
Note: All device locations on the Si5xxUC-EVB can support up to 8 pin variant devices. Devices with fewer pins (4, 6 pin) can be installed in the same location and will fit within the 8 pin footprint.
Device Pin-out Mapping
4 pin
Device
6 pin
Device
8 pin
Device
DIP Switch
Function
Options
111Pin_1_Ctrl (SW1)FS/OE/SDA/Vc
-22Pin_2_Ctrl (SW2)FS/OE/SCL
233-GND
344-Output
-55-Output
466-VDD
1
1
1
1
--7Pin_7_Ctrl (SW3)FS/SDA
--8Pin_8_Ctrl (SW4)FS/SCL
Note:
1. Fixed function pins
Configuration details of each of the 4 variable pin function DIP switches is described in following sections. For devices that may not
utilize all 4 of the variable pin function switches, the corresponding unused DIP switch can be set to the NC setting (all Off position).
Make sure to make the following switch settings with the Si5xxUC-EVB powered down. Once all are set appropriately, the board may
be powered on.
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UG298: Si5xxUC-EVB
Control Signal Switch Settings
5.1 Oscillator Pin 1 Control DIP Switch (Pin_1_Ctrl)
The pin 1 control DIP switch allows oscillator pin 1 to be driven from any of these 4 sources.
1. High (VDD) level
2. Low (GND) level
3. I2C bus SDA signal
4. External control voltage Vc (for VCXO applications)
Note: The 4 signal sources listed above are connected on separate pins on left side of the switch and all pins on right side are tied
together (common) and then connect to pin 1 of the oscillator. This means that only one (1) of the switches in this DIP switch bankcan be in the ON position at a time. Switching more than 1 switch to the on position at a time may cause undesired behavior. All
switches can be set to OFF position to effectively isolate pin 1 from any signal source and is the No Connect (NC) state.
To determine the required Pin 1 switch settings for your specific device, please refer to the Supported Device Tables in Chapter
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UG298: Si5xxUC-EVB
Control Signal Switch Settings
5.2 Oscillator Pin 2 Control DIP Switch (Pin_2_Ctrl)
This DIP switch allows oscillator pin 2 to be driven from 1 of 3 sources.
1. High (VDD) level
2. Low (GND) level
3. I2C bus SCL signal
Note: The 3 signal sources listed above are located on separate pins on the left side of the switch and all pins on the right side are tied
together (common) and then connect to pin 2 of the oscillator. This means that only one (1) of the switches in this DIP switch bankcan be in the ON position at a time. Switching more than 1 switch to the ON position at a time may cause undesired behavior. All
switches set to OFF position effectively isolates pin 2 from any signal source and is the No Connect (NC) state.
To determine the required Pin 2 switch settings for your specific device, please refer to the Supported Device Tables in Chapter
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UG298: Si5xxUC-EVB
Control Signal Switch Settings
5.3 Oscillator Pin 7 Control DIP Switch (Pin_7_Ctrl)
This DIP switch allows oscillator pin 7 to be driven from 1 of 3 sources.
1. High (VDD) level
2. Low (GND) level
3. I2C bus SDA signal
Note: The 3 signal sources listed above are located on separate pins on the left side of the switch and all pins on the right side are tied
together (common) and then connect to pin 7 of the oscillator. This means that only one (1) of the switches in this DIP switch bankcan be in the ON position at a time. Switching more than 1 switch to the ON position at a time may cause undesired behavior. All
switches set to OFF position effectively isolates pin 7 from any signal source and is the No Connect (NC) state.
To determine the required Pin 7 switch settings for your specific device, please refer to the Supported Device Tables in Chapter
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UG298: Si5xxUC-EVB
Control Signal Switch Settings
5.4 Oscillator Pin 8 Control DIP Switch (Pin_8_Ctrl)
This DIP switch allows oscillator pin 8 to be driven from 1 of 3 sources.
1. High (VDD) level
2. Low (GND) level
3. I2C bus SCL signal
Note: The 3 signal sources listed above are located on separate pins on the left side of the switch and all pins on the right side are tied
together (common) and then connect to pin 8 of the oscillator. This means that only one (1) of the switches in this DIP switch bankcan be in the ON position at a time. Switching more than 1 switch to the ON position at a time may cause undesired behavior. All
switches set to OFF position effectively isolates pin 8 from any signal source and is the No Connect (NC) state.
To determine the required Pin 8 switch settings for your specific device, please refer to the Supported Device Tables in Chapter
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UG298: Si5xxUC-EVB
Supported Devices - Stand-Alone Mode
6. Supported Devices - Stand-Alone Mode
If using the Si5XXUC-EVB with a device that is either fixed frequency or has pin-controlled output frequency, this “Stand-alone mode”
section should be used to configure the EVB.
If you have a device installed that utilizes the I2C bus for making frequency or other changes to the device, please refer to Section
The tables below show pin controlled XO and VCXO devices supported by the Si5xxUC-EVB along with possible package sizes and
control pin mapping. The control pin mapping can be used to determine the corresponding switch settings on the Si5xxUC-EVB.
Table 6.1. Pin Controlled XOs
SiLabs
Device
Si510XOSingle
Si510XOSingle (Diff) 65x7, 3.2x5,
Type # Freqs# PinsPkg Sizes
(mm x mm)
45x7, 3.2x5,
(CMOS)
2.5x3.2
Pin 1
Control
OE---
Pin 2
Control
Pin 7
Control
Pin 8
Control
Pin 4 Output
1
CLK
Pin 5 Output
-
NCOE--CLK+CLK-
2.5x3.2
Si511XOSingle65x7, 3.2x5,
OENC--CLK+CLK-
2.5x3.2
Si512XODual
(CMOS)
Si512XODual (Diff)65x7, 3.2x5,
65x7, 3.2x5,
2.5x3.2
FSOE--CLKNC
FSOE--CLK+CLK-
2.5x3.2
Si513XODual
(CMOS)
Si513XODual (Diff)65x7, 3.2x5,
65x7, 3.2x5,
2.5x3.2
OEFS--CLKNC
OEFS--CLK+CLK-
2.5x3.2
Si530XOSingle (Diff) 65x7NCOE--CLK+CLK-
Si530XOSingle
65x7OENC--CLKNC
(CMOS)
Si531XOSingle65x7OENC--CLK+CLK-
Si532XODual (Diff)65x7FSOE--CLK+CLK-
Si532XODual
65x7FSOE--CLKNC
(CMOS)
Si533XODual (Diff)65x7OEFS--CLK+CLK-
Si533XODual
65x7OEFS--CLKNC
(CMOS)
Si534XOQuad (Diff)85x7NCOEFS1FS0CLK+CLK-
Si534XOQuad
85x7NCOEFS1FS0CLKNC
(CMOS)
Si535XOSingle65x7NCOE--CLK+CLK-
Si536XOSingle65x7OENC--CLK+CLK-
Si540XOSingle65x7, 3.2x5,
OE/NCNC/OE--CLK+CLK-
2.5x3.2
Si541XODual65x7, 3.2x5,
OE/FSFS/OE--CLK+CLK-
2.5x3.2
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UG298: Si5xxUC-EVB
Supported Devices - Stand-Alone Mode
SiLabs
Device
Type # Freqs# PinsPkg Sizes
(mm x mm)
Si542XOQuad85x7, 3.2x5,
2.5x3.2
Si544XOSingle/Dual/
Quad (or
85x7, 3.2x5,
2.5x3.2
I2C)
Si545XOSingle65x7, 3.2x5,
2.5x3.2
Si546XODual65x7, 3.2x5,
2.5x3.2
Si547XOQuad85x7, 3.2x5,
2.5x3.2
Si549XOSingle/Dual/
Quad (or
85x7, 3.2x5,
2.5x3.2
I2C)
Si560XOSingle65x7, 3.2x5,
2.5x3.2
Si561XODual65x7, 3.2x5,
2.5x3.2
Si562XOQuad85x7, 3.2x5,
2.5x3.2
Pin 1
Control
Pin 2
Control
Pin 7
Control
Pin 8
Control
Pin 4 Output
Pin 5 Output
OE/NCNC/OEFS1FS0CLK+CLK-
OE/NC/FS OE/NC/FS SDA/FS1SCL/FS0CLK+CLK-
OE/NCNC/OE--CLK+CLK-
OE/FSFS/OE--CLK+CLK-
OE/NCNC/OEFS1FS0CLK+CLK-
OE/NC/FS OE/NC/FS SDA/FS1SCL/FS0CLK+CLK-
OE/NCNC/OE--CLK+CLK-
OE/FSFS/OE--CLK+CLK-
OE/NCNC/OEFS1FS0CLK+CLK-
Si564XOSingle/Dual/
Quad (or
85x7, 3.2x5,
2.5x3.2
OE/NC/FS OE/NC/FS SDA/FS1SCL/FS0CLK+CLK-
I2C)
Si590XOSingle (Diff) 65x7, 3.2x5NCOE--CLK+CLK-
Si590XOSingle
65x7, 3.2x5OENC--CLKNC
(CMOS)
Si591XOSingle65x7, 3.2x5OENC--CLK+CLK-
Note:
1. The pin number headings in Table 6.1 apply to 6/8 pin parts only. 4-pin devices like the Single CMOS Si510 have the clock output
on pin 3 instead of pin 4. Please see the Si510/511 Data Sheet for more details on the pinout.
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Table 6.2. Pin Controlled VCXOs
UG298: Si5xxUC-EVB
Supported Devices - Stand-Alone Mode
SiLabs
Device
Si515VCXOSingle
Si515VCXOSingle
Si516VCXODual
Si516VCXODual (Diff) 65x7, 3.2x5,
Type# Freqs# PinsPkg Sizes
(mm x mm)
65x7, 3.2x5,
(CMOS)
2.5x3.2
65x7, 3.2x5,
(Diff)
2.5x3.2
65x7, 3.2x5,
(CMOS)
2.5x3.2
Pin 1
Control
Pin 2
Control
Pin 7
Control
Pin 8
Control
Pin 4 Output
Pin 5 Output
VcOE--CLKNC
VcOE--CLK+CLK-
VcFS--CLKNC
VcFS--CLK+CLK-
2.5x3.2
Si550VCXOSingle65x7VcOE--CLK+CLK-
Si552VCXODual65x7VcFS--CLK+CLK-
Si554VCXOQuad85x7VcOEFS1FS0CLK+CLK-
Si565VCXOSingle65x7, 3.2x5,
VcOE--CLK+CLK-
2.5x3.2
Si566VCXODual65x7, 3.2x5,
VcFS--CLK+CLK-
2.5x3.2
Si567VCXOQuad85x7, 3.2x5,
VcOEFS1FS0CLK+CLK-
2.5x3.2
Si569VCXOSingle/
Dual (or
85x7, 3.2x5,
2.5x3.2
VcOE/FSSDASCLCLK+CLK-
I2C)
Si595VCXOSingle65x7, 3.2x5VcOE--CLK+CLK-
Si596VCXODual65x7, 3.2x5VcFS--CLK+CLK-
Si597VCXOQuad85x7VcOEFS1FS0CLK+CLK-
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If using the Si5XXUC-EVB with a device that utilizes the I2C bus for making frequency or other changes to the device, this “software
controlled mode” section should be used to configure the EVB.
If you have a device installed that is either fixed frequency or has pin-controlled output frequency, refer to Section 6. Supported Devices
- Stand-Alone Mode.
The tables below show I2C XO and I2C VCXO devices supported by the Si5xxUC-EVB along with possible package sizes and control
pin mapping. The control pin mapping can be used to determine the corresponding switch settings on the Si5xxUC-EVB when using
software controlled mode.
Table 7.1. I2C XOs
SiLabs
Device
Si514XOI2C65x7, 3.2x5,
Si544XO
Si549XO
Si564XO
Si570XO
Si598XO
SiLabs
Device
Si569VCXO
Type# Freqs# PinsPkg Sizes
(mm x mm)
2.5x3.2
I2C or (Single/
Dual/Quad)
I2C or (Single/
Dual/Quad)
I2C or (Single/
Dual/Quad)
I2C
I2C
Type# Freqs# PinsPkg Sizes
I2C or (Single/
Dual)
85x7, 3.2x5,
2.5x3.2
85x7, 3.2x5,
2.5x3.2
85x7, 3.2x5,
2.5x3.2
85x7NCOESDASCLCLK+CLK-
85x7NCOESDASCLCLK+CLK-
(mm x mm)
85x7, 3.2x5,
2.5x3.2
Pin 1
Control
SDASCL--CLK+CLK-
OE/NC/FS OE/NC/FS SDA/FS1SCL/FS0CLK+CLK-
OE/NC/FS OE/NC/FS SDA/FS1SCL/FS0CLK+CLK-
OE/NC/FS OE/NC/FS SDA/FS1SCL/FS0CLK+CLK-
Table 7.2. I2C VCXOs
Pin 1
Control
VcOE/FSSDASCLCLK+CLK-
Pin 2
Control
Pin 2
Control
Pin 7
Control
Pin 7
Control
Pin 8
Control
Pin 8
Control
Pin 4 Output
Pin 4 Output
Pin 5 Output
Pin 5 Output
Si571VCXO
Si599VCXO
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I2C
I2C
85x7VcOESDASCLCLK+CLK-
85x7VcOESDASCLCLK+CLK-
UG298: Si5xxUC-EVB
USB Port and External Powering
8. USB Port and External Powering
The USB port on the Si5xxUC-EVB utilizes a micro-USB connector that is located on the left edge of the board on the bottom side. A 2meter micro USB cable is provided with the EVB kit. Any micro USB cable can be used that supports full USB connectivity.
If powering the EVB via the USB port, make sure switch SW5 is in the “USB” position. If properly connected to a live USB port, the
green VBUS_5V should illuminate.
If powering the board via an external +5 V power supply, make sure SW5 is in the “EXT” position. Once +5 V is connected to the board
via the +5V_EXT connections, the green +5V_EXT LED should illuminate.
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UG298: Si5xxUC-EVB
Output Clock Terminations
9. Output Clock Terminations
The drawing in the figure below shows the default output termination circuit for CLK1 output of the Si5xxUC-EVB. This default source
termination is for typical 3.3 V LVPECL. CLK2 and CLK3 are also terminated similarly for 3.3 V LVPECL. If not using LVPECL, this
termination circuit may require component modification. The following table gives examples of recommended output termination components for various output formats when using Si51x, Si53x, Si54x, Si55x, Si56x, Si57x, and Si59x devices, but always refer to the spe-
cific device data sheet and/or appropriate application note for details of required output source termination for the specific
device being evaluated.
Note that LVPECL, LVDS, and CML output formats require a 50 Ω termination of each output at the receiver (or 100 Ω differential).
These termination components must be placed as close to the receiver as possible and are therefore not included on the Si5xxUC-EVB
layout.
Figure 9.1. CLK1 Output Default Terminations
Table 9.1. Example Output Clock Source Terminations (Si51x, Si53x, Si54x, Si55x, Si56x, Si57x, and Si59x only)
Output FormatSeries Resistor Position (e.g.,
R4, R6)
LVPECL 3.3 V: AC coupled0 Ω130 Ω0.1μF
LVPECL 2.5 V: AC coupled0 Ω90 Ω0.1μF
LVPECL: DC coupled0 ΩRemovereplace w/ 0 Ω
LVDS : AC coupled0 ΩRemove0.1μF
LVDS : DC coupled0 ΩRemovereplace w/ 0 Ω
HCSL0 ΩRemovereplace w/ 0 Ω
CML0 ΩRemove0.1μF
LVCMOS : AC coupled0 ΩRemove0.1μF
LVCMOS : DC coupled0 ΩRemovereplace w/ 10 Ω
Parallel Resistor Position
(e.g., R5, R7)
Series Capacitor Position
(e.g., C3, C5)
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UG298: Si5xxUC-EVB
EVB Test Points and LEDs
10. EVB Test Points and LEDs
10.1 Test Points
The Si5xxUC-EVB has many test points that are useful for probing various nodes and/or making connections to external test equipment. Please refer to the schematic for the functionality of the various test points.
One set of test points in particular provides oscillator current sense capability and is shown in the drawing below. These two test points
allow an external voltage measurement to be taken across the two test points to determine the current being used by the oscillator.
Since the resistor value is 1 Ω, the voltage measured across these 2 test points corresponds to the current through the resistor. For
example, if the measured voltage is 75 mV, the current flow is 75 mA. Each oscillator site has this current sense circuit.
Figure 10.1. Current Sense Test Points
10.2 LEDs
The Si5xxUC-EVB has 5 status LEDs as shown in table below. The board silkscreen identifies each LED.
Table 10.1. Status LEDs
LED nameColorLocationDescription
+5V_EXTGreenD1
VBUS_5VGreenD5USB +5 V is present (independent of +5V_SELECT (SW5) switch setting)
VDD_3.3GreenD4On-board MCU 3.3 V is present
USB_ACTRedD3USB port activity
AuxRedD2TBD (spare)
External +5 V source is present (independent of +5V_SELECT (SW5)
switch setting)
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UG298: Si5xxUC-EVB
VCXO Voltage Control Input Circuit
11. VCXO Voltage Control Input Circuit
The drawing below shows the VCXO control voltage input (VC_IN) circuit used for evaluation of VCXOs. The VCXO control voltage can
be applied using the J1 SMA connector, or using TP3/TP6. A simple RC circuit is included to low-pass filter any noise on the input. The
RC circuit components can be removed or modified as required for your application.
Figure 11.1. VCXO Control Voltage Input "VC_IN"
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UG298: Si5xxUC-EVB
Programmable Oscillator Calculator Tool
12. Programmable Oscillator Calculator Tool
The Programmable Oscillator Software Tool can be used with the Si5xxUC-EVB. This tool and corresponding Programmable Oscillator
Software Tool User's Guide can be found on the Oscillator Software Tools page.
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13. Layout of Board
UG298: Si5xxUC-EVB
Layout of Board
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UG298: Si5xxUC-EVB
Layout of Board
13.1 Si56x XO and VCXO 2.5x3.2mm Footprint Recommendation
For optimal thermal relief, use two ground vias next to the GND pin of the oscillator. Each via should have a 50mm diameter with a
25mm drill. These vias should be directly connected to the board's internal ground layers without the use of thermal relief spokes. This
two via design has been implemented in all Si5xxUC-EVBs REV 4.0 or greater.
Figure 13.1. Si56x 2.5x3.2mm Footprint
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14. Si5xxUC-EVB Schematic
UG298: Si5xxUC-EVB
Si5xxUC-EVB Schematic
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UG298: Si5xxUC-EVB
Si5xxUC-EVB Schematic
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Disclaimer
Silicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or
intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical"
parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only . Silicon Labs reserves the right to make changes without
further notice to the product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Without prior
notification, Silicon Labs may update product firmware during the manufacturing process for security or reliability reasons. Such changes will not alter the specifications or the performance
of the product. Silicon Labs shall have no liability for the consequences of use of the information supplied in this document. This document does not imply or expressly grant any license
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unauthorized applications.
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