Silicon Labs Si5396J User Manual
UG336: Si5396J Evaluation Board User's
Guide
The Si5396J-A-EVB is used for evaluating the Si5396 Any-Frequency, AnyOuput, Jitter-Attenuating Clock Multiplier. There is only one EVB for the 44pin 4 output Si5396, which is an embedded reference device J-grade. There
is no EVB for the external reference A grade version for the Si5396-EVB.
The device grade and revision is distinguished by a white 1 inch x 0.187
inch label with the text “Si5396J-A-EB” installed in the lower left hand corner
of the board. (For ordering purposes only, the terms “EB” and “EVB” refer to
the board and the kit respectively. For the purpose of this document, the
terms are synonymous in context.)
KEY FEATURES OR KEY POINTS
• Si5396J-A-EVB for evaluating internal reference versions
Si5396J/K
•
Powered from USB port or external power supply.
•
ClockBuilder® Pro (CBPro) GUI programmable VDD
supply allows device to operate from 3.3, 2.5, or 1.8 V.
• CBPro GUI allows control and measurement of voltage,
current, and power of VDD and all 4 VDDO supplies.
• Status LEDs for power supplies and control/status
signals of Si5396J.
• SMA connectors for input clocks and output clocks
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Table of Contents
Si5396J-A-EVB Functional Block Diagram ....................3
1.
2. Si5396J-A-EVB Support Documentation and ClockBuilder Pro Software .........4
3. Quick Start ................................5
4. Jumper Defaults ..............................6
5. Status LEDs................................7
6. Clock Input Circuits (INx/INxB) .........................8
7. Clock Output Circuits (OUTx/OUTxB) ......................9
8. External Reference Clock (XA/XB) Not Supported ................10
9. Installing ClockBuilder Pro Desktop Software ..................11
10. Using the Si5396J-A-EVB .........................12
10.1 Connecting the EVB to Your Host PC ......................12
10.2 Overview of ClockBuilder Pro Applications ....................13
10.3 Common ClockBuilder Pro Work Flow Scenarios ..................14
10.4 Workflow Scenario #1: Testing a Silicon Labs-Created Default Configuration ........15
10.4.1 Verify Free-Run Mode Operation ......................18
10.4.2 Verify Locked Mode Operation .......................20
10.5 Workflow Scenario #2: Modifying the Default Silicon Labs-Created Device
Configuration ..............................21
10.6 Workflow Scenario #3: Testing a User-Created Device Configuration ...........23
10.7 Exporting the Register Map File for Device Programming by a Host Processor ........26
11. Writing a New Frequency Plan or Device Configuration to Non-Volatile Memory (OTP) ..28
12. Serial Device Communications .......................29
12.1 Onboard SPI Support ...........................29
12.2 External I2C Support ...........................29
13. Si5396J-A-EVB Schematic and Bill of Materials (BOM) ..............30
14. Revision History............................. 31
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UG336: Si5396J Evaluation Board User's Guide
Si5396J-A-EVB Functional Block Diagram
1. Si5396J-A-EVB Functional Block Diagram
Below is a functional block diagram of the Si5396J-A-EVB. This evaluation board can be connected to a PC via the main USB connector for programming, control, and monitoring. See section 3. Quick Startor section 9. Installing ClockBuilder Pro Desktop Softwarefor
more information.
Main USB
Connector
USB Aux +5V
Connector
C8051F380
MCU
+
Peripherals
Power only
SPI
Conn
+5V_USB
+5V_Ext
VDDMCU
I2C
I2C/SPI Bus
Control/
Status
INTR
Alarm_Status
Power Supply
VDD_Core
VDD_Core
VDDO_0
VDD_3.3
VDDO_0
VDD_3.3
VDDO_1
VDDO_1
Si5396J
CLKOUT_0
CLKOUT_0B
CLKOUT_1
CLKOUT_1B
CLKOUT_2
CLKOUT_2B
CLKOUT_3
CLKOUT_3B
Output
Termination
Output
Termination
Output
Termination
Output
Termination
Output Clock 0
}
Output Clock 1
}
Output Clock 2
}
Output Clock 3
}
Input Clock 0
Input Clock 1
Input Clock 2
Input Clock 3
{
{
{
{
Input
Termination
Input
Termination
Input
Termination
Input
Termination
Figure 1.1. Si5396J-A-EVB Functional Block Diagram
CLKIN_0
CLKIN_0B
CLKIN_1
CLKIN_1B
CLKIN_2
CLKIN_2B
CLKIN_3
CLKIN_3B
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UG336: Si5396J Evaluation Board User's Guide
Si5396J-A-EVB Support Documentation and ClockBuilder Pro Software
2. Si5396J-A-EVB Support Documentation and ClockBuilder Pro Software
All Si5396J-A-EVB schematics, BOMs, User’s Guides, and software can be found online:
www.silabs.com/documents/public/schematic-files/si539x-design-files.zip
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UG336: Si5396J Evaluation Board User's Guide
3. Quick Start
1. Install ClockBuilder Pro desktop software from https://www.silabs.com/products/development-tools/software/clock.
2. Connect a USB cable from Si5396J-A-EB to the PC where the software was installed.
3. Confirm jumpers are installed as shown in Table 4.1 Si5396J-A-EVB Jumper Defaults on page 6.
4. Launch the ClockBuilder Pro Software.
5. You can use ClockBuilder Pro to create, download, and run a frequency plan on the Si5396-A-EB.
6. Find the Si5396J data sheet: https://www.silabs.com/documents/public/data-sheets/si5397-96-a-datasheet.pdf
Quick Start
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4. Jumper Defaults
UG336: Si5396J Evaluation Board User's Guide
Jumper Defaults
Table 4.1. Si5396J-A-EVB Jumper Defaults
Location Type I = Installed
0 = Open
JP1 2 pin I
JP2 2 pin I
JP3 2 pin O
JP4 2 pin I
JP5 3 pin 1 to 2 (USB)
Note: Refer to the Si5396J-A-EVB schematics for the functionality associated with each jumper.
Location Type I = Installed
J17 5 x 2 Hdr All 5 installed
0 = Open
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UG336: Si5396J Evaluation Board User's Guide
Status LEDs
5. Status LEDs
Table 5.1. Si5396J-A- EVB Status LEDs
Location Silkscreen Color Status Function Indication
D5 LOS_XAXBB Blue XA/XB Loss of Signal indicator
D6 INTRB Blue MCU INTR (Interrupt) active
D7 LOL_BB Blue DSPLL A Loss of Lock indicator
D8 LOL_AB Blue DSPLL B Loss of Lock indicator
D11 +5V MAIN Green Main USB +5V present
D12 READY Green MCU Ready
D13 BUSY Green MCU Busy
D5, D6, D7, and D8 are status LEDs indicating the device alarms currently asserted. D11 is illuminated when USB +5 V supply voltage
is present. D12 and D13 are status LEDs showing on-board MCU activity.
Figure 5.1. Status LEDs
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UG336: Si5396J Evaluation Board User's Guide
Clock Input Circuits (INx/INxB)
6. Clock Input Circuits (INx/INxB)
The Si5396J-A-EVB has eight SMA connectors (IN0/IN0B–IN3/IN3B) for receiving external clock signals. All input clocks are terminated
as shown in Figure 6.1 Input Clock Termination Circuit on page 8 below. Note input clocks are ac-coupled and 50 Ω terminated. This
represents four differential input clock pairs. Single-ended clocks can be used by appropriately driving one side of the differential pair
with a single-ended clock. For details on how to configure inputs as single-ended, please refer to the Si5396 data sheet. Typically a
0.1 μF dc block is sufficient, however, 10 μF may be needed for lower input frequencies. Note that the EVB is populated with both dc
block capacitor values.
Figure 6.1. Input Clock Termination Circuit
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UG336: Si5396J Evaluation Board User's Guide
Clock Output Circuits (OUTx/OUTxB)
7. Clock Output Circuits (OUTx/OUTxB)
Each of the eight output drivers (four differential pairs) is ac-coupled to its respective SMA connector. The output clock termination circuit is shown in Figure 7.1 Output Clock Termination Circuit on page 9 below. The output signal will have no dc bias. If dc coupling is
required, the ac coupling capacitors can be replaced with a resistor of appropriate value. The Si5396J-A-EVB provides an L-network at
OUT0/OUT0B output pins for optional output termination resistors. Note that components with schematic “NI” designation are not normally populated.
Figure 7.1. Output Clock Termination Circuit
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UG336: Si5396J Evaluation Board User's Guide
External Reference Clock (XA/XB) Not Supported
8. External Reference Clock (XA/XB) Not Supported
The Si5396J-A-EVB does not support an external reference clock on XA/XB. The layout for the external XTAL is on the board, but the
EVB for this part is an embedded XTAL version only and therefore this circuit should remain disconnected and unused.
Figure 8.1. External Reference Clock Termination Circuit
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