Silicon Labs EFR32 User Manual
AN0004.2: EFR32 Series 2 Wireless MCU
Clock Management Unit (CMU)
This application note provides an overview of the CMU module for EFR32 Wireless
Gecko Series 2 devices with explanations on how to choose clock sources, prescaling,
and clock calibration.
contains information about how to handle oscillators on wake up, external clock
It also
sources, and RC oscillator calibration.
KEY POINTS
• The CMU has several internal clock
sources available.
• The CMU can also use external high
frequency and low frequency clock
sources. Selecting the right clock source is
key for creating low energy applications.
•
This application note includes:
• This PDF document
• Source files
• Example C-code
• Multiple IDE projects
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AN0004.2: EFR32 Series 2 Wireless MCU Clock Management Unit (CMU)
1. Device Compatibility
This application note supports multiple device families, and some functionality is different depending on the device.
EFR32 Wireless Gecko Series 2 consists of the following:
•
EFR32BG21
• EFR32MG21
• EFR32BG22
• EFR32MG22
Device Compatibility
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AN0004.2: EFR32 Series 2 Wireless MCU Clock Management Unit (CMU)
Functional Description
2. Functional Description
The Clock Management Unit (CMU) controls the oscillators and clocks. It can select the sources for any of the clock branches, additionally some clock branches can be prescaled. The CMU can also enable, disable, or configure the available oscillators.
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2.1 Clock Branches
AN0004.2: EFR32 Series 2 Wireless MCU Clock Management Unit (CMU)
Functional Description
The CMU
main and sub clock branches are described in the tables below. Some peripherals have dedicated pre-scalers, such as the
LETIMER and TIMERs. A detailed clock tree diagram can be found in the CMU chapter at the beginning of the Functional Description
section of a given device's reference manual.
Table 2.1. Wireless Gecko EFR32xG21 Clock Branches
Main Clock
Branch
1
Clock Source
SYSCLK • HFRCODPLL
•
HFXO
•
FSRCO
• CLKIN0
2
Sub-clock Branch
1
1
• HCLK
•
EXPCLK
Sub-clock Branch
1
2
• PCLK
• CORTEX(CORE)
• GPCRC
Sub-clock Branch
1
3
• LSPCLK
•
I2C1
• USARTn
Sub-clock Branch
1
4
• I2C0
• GPIO
• LDMA
• LE
• PRS
HCLKRADIO • HFXO
EM01GRPACLK • FSCRO
• HFRCODPLL
•
CLKIN
EM23GRPACLK • LFRCO
• LFXO
•
ULFRCO
EM4GRPACLK • LFRCO
• LFXO
•
ULFRCO
IADCCLK • EM01GRPACLK
• HFRCOEM23
•
FSCRO
TRACECLK • HFRCOEM23
• PCLK
•
HCLK
WDOGCLK • LFRCO
• LFXO
•
ULFRCO
• HCLKDIV1024
F
(DPLL) • HFXO
ref
•
CLKIN0
LFXO
•
Note:
1. Not all main and sub clock branches are available on a given device. Refer to the device reference manual and data sheet for
details.
2.
Not all clock sources for main clock branches are available on a given device. Refer to the device reference manual and data
sheet for details.
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AN0004.2: EFR32 Series 2 Wireless MCU Clock Management Unit (CMU)
Table 2.2. Wireless Gecko EFR32xG22 Clock Branches
Functional Description
Main Clock
Branch
1
Clock Source
2
SYSCLK • HFRCODPLL
•
HFXO
•
FSRCO
• CLKIN0
RHCLK • SYSCLK
EM01GRPACLK • FSCRO
• HFRCODPLL
•
CLKIN
EM23GRPACLK • LFRCO
• LFXO
•
ULFRCO
EM4GRPACLK • LFRCO
• LFXO
•
ULFRCO
Sub-clock Branch
1
2
• HCLK
•
EXPCLK
Sub-clock Branch
1
3
• PCLK
• CORTEX(CORE)
• GPCRC
• GPIO
• LDMA
• LE
• PRS
Sub-clock Branch
1
4
• LSPCLK
•
I2C1
• USARTn
Sub-clock Branch
1
5
• I2C0
IADCCLK • EM01GRPACLK
• FSCRO
TRACECLK •
SYSCLK
WDOGCLK • LFRCO
LFXO
•
•
ULFRCO
• HCLKDIV1024
RTCCCLK • LFXO
•
LFRCO
ULFRCO
•
PRORTCCLK • LFXO
• LFRCO
•
ULFRCO
DPLLREFCLK • HFXO
• CLKIN0
•
LFXO
Note:
1. Not all main and sub clock branches are available on a given device. Refer to the device reference manual and data sheet for
details.
2.
Not all clock sources for main clock branches are available on a given device. Refer to the device reference manual and data
sheet for details.
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2.2 Clock Sources
AN0004.2: EFR32 Series 2 Wireless MCU Clock Management Unit (CMU)
Functional Description
There are
a maximum of seven oscillators that can be used as clock sources for different purposes. The SYSCLK is usually clocked by
the HFXO, FSRCO or HFRCO, whereas low energy peripherals are usually clocked by the LFXO, LFRCO, or ULFRCO. The
HFRCOEM231 is typically used for the low energy peripherals such as LETIMER.
Table 2.3. Clock Sources
Oscillator Frequency Range
HFXO 38–40 MHz
HFRCODPLL 1–80 MHz
HFRCOEM23
1
1–38 MHz
FSRCO 20 MHz
LFXO 32768 Hz
LFRCO 32768 Hz
ULFRCO 1000 Hz
Note:
1. HFRCOEM23 not available on Wireless Gecko EFR32xG22 devices
select the clock source for a branch (e.g., SYSCLK, EM23GRPACLK), the chosen oscillator must be enabled before it is selected as
To
the clock source. If not done, the modules running from that clock branch will stop. In the case of selecting a disabled oscillator for the
SYSCLK branch, the CPU will stop and can only be recovered after a reset.
After a reset, the SYSCLK branch is clocked by the FSRCO at 20 MHz and all low frequency branches are disabled.
Emlib has functions to enable or disable an oscillator and select it as a clock source.
Table 2.4. emlib Functions for Oscillator Enable, Disable, and Selection
emlib Function Usage Example
CMU_HFXOInit(const CMU_HFXOInit_TypeDef
*hfxoInit)
CMU_LFXOInit(const CMU_LFXOInit_TypeDef
*lfxoInit)
CMU_ClockSelectSet(CMU_Clock_ TypeDef clock,
CMU_Select_TypeDef ref)
• Initializes HFXO Initialize HFXO with parameters specified
by hfxoInit struct
CMU_HFXOInit(&hfxoInit)
• Initializes LFXO Initialize LFXO with parameters specified
by lfxoInit struct
CMU_LFXOInit(&lfxoInit)
• Enables the chosen clock
source in case it has not
been enabled yet.
•
The clock parameter is one of
the main clock branches, and
the ref parameter is one of
the clock sources for the se-
Select HFXO as the source of HFCLK:
CMU_ClockSelectSet (cmuClock_HF,
cmuSelect_HFXO);
Select LFXO as the source of LFACLK:
CMU_ClockSelectSet(cmuClock_LFA,
cmuSelect_LFXO);
lected clock branch.
2.2.1 Clock Input from a Pin
possible to configure the CMU to use an external clock input on the CLKIN0 pin. This clock can be selected as the SYSCLK and as
It is
the DPLL reference using the CMU_SYSCLKCTRL and CMU_DPLLEFCLKCTRL registers, respectively. The input port and pin must
be selected in the GPIO_CMU_CLKIN0ROUTE register by setting the PORT and PIN bits appropriately.
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