AN0002.1: EFM32 and EFR32 Wireless
Gecko Series 1 Hardware Design
Considerations
This application note details hardware design considerations for
EFM32
and EFR32 Wireless Gecko Series 1 devices. For hardware design considerations for EFM32 and EZR32 Wireless
MCU Series 0 devices, refer to application note AN0002.0:
EFM32 and EZR32 Wireless MCU Series 0 Hardware Design
Considerations.
Topics specifically covered are supported power supply configurations, supply filtering
considerations, debug interface connections, and external clock sources.
For more information on hardware design and layout considerations for the DC-DC
converter on EFM32 and EFR32 Wireless Gecko Series 1 devices, see application
note AN0948: EFM32 and EFR32 Series 1 Power Configurations and DC-DC.
For more information on hardware layout considerations for the radio portion of EFR32
Wireless Gecko Series 1 devices, see application notes AN930.1: EFR32 Series 1 2.4
GHz Matching Guide, AN933.1: EFR32 Series 1 Minimal BOM, and AN928.1: EFR32
Series 1 Layout Design Guide.
KEY POINTS
• Decoupling capacitors are crucial to
ensuring the integrity of the device's power
supplies.
•
The debug interface consists of two
communication pins (SWCLK and
SWDIO).
• External clock sources must be connected
to the device correctly for proper
operation.
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AN0002.1: EFM32 and EFR32 Wireless Gecko Series 1 Hardware Design Considerations
1. Device Compatibility
This application note supports multiple device families, and some functionality is different depending on the device.
Device Compatibility
EFM32 Series 1
• EFM32 Jade Gecko (EFM32JG1/EFM32JG12)
• EFM32 Pearl Gecko (EFM32PG1/EFM32PG12)
• EFM32 Giant Gecko (EFM32GG11/EFM32GG12)
• EFM32 Tiny Gecko (EFM32TG11)
EFR32 Wireless Gecko Series 1 consists of:
• EFR32 Blue Gecko (EFR32BG1/EFR32BG12/EFR32BG13/EFR32BG14)
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AN0002.1: EFM32 and EFR32 Wireless Gecko Series 1 Hardware Design Considerations
Power Supply Overview
2. Power Supply Overview
2.1 Introduction
Although the EFM32 and EFR32 Wireless Gecko Series 1 devices have very low average current consumption, proper decoupling is
crucial. As for all digital circuits, current is drawn in short pulses corresponding to the clock edges. Particularly when several I/O lines
are switching simultaneously, transient current pulses on the power supply can be in the order of several hundred mA for a few nanoseconds, even though the average current consumption is quite small.
These kinds of transient currents cannot be properly delivered over high impedance power supply lines without introducing considerable noise in the supply voltage. To reduce this noise, decoupling capacitors are employed to supplement the current during these short
transients.
2.2 Decoupling Capacitors
Decoupling capacitors make the current loop between supply, MCU, and ground as short as possible for high frequency transients.
Therefore, all decoupling capacitors should be placed as close as possible to each of their respective power supply pins, ground pins,
and PCB (Printed Circuit Board) ground planes.
All external decoupling capacitors should have a temperature range reflecting the environment in which the application will be used. For
example, a suitable choice might be X5R ceramic capacitors with a change in capacitance of ±15% over the temperature range -55 to
+85 °C (standard temperature range devices) or -55 to +125 °C (extended temperature range devices).
For regulator output capacitors (DECOUPLE, VREGSW, and VREGO, if available), the system designer should pay particular attention
to the characteristics of the capacitor over temperature and bias voltage. Some capacitors (particularly those in smaller packages or
using cheaper dielectrics) can experience a dramatic reduction in capacitance value across temperature or as the DC bias voltage increases. Any change pushing the regulator output capacitance outside the data sheet specified limits may result in output instability on
that supply.
2.3 Power Supply Requirements
An important consideration for all devices is the voltage requirements and dependencies between the power supply pins. The system
designer needs to ensure that these power supply requirements are met, regardless of power configuration or topology. Please see the
device data sheet for absolute maximum rating and additional details regarding relative system voltage constraints.
EFM32 Series 1 Power Supply Requirements
• VREGVDD = AVDD (Must be the highest voltage in the system)
• VREGVDD ≥ DVDD
• VREGVDD ≥ IOVDD
• DVDD ≥ DECOUPLE
EFR32 Wireless Gecko Series 1 Power Supply Requirements
• VREGVDD = AVDD (Must be the highest voltage in the system)
• VREGVDD ≥ DVDD
• VREGVDD ≥ PAVDD (For 2.4 GHz or dual-band devices, PAVDD refers to the device pin; for sub-GHz devices, PAVDD refers to
the external power amplifier supply)
• VREGVDD ≥ RFVDD
• VREGVDD ≥ IOVDD
• DVDD ≥ DECOUPLE
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AN0002.1: EFM32 and EFR32 Wireless Gecko Series 1 Hardware Design Considerations
Power Supply Overview
Power Supply Pin Overview
Note that not all supply pins exist on all devices. The table below provides an overview of the available power supply pins.
Table 2.1. Power Supply Pin Overview
Pin NameProduct FamilyDescription
AVDDAll devicesSupply to analog peripherals
DECOUPLEAll devicesOutput of the internal digital LDO
IOVDDAll devicesGPIO supply voltage
VBUSAll USB-enabled devicesPrimary input to the internal 3.3 V LDO, and the USB 5 V sense
input. Can be connected to the USB 5 V supply. If unused, may
be left floating (a weak internal pull-down will ensure the pin remains at ground).
VREGIAll USB-enabled devicesSecondary input to the internal 3.3 V LDO. Typically connected
to the USB 5 V supply. If usused, may be left floating (a weak
internal pull-down will ensure the pin remains at ground).
VREGOAll USB-enabled devicesOutput of the internal 3.3 V LDO
VREGVDDAll devicesInput to the DC-DC converter
VREGSWAll devicesDC-DC powertrain switching node
VREGVSSAll devicesDC-DC ground
DVDDAll devicesDC-DC feedback node and input to the internal digital LDO
RFVDDEFR32 Wireless Gecko Series 1 only Supply to radio analog and HFXO
PAVDDEFR32 Wireless Gecko Series 1 only Supply to 2.4 GHz radio power amplifier
2.4 DECOUPLE
All
EFM32 and EFR32 Wireless Gecko Series 1 devices include an internal linear regulator that powers the core and digital logic. The
DECOUPLE pin is the the output of the digital LDO, and requires a 1 µF capacitor.
EFM32xG1 and EFR32xG1 DECOUPLE Pin
On EFM32xG1 and EFR32xG1 devices, the input supply to the digital LDO is the DVDD pin, and the DECOUPLE pin is the output of
the LDO.
V
Main
Supply
DD
+
–
C
DVDD1
0.1 µF
DVDD
Digital
LDO
DECOUPLE
C
DE
C
1 µF
Digital
Logic
Figure 2.1. DVDD and DECOUPLE on EFM32xG1 and EFR32xG1 devices
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EFM32xG11/12 and EFR32xG12/13/14 DECOUPLE Pin
AN0002.1: EFM32 and EFR32 Wireless Gecko Series 1 Hardware Design Considerations
Power Supply Overview
On EFM32xG11/12
DVDD pin. The DECOUPLE pin the output of the LDO. Note that while supplied from the AVDD pin, the digital LDO current is limited to
20 mA. After start up, firmware should configure EMU_PWRCTRL_REGPWRSEL to power the digital LDO from DVDD.
2.5 IOVDD
IOVDD pin(s) provide decoupling for all of the GPIO pins on the device. A 0.1 µF capacitor per IOVDD pin is recommend, along
The
with a 10 µF bulk capacitor. The bulk capacitor value may safely be reduced if there are other large bulk capacitors on the same supply
(e.g., if IOVDD = AVDD = system main supply, and the main supply already has multiple 10 µF).
and EFR32xG12/13/14 devices, the input supply to the digital LDO is either the AVDD pin (power on default) or the
AVDD
V
DD
Main
Supply
Figure 2.2. DVDD and DECOUPLE on EFM32xG11/12 and EFR32xG12/13/14 devices
+
–
C
0.1 µF
DVDD1
C
DE
1 µF
DVDD
DVDD
REGPWRSEL
DECOUPLE
C
01
Digital
LDO
Digital
Logic
V
Main
Supply
DD
+
–
C
VDD_n
IO
0.1 µF
IOVDD_n
. . .
IOVDD_0
C
IOVDD
10 µF
Figure 2.3. IOVDD Decoupling
Note: IOVDD
DC converter defaults to an unconfigured safe state with its output floating such that connected circuits remain unpowered until firmware performs the necessary configuration. Fresh from the factory, a blank device will run the bootloader and fail in its attempt to communicate with a host via the BOOT_RX and BOOT_TX pins without IOVDD power. Use of the debug interface (DBG_SWCLKTCK and
DBG_SWDIOTMS) for initial firmware download would, in this case, be similarly fruitless.
should not be supplied from the DC-DC converter on EFM32xG11/12 and EFR32xG12/13/14 devices. At reset, the DC-
C
VDD_0
IO
0.1 µF
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AN0002.1: EFM32 and EFR32 Wireless Gecko Series 1 Hardware Design Considerations
Power Supply Overview
2.6 AVDD
analog peripheral performance of the device is impacted by the quality of the AVDD power supply. For applications with less de-
The
manding analog performance, a simpler decoupling scheme for AVDD may be acceptable. For applications requiring the highest quality
analog performance, more robust decoupling and filtering is required.
Note that the number of AVDD analog power pins may vary by device and package.
2.6.1 AVDD Standard Decoupling
The figure below illustrates a standard approach for decoupling the AVDD pin(s). In general, one 10 µF bulk capacitor (C
as one 10 nF capacitor for each AVDD pin (C
Main
Supply
AVDD_0
through C
V
DD
+
–
), must be provided.
AVDD_n
C
10 nF
VDD_n
A
AVDD_n
. . .
AVDD
AVDD_0
C
VDD
A
10 µF
Figure 2.4. AVDD Standard Decoupling
2.6.2 AVDD Improved Decoupling
figure below illustrates an improved approach for decoupling and filtering the AVDD pin(s). In general, one 10 µF bulk capacitor
The
(C
), as well as one 10 nF capacitor for each AVDD pin (C
AVDD
and series 1 Ω resistor provide additional power supply filtering and isolation.
AVDD_0
C
VDD_0
A
10 nF
through C
), must be provided. In addition, a ferrite bead
AVDD_n
), as well
Main
Supply
V
DD
+
–
FB
VDD
R
AVDD
1 Ω
C
A
VDD_n
10 nF
AVDD_n
. . .
AVDD_0
C
VDD
A
10 µF
Figure 2.5. AVDD Improved Decoupling
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C
VDD_0
A
10 nF
AN0002.1: EFM32 and EFR32 Wireless Gecko Series 1 Hardware Design Considerations
The table below lists some recommended ferrite bead part numbers suitable for AVDD filtering.
Table 2.2. Recommended Ferrite Beads
Power Supply Overview
ManufacturerPart NumberImpedanceI
(mA)DCR (Ω)Operating Tem-
MAX
Package
perature (°C)
Würth Electronics 742792661 kΩ @ 100 MHz2000.600-55 to +1250603/1608
MurataBLM21BD102SN1D1 kΩ @ 100 MHz2000.400-55 to +1250805/2012
2.7 USB (VREGI & VREGO)
Some
EFM32 and EFR32 Wireless Gecko Series 1 devices integrate a USB controller and a 3.3 V LDO. Power supply decoupling, as
well as signalling and control signals, are discussed in Section 6. USB.
2.8 DC-DC
Some EFM32 and EFR32 Wireless Gecko Series 1 devices provide an on-chip DC-DC converter that can be used for improved power
efficiency. However, the additional switching noise present on the DC-DC converter output (V
), necessitates the use of specific
DCDC
filtering components.
2.8.1 DC-DC — Unused
When the DC-DC converter is not used, the DVDD pin should be shorted to the VREGVDD pin. VREGSW must be left floating, and
VREGVSS should be grounded.
Bypass
witch
S
OFF
Main
Supply
V
DD
+
–
C
VDD
10 µF
C
VDD1
0.1 µF
VREGVDD
VREGSW
DC-DC
Driver
VREGVSS
DC-DC
DVDD
C
D
VDD
0.1 µF
Figure 2.6. Configuration when the DC-DC converter is unused
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AN0002.1: EFM32 and EFR32 Wireless Gecko Series 1 Hardware Design Considerations
Power Supply Overview
2.8.2 DC-DC — Powering DVDD
the lowest power applications, the DC-DC converter can be used to power the DVDD supply (as well as RFVDD and PAVDD on
For
EFR32 Wireless Gecko Series 1) as shown in the figure below. In this configuration, the DC-DC Output (V
In addition to being the DC-DC converter feedback path, the DVDD pin powers the internal digital LDO, which in turn powers the digital
circuits.
) is connected to DVDD.
DCDC
The system designer should pay particular attention to the characteristics of the DC-DC output capacitor (C
) over temperature and
DCDC
bias voltage. Some capacitors, particularly those in smaller packages or using cheaper dielectrics, can experience a dramatic reduction
in nominal capacitance in response to temperature changes or as the DC bias voltage increases. Any change pushing the DC-DC output capacitance outside the data sheet specified limits may result in output instability on that supply.
V
DD
Main
Supply
V
+
–
DCDC
10 µF
C
VDD
L
DCDC
4.7 µH
C
DCDC
4.7 µF
C
VDD1
0.1 µF
VREGVDD
VREGSW
VREGVSS
DC-DC
Driver
Bypass
witch
S
OFF
DC-DC
DVDD
C
DVDD
0.1 µF
Figure 2.7. DC-DC Converter Powering DVDD
Note: C
mended for new designs due to its improved performance under dynamic load conditions and during mode changes. Silicon Labs
EFR32xG1 reference radio boards still use 1.0 µF; therefore, the EFR32xG1 software defaults to using 1.0 µF (use of emuDcdcLnCompCtrl_1u0F rather than emuDcdcLnCompCtrl_4u7F). Use of 4.7 µF on EFR32xG1 requires modification of the Low Noise Mode
Compensator Control emuDcdcLnCompCtrl value. For EFR32xG12 and later, both the radio reference board hardware and the software default to 4.7 µF.
DCDC
was
1.0 µF in some previous revisions of this application note. Although 1.0 µF may still be used, 4.7 µF is now recom-
2.9 Radio (RFVDD & PAVDD) — EFR32 Wireless Gecko Series 1
On EFR32 Wireless Gecko Series 1 devices, the radio power supplies (PAVDD and RFVDD) are typically powered from one of two
sources:
1. The integrated DC-DC converter. This option provides improved power efficiency but is limited to 13 dBm maximum transmit power. Additional switching noise present on the DC-DC converter output (V
), necessitates the use of specific filtering compo-
DCDC
nents.
2. The main supply. This option is less efficient but permits simpler filtering and supports systems that require transmit power in excess of 13 dBm.
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2.9.1 RFVDD and PAVDD — Powered from DC-DC
AN0002.1: EFM32 and EFR32 Wireless Gecko Series 1 Hardware Design Considerations
Power Supply Overview
RFVDD and PAVDD can be supplied from the DC-DC converter output (V
Both
when V
supplies PAVDD the maximum transmit power is limited to 13 dBm. If higher power is required, PAVDD must be powered
DCDC
) for lowest power operation. Note, however, that
DCDC
from the main supply instead of the DC-DC output.
V
DCDC
L
AVDD
P
22 nH
C
RFVDD
220 nF
C
P
AVDD
C
10 pF
C
RFVDD
P
AVDD1
RFVDD
1
PAVDD
RF
Analog
RF
Power
Amplifier
220 nF10 pF
Figure 2.8. RFVDD and PAVDD Decoupling (2.4 GHz application, both supplies powered from DC-DC output)
The minimal BOM option eliminates C
more complete details on the minimal BOM option, along with performance comparisons, refer to AN933.1: EFR32 Series 1 Minimal
MurataLQG15HS22NJ02D22 ± 5%3000.420-55 to +1250402/1005
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AN0002.1: EFM32 and EFR32 Wireless Gecko Series 1 Hardware Design Considerations
Power Supply Overview
2.9.2 RFVDD and PAVDD — Powered from Main Supply
greater than 13 dBm transmit power is required, PAVDD should be powered directly from the main supply, and RFVDD may be
When
powered from either the main supply or the DC-DC output (V
shown on the PAVDD input, because the main supply is presumed to be less noisy than V
V
DD
Main
Supply
+
–
C
RFVDD
220 nF
). Note that in this configuration, the L
DCDC
.
DCDC
C
RFVDD
RFVDD
1
RF
Analog
10 pF
filter inductor is not
PAVDD
PAVDD
C
AVDD
P
C
AVDD1
P
RF
Power
Amplifier
220 nF10 pF
Figure 2.9. RFVDD and PAVDD Decoupling (2.4 GHz application, both supplies powered from main supply)
The minimal BOM option eliminates C
more complete details on the minimal BOM option, along with performance comparisons, refer to AN933.1: EFR32 Series 1 Minimal
BOM.
Table 2.5. RFVDD & PAVDD Decoupling Values, Powered from Main Supply
ApplicationC
RFVDD
2.4 GHz220 nF10 pF—220 nF10 pF
2.4 GHz (minimal BOM)220 nF——220 nF—
sub-GHz220 nF56 - 270 pF—220 nF56 - 270 pF
sub-GHz (minimal BOM)220 nF——220 nF—
RFVDD1
and
C
PAVDD1
C
RFVDD1
, which may allow acceptable RF performance at lower power levels. For
L
PAVDD
C
PAVDD
C
PAVDD1
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