WT41u
DATA SHEET
Friday, 03 February 2017
Version 1.0
VERSION HISTORY
Version Comment
0.8 First version
0.8.1 Table reformatting, value updates etc
0.8.2 Replaced “Bluecore4” with “chipset”, added ordering codes
0.8.3 Rest of table reformatting, added antenna & connector dimension drawings
0.8.4 Added current consumption, RF characteristics
0.8.5 Added certification texts
0.8.6 Added current consumption results, edit TX power variation over VDD range.
0.8.7 Slight edits to specifications
0.8.8 OPN descriptions updated
1.0 Full production
Silicon Labs
TABLE OF CONTENTS
1 Ordering Information......................................................................................................................................6
2 Pinout and Terminal Description ...................................................................................................................7
3 Electrical Characteristics ............................................................................................................................ 11
3.1 Absolute Maximum Ratings ................................................................................................................ 11
3.2 Recommended Operating Conditions ................................................................................................. 11
3.3 Input / Output Terminal Characteristics .............................................................................................. 12
3.3.1 Input/Output Terminal Characteristics (Digital) ............................................................................ 12
3.3.2 Input/Output Terminal Characteristics (USB) .............................................................................. 13
3.4 PIO Current Sink and Source Capability ............................................................................................. 13
3.5 Transmitter Performance For BDR ..................................................................................................... 14
3.6 Receiver Performance ........................................................................................................................ 15
3.7 Current Consumption .......................................................................................................................... 15
4 Physical Dimensions .................................................................................................................................. 16
5 Soldering Recommendations ..................................................................................................................... 19
6 Layout Guidelines ....................................................................................................................................... 20
7 UART Interface ........................................................................................................................................... 21
7.1 UART Bypass ...................................................................................................................................... 23
7.2 UART Configuration While Reset is Active ......................................................................................... 23
7.3 UART Bypass Mode ............................................................................................................................ 23
8 USB Interface ............................................................................................................................................. 24
8.1 USB Data Connections ....................................................................................................................... 24
8.2 USB Pull-Up resistor ........................................................................................................................... 24
8.3 USB Power Supply .............................................................................................................................. 24
8.4 Self-Powered Mode ............................................................................................................................. 24
8.5 Bus-Powered Mode ............................................................................................................................. 25
8.6 USB Suspend Current ......................................................................................................................... 26
8.7 USB Detach and Wake-Up Signaling.................................................................................................. 26
8.8 USB Driver .......................................................................................................................................... 27
8.9 USB v2.0 Compliance and Compatibility ............................................................................................ 27
9 Serial Peripheral Interface (SPI) ................................................................................................................. 28
10 PCM Codec Interface ............................................................................................................................. 29
10.1 PCM Interface Master/Slave ........................................................................................................ 29
10.2 Long Frame Sync ......................................................................................................................... 30
10.3 Short Frame Sync ........................................................................................................................ 30
10.4 Multi-slot Operation ...................................................................................................................... 31
10.5 GCI Interface ................................................................................................................................ 31
10.6 Slots and Sample Formats ........................................................................................................... 32
Silicon Labs
10.7
Additional Features ...................................................................................................................... 33
10.8 PCM_CLK and PCM_SYNC Generation ..................................................................................... 33
10.9 PCM Configuration ....................................................................................................................... 34
11 I/O Parallel Ports ..................................................................................................................................... 37
11.1 PIO Defaults ................................................................................................................................. 37
12 Reset ....................................................................................................................................................... 38
12.1 Pin States on Reset ..................................................................................................................... 39
13 Certifications ........................................................................................................................................... 40
13.1 Bluetooth ...................................................................................................................................... 40
13.2 FCC .............................................................................................................................................. 40
13.3 ISEDC .......................................................................................................................................... 41
13.3.1 ISEDC (Français) ......................................................................................................................... 41
13.4 CE ................................................................................................................................................ 42
13.5 MIC Japan .................................................................................................................................... 43
13.6 Qualified Antenna Types for WT41u-E and WT41u-N ................................................................ 44
13.7 Moisture Sensitivity Level (MSL).................................................................................................. 44
Silicon Labs
WT41u Bluetooth® Module
DESCRIPTION
WT41u is a long range class 1, Bluetooth® 2.1 +
EDR module. WT41u is a highly integrated and
sophisticated Bluetooth® module, containing all the
necessary elements from Bluetooth® radio and a
fully implemented protocol stack. Therefore, WT41u
provides an ideal solution for developers who want
to integrate Bluetooth® wireless technology into
their design with limited knowledge of Bluetooth®
and RF technologies. WT41u is optimized for long
range applications is available with an integrated
chip antenna, an RF pin for a custom on-board
antenna or a U.FL connector for an external 2dBi
dipole antenna.
By default, WT41u module is equipped with
powerful and easy-to-use iWRAP firmware. iWRAP
enables users to access Bluetooth® functionality
with simple ASCII commands delivered to the
module over serial interface - it's just like a
Bluetooth® modem.
APPLICATIONS :
• Hand held terminals
• Industrial devices
• Point-of-Sale systems
• PCs
• Personal Digital Assistants (PDAs)
• Computer Accessories
• Access Points
• Automotive Diagnostics Units
FEATURES:
• Fully Qualified Bluetooth v2.1 + EDR end
product
• CE qualified
• Full modular certification for FCC and IC
• MIC Japan compatibility fully tested with ARIB
STD-T66
• TX power: 17 dBm
• RX sensitivity: -94 dBm
• Integrated chip antenna, RF pin or U.FL
antenna connector
• Class 1, range up to 650 meters with chip
antenna or up to 1km with an external dipole
• Industrial temperature range from -40
• RoHS Compliant
• USB interface (USB 2.0 compatible)
• UART with bypass mode
• 6 x GPIO
• 1 x 8-bit AIO
• Integrated iWRAP
o
C
+85
firmware
TM
Bluetooth stack or HCI
o
C to
Silicon Labs
1 Ordering Information
Firmware U.FL Connector Internal chip antenna
iWRAP 5.6 firmware WT41u-E-AI56 WT41u-A-AI56
iWRAP 5.5 firmware WT41u-E-AI55 WT41u-A-AI55
iWRAP 5.0.2 firmware WT41u-E-AI5 WT41u-A-AI5
HCI firmware, BT2.1 + EDR WT41u-E-HCI21 WT41u-A-HCI21
Table 1: Ordering information
Silicon Labs
Page 6 of 44
Pins 1 and 52 (GND)
are not connected
and have been
removed
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
262728
29
51
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
59
5857565554
53
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RFGND
RF
GND
GND
GND
GND
GND
GND
VDD_PA
PIO2
PIO3
UART_RTS
UART_RX
GND
USB+
USBUART_CTS
PCM_IN
PCM_CLK
PCM_SYNC
GND
GND
GND
GND
GND
GND
PCM_OUT
PIO4
GND
VDD
RESET
PIO6
PIO7
GND
SPI_CSB
SPI_CLK
SPI_MISO
SPI_MOSI
PIO5
UART_TX
AIO
50
2 Pinout and Terminal Description
Figure 1: WT41u pin out
Silicon Labs
Page 7 of 44
Pad name Pad
Pad type Description
number
NC 1, 52 Not connected Pins 1 and 52 are not present on the footprint
RESET 33 Digital input Active low reset with weak internal pull-up. Ke ep
low for >5ms to reset module
GND 2-10, 16, 23,
24, 26-28,
30, 31, 36,
Ground Ground pads should all be connected to a ground
plane with minimum trace length, especially on the
antenna end of the module
44-49, 53-
59
RF 51 Not connected No internal connection
RFGND 50 Ground Connect to ground plane
VDD_PA 11 Supply voltage Supply voltage for the RF power amplifier and low
noise amplifier
VDD 32 Supply voltage Supply voltage for the Bluetooth chipset
Table 2: Supply and RF Terminal Descriptions
PIO signal Pad number Description
PIO[2] 12 Bi-directional digital in/out with programmable strength and pull-up/pull-
down
PIO[3] 13 Bi-directional digital in/out with programmable strength and pull-up/pull-
down
PIO[4] 29 Bi-directional digital in/out with programmable strength and pull-up/pull-
down
PIO[5] 41 Bi-directional digital in/out with programmable strength and pull-up/pull-
down
PIO[6] 34 Bi-directional digital in/out with programmable strength and pull-up/pull-
down
PIO[7] 35 Bi-directional digital in/out with programmable strength and pull-up/pull-
down
AIO[1] 43 Bi-directional analog in/out
Table 3: GPIO Terminal Descriptions
Silicon Labs
Page 8 of 44
PCM signal Pad number Pad type Description
PCM_OUT 25 Output, weak internal pull-down Synchronous data output
PCM_IN 20 Input, weak internal pull-down Synchronous data input
PCM_SYNC 22 Bi-directional, weak internal pull-down Synchronous data sync
PCM_CLK 21 Bi-directional, weak internal pull-down Synchronous data clock
Table 4: PCM Terminal Descriptions
UART signal Pad number Pad type Description
UART_TX 42
pull-up
UART data output, active
high
UART_RTS# 14
pull-up
active low
UART_RX 15 Input, weak internal pull-
down
high
UART_CTS# 19 Input, weak internal pull-
down
active low
Table 5: UART Terminal Descriptions
USB signal Pad number Pad type Description
USB+ 17 Bidirectional USB data line with internal 1.5kohm pull-up
USB- 18 Bidirectional USB data line
Table 6: USB Terminal Descriptions
Silicon Labs
Page 9 of 44
SPI signal Pad
Pad type Description
number
SPI_MOSI 40 Input, weak internal pull-down SPI data input
SPI_CS# 37 Input, weak internal pull-up Chip select, active low
SPI_CLK 38 Input, weak internal pull-down SPI clock
SPI_MISO 39 Output, weak internal pull-down SPI data output
Table 7: Terminal Descriptions
Silicon Labs
Page 10 of 44
3 Electrical Characteristics
3.1 Absolute Maximum Ratings
Specification Min Max Unit
Storage temperature -40 85 °C
VDD_PA, VDD -0.4 3.7 V
Other terminal voltages VSS-0.4 VDD+0.4 V
Table 8: Absolute Maximum Ratings
3.2 Recommended Operating Conditions
Specification Min Max Unit
Operating temperature -40 85 °C
VDD_PA, VDD 3.0 3.6 V
Table 9: Recommended Operating Conditions
Silicon Labs
Page 11 of 44
3.3 Input / Output Terminal Characteristics
3.3.1 Input/Output Terminal Characteristics (Digital)
Digital Terminals Min Typ Max Unit
Input Voltage Levels
VIL input logic level low 2.7 V ≤ VDD ≤ 3.0 V -0.4 - 0.8 V
1.7 V ≤ VDD ≤ 1.9 V -0.4 - 0.4 V
VIH input logic level high 0.7 VDD - VDD + 0.4 V
Output Voltage Levels
VOL output logic level low
(IO = 4.0 mA) 2.7V ≤ VDD ≤ 3.0 V
VOL output logic level low
(IO = 4.0 mA) 1.7V ≤ VDD ≤ 1.9
VOL output logic level high
(IO = 4.0 mA) 2.7V ≤ VDD ≤ 3.0
VOL output logic level high
(IO = 4.0 mA) 1.7V ≤ VDD ≤ 1.9
Input and Tristate Current with
Strong pull-up -100 -40 -10 µA
- - 0.2 V
- - 0.4 V
VDD - 0.2 - V
VDD - 0.4 - V
Strong pull-down 10 40 100 µA
Weak pull-up -5.0 -1.0 -0.2 µA
Weak pull-down 0.2 1.0 5.0 µA
I/O pad leakage current -1 0 1 µA
CI input capacitance 1.0 - 5.0 pF
Silicon Labs
Page 12 of 44
3.3.2 Input/Output Terminal Characteristics (USB)
USB Terminals Min Typ Max Unit
VDD_USB for correct USB operation 3.1 3.6 V
Input Threshold
VIL input logic level log - - 0.3VDD_USB V
VIH input logic level high 0.7VDD_USB - - V
3.4 PIO Current Sink and Source Capability
Figure 2: WT41u PIO Current Drive Capability
Silicon Labs
Page 13 of 44
3.5 Transmitter Performance For BDR
RF characteristic Min Typ Max Blue to oth specification Unit
Max transmit power 16 17 18 <20 dBm
Transmit power variation over temperature
range
Transmit power variation over supply voltage
range
Transmit power variation over frequency
range
Transmit power control range -13 17 dBm
20dB bandwidth for modulated carrier 998 <1000 kHz
Avg drift -11 6 ±40 kHz
ΔF1avg 165 140 to 175 kHz
-2 2 dB
-0.5 0.5 dB
-0.5 0.5 dB
Silicon Labs
Page 14 of 44