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BT111
User Manual
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Silicon Laboratories Finland BT111 User Manual

BT111: Bluetooth® Smart Ready HCI Module
DATA SHEET
Monday, 28 January 2013
Version 1.2
Copyright © 2000-2013 Bluegiga Technologies
All rights reserved.
Bluegiga Technologies assumes no responsibility for any errors which may appear in this manual. Furthermore, Bluegiga Technologies reserves the right to alter the hardware, software, and/or specifications detailed here at any time without notice and does not make any commitment to update the information contained here. Bluegiga’s products are not authorized for use as critical components in life support devices or systems.
The WRAP is a registered trademark of Bluegiga Technologies
The Bluetooth trademark is owned by the Bluetooth SIG Inc., USA and is licensed to Bluegiga Technologies.
All other trademarks listed herein are owned by their respective owners.
VERSION HISTORY
Version Comment
1.0 First public release
1.1 Minor changes
1.2 FCC and CE update
TABLE OF CONTENTS
1 BT111 Product numbering ........................................................................................................................... 7
2 Block Diagram .............................................................................................................................................. 8
3 Pinout and Terminal Descriptions ................................................................................................................ 9
4 External Dimensions and Land Pattern ...................................................................................................... 11
5 Layout Guide Lines ..................................................................................................................................... 12
5.1 BT111-A Layout Guide ....................................................................................................................... 12
6 Electrical Characteristics ............................................................................................................................ 14
6.1 Absolute Maximum Ratings ............................................................................................................... 14
6.2 Input/Output Terminal Characteristics ................................................................................................ 14
6.2.1 USB Linear Regulator ................................................................................................................... 14
6.2.2 High-voltage Linear Regulator ...................................................................................................... 15
6.2.3 Digital ............................................................................................................................................ 15
6.3 Current Consumption ......................................................................................................................... 16
7 RF Characteristics ...................................................................................................................................... 19
7.1 Transmitter Characteristics ................................................................................................................ 19
7.2 Receiver Characteristics .................................................................................................................... 20
7.3 Radiated Spurious Emissions ............................................................................................................ 21
7.4 Antenna Characteristics ..................................................................................................................... 21
8 Clock Generation ........................................................................................................................................ 22
9 Bluetooth Stack Microcontroller .................................................................................................................. 23
10 Programmable I/O Ports ......................................................................................................................... 23
11 Wi-Fi Coexistence Interface .................................................................................................................... 23
12 Memory Management ............................................................................................................................. 24
12.1 Memory Management Unit ................................................................................................................. 24
12.2 System RAM ...................................................................................................................................... 24
12.3 Internal ROM Memory (5Mb) ............................................................................................................. 24
12.4 Internal EEPROM ............................................................................................................................... 24
13 Serial Interfaces ...................................................................................................................................... 25
13.1 USB Interface ..................................................................................................................................... 25
13.2 Programming and Debug Interface .................................................................................................... 25
14 Audio Interfaces ...................................................................................................................................... 26
14.1 PCM Interface .................................................................................................................................... 26
14.1.1 PCM Interface Master/Slave ......................................................................................................... 26
14.1.2 Long Frame Sync .......................................................................................................................... 27
14.1.3 Short Frame Sync ......................................................................................................................... 27
14.2 Multi-slot Operation ............................................................................................................................ 28
14.2.1 GCI Interface ................................................................................................................................. 28
Slots and Sample Formats ............................................................................................................ 29
14.2.2
14.2.3 Additional Features ....................................................................................................................... 30
14.2.4 PCM Timing Information ............................................................................................................... 31
14.2.5 PCM_CLK and PCM_SYNC Generation ...................................................................................... 34
14.2.6 PCM Configuration ........................................................................................................................ 35
14.3 Digital Audio Interface (I2S) ................................................................................................................ 35
15 Power Control and Regulation ................................................................................................................ 40
15.1 Voltage Regulator Enable .................................................................................................................. 40
15.2 USB Linear Regulator ........................................................................................................................ 40
15.3 High Voltage Linear Regulator ........................................................................................................... 40
15.4 Low Voltage Linear Regulators .......................................................................................................... 41
15.5 Powering Sequence ........................................................................................................................... 41
15.6 Reset .................................................................................................................................................. 41
16 Example Schematic ................................................................................................................................ 42
17 Software .................................................................................................................................................. 43
17.1 On-chip Software ................................................................................................................................ 44
17.1.1 Bluetooth HCI Stack ...................................................................................................................... 44
17.1.2 Latest Feature of the HCI Stack .................................................................................................... 44
18 Soldering Recommendations .................................................................................................................. 45
19 Certifications ........................................................................................................................................... 46
19.1 Bluetooth ............................................................................................................................................ 46
19.2 FCC/IC (USA/Canada) ....................................................................................................................... 46
19.2.1 FCC et IC ...................................................................................................................................... 47
19.3 CE (Europe) ....................................................................................................................................... 48
19.4 KCC (South-Korea) ............................................................................................................................ 49
19.5 Japan .................................................................................................................................................. 49
20 Moisture Sensitivity Level (MSL) classification ....................................................................................... 50
21 Packaging and Reel Information ............................................................................................................. 51
22 Contact Information................................................................................................................................. 52
BT111: Bluetooth Smart Ready HCI Module
DESCRIPTION
BT111 is a low cost and ultra-
small Bluetooth Smart Ready HCI module that
is designed for applications where
both Bluetooth classic and Bluetooth low
energy connectivity is needed. BT111
integrates a Bluetooth 4.0 dual mode radio,
HCI software stack, USB interface and an antenna. BT111 is compatible with Windows and Linux operating systems and Microsoft
and BlueZ Bluetooth stacks and offers OEMs
fast and risk free way to
integrate Bluetooth 4.0 connectivity into their
applications.
APPLICATIONS
Health and fitness gateways
Point of sale
M2M connectivity
Automotive aftermarket
Personal navigation devices
Consumer electronics
Industrial and home automation
gateways
KEY FEATURES
Bluetooth v.4.0, dual mode compliant
Support Bluetooth classic Supports Bluetooth low
energy master mode
Radio capabilities
Transmit power: +8dBm  Receiver sensitivity: -89dBm  Line-of-sight range: 100+ meters  Integrated antenna
Interfaces
HCI over USB host interface  802.11 co-existence interface  Software programmable GPIO  PCM or I2S audio interfaces
Supply voltage: 1.7V to 3.6V or 3.1V to
3.6V
Temperature range: -30C to +85C  Ultra compact size: 13.05mm x 9.30mm
Bluetooth, CE, FCC, IC and South-Korea
qualified
PHYSICAL OUTLOOK
Bluegiga Technologies Oy
1 BT111 Product numbering
BT111-A-HCI
Antenna:
A = Internal
Firmware revision
Available products and product codes
Product code Description
BT111-A-HCI BT111 Bluetooth 4.0 HCI module with integrated antenna
Page 7 of 52
2 Block Diagram
26MHz XTAL
Antenna
BPF
RF
5V0 3V3 1V8
RAM
ROM
MMU
MCU
LDO 3V3
CSR8510
3 x LDO
LDO 1V8
1V3
I/O
PIO3
PIO4
PIO0 PIO1 PIO2 PIO5
32k EEPROM
SPI / PCM
USB
Figure 1: Block diagram of BT111
CSR8510
BT111 is based on CSR8510 dual mode chip. The chip includes all the functions required for a complete
Bluetooth radio with on chip LDO regulators. The chip provides SPI, PCM and USB interfaces. Up to 4 general
purpose I/Os are available for general usage, such as Wi-Fi coexistence or general indicators.
Antenna
Antenna is a ceramic monopole chip antenna. See the antenna characteristics in chapter 7.
Band Pass Filter
The band pass filter filters the out of band emissions from the transmitter to meet the specific regulations for type approvals of various countries.
32k EEPROM
The embedded 32k EEPROM can be used to store customizable parameters, such as maximum TX power, PCM configuration, USB product ID, USB vendor ID and USB product description.
26MHz Crystal
The embedded 26MHz crystal is used for generating the internal digital clocks.
Page 8 of 52
y
g
g
3 Pinout and Terminal Descriptions
1
GND
2
USB­USB+
3
PCM_SYNC/SPI_CS/PIO23
4
PIO5
5
PIO2
6
PCM_CLK/SPI_CLK/PIO24
7
PCM_IN/SPI_MOSI/PIO21
8
GND
9
VREG_IN_HV
10
GND
VREG_EN_RST#
VDD_PADS
VREG_OUT_HV
VREG_IN_USB
21 20 19 18 17 16VDD_HOST
PCM_OUT/SPI_MISO/PIO22
SPI_PCM_SEL
PIO01
GND
15
PIO0
121314
11
Figure 2: BT111
Power Supply Pin No. Pad Type Description
Take high to enable internal regulators. Also acts as active low reset. Maximum voltage is VDD_PADS
Note: USB regulator is always enabled and
not controlled b
this pin
Input to internal high-voltage regulator to
1.8V regulator, 3.3V output from USB re
ulator. Output from internal high-voltage to 1.8V regulator. Input to second stage internal
ulators.
re
Input to USB regulator. Connect to external USB bus supply, e.g. USB_VBUS
VREG_EN_RST# 20
VREG_IN_HV 10
VREG_OUT_HV 18
VREG_IN_USB 17
Input with strong internal pull-down
Analogue regulator input / output
Analogue regulator output
Analogue regulator input
VDD_HOST 16 VDD USB system positive supply VDD_PADS 19 VDD Positive supply for digital I/O pads
Table 1: Supply Terminal Descriptions
Page 9 of 52
g
PIO Port Pin No. Pad Type Supply Domain Description
PIO0 11
PIO1 13
PIO2 6
Bidirectional, tristate, with weak internal pull­down
PIO5 5
PCM Interface Pin No. Pad Type
PCM_OUT/ SPI_MISO/ PIO22
PCM_IN/ SPI_MOSI/ PIO21
PCM_SYNC/ SPI_CS#/ PIO23
PCM_CLK/ SPI_CLK/ PIO24
12
Output, tristate, with weak internal pull­down
Input, tristate, with
8
weak internal pull­down
4
Bidirectional, tristate,
with weak internal
7
pulldown
VDD_PADS Programmable input/output line
Table 2: I/O Terminal Descriptions
Supply Domain
VDD_PADS
Description
PCM syncronous data output SPI data output Programmable input/output line
PCM syncronous data input SPI data input Programmable input/output line
PCM syncronous dara sync SPI chip select, active low Programmable input/output line
PCM syncronous data clock SPI clock
rammable input/output line
Pro
SPI_PCM#_SEL 14
Input with weak internal pull-down
High switches SPI/PCM lines to SPI, low switches SPI/PCM lines to PCM/PIO use
Table 3: PCM Interface
USB Interface Pin No. Pad Type
USB+ 3
USB- 2 USB data minus
Supply Domain
VDD_HOSTBidirectional
Description
USB data plus with selectable internal 1.5k
pull-up resistor
Table 4: USB Interface
Ω
Page 10 of 52
4 External Dimensions and Land Pattern
Figure 3: Footprint (top view)
7.3mm (+/- 0.1mm)
1.9mm (+/- 10%)
13.05mm (+/- 0.1mm)
2.1mm (+/- 10%)
9.3mm (+/- 0.1mm)
Figure 4: External dimensions
Page 11 of 52
5 Layout Guide Lines
Use good layout practices to avoid excessive noise coupling to supply voltage traces or sensitive analog signal traces. If using overlapping ground planes use stitching vias separated by max 3 mm to avoid emission from the edges of the PCB. Connect all the GND pins directly to a solid GND plane and make sure that there is a low impedance path for the return current following the signal and supply traces all the way from start to the end.
A good practice is to dedicate one of the inner layers to a solid GND plane and one of the inner layers to supply voltage planes and traces and route all the signals on top and bottom layers of the PCB. This arrangement will make sure that any return current follows the forward current as close as possible and any loops are minimized.
Signals
GND
Power
Signals
Figure 5: Typical 4-layer PCB construction
Overlapping GND layers without GND stitching vias
Figure 6: Use of stitching vias to avoid emissions from the edges of the PCB
Overlapping GND layers with GND stitching vias shielding the RF energy
5.1 BT111-A Layout Guide
For optimal performance of the antenna place the module at the corner of the PCB of the mother board as shown in the figure 7. Optionally the module can be placed on the long edge of the mother board. In this case the metal clearance area must be extended minimum 10mm from the edge of the module, as shown in figure
7. The layout of the mother board has an impact on the antenna characteristic and radiation pattern, see the antenna characteristics chapter. Do not place any metal (traces, components, battery etc.) within the clearance area of the antenna. Connect all the GND pins directly to a solid GND plane. Place the GND vias as close to the GND pins as possible. Use good layout practices to avoid any excessive noise coupling to signal lines or supply voltage lines. Avoid placing plastic or any other dielectric material closer than 5 mm from the antenna. Any dielectric closer than 5 mm from the antenna will detune the antenna to lower frequencies.
The antenna is optimized for mother board thickness of 1.0 mm. If the mother board is thicker than this, the resonant frequency will be tuned downwards. If the mother board thickness is thinner than 1.0 mm, the
Page 12 of 52
resonant frequency will be tuned upwards. S11 is a measure of how big portion of the transmitted power is reflected back from the antenna. An adequate performance can be expected if S11 is less than – 7 dB. If using PCB thickness more than 1.6 mm, or if there is dielectric material around the antenna which is likely to detune the resonant frequency, the antenna can be tuned in the mother board layout by removing FR4 below the antenna.
Min. 10mm
BT111
Mother board
Figure 7: Recommended layouts for BT111-A
Mother board
Metal clearance area
BT111
Figure 8: Impedance matching of the antenna of BT111 with two different mother board PCB thickness
Page 13 of 52
6 Electrical Characteristics
6.1 Absolute Maximum Ratings
Rating Min Max Unit
Storage temperature -40
VREG_IN_USB -0.2 5.85 VREG_IN_HV -0.2 4.9
VDD_HOST -0.2 3.7
VDD_PADS -0.2 3.7
Other terminal voltages VSS - 0.4V
Table 5: Absolute maximum ratings
Rating Min Max Unit
Operating temperature -30
VREG_IN_USB 4.25
VREG_IN_HV 2.3 VDD_HOST 3.1
VDD_PADS
*) NOTE: The internal EEPROM is powered from VDD_PADS. To write the EEPROM, minimum supply voltage is 2.7V and maximum is 3.3V. For reading the EEPROM the minimum supply voltage is 1.7V and the maximum is 3.6V.
(*
Table 6: Recommended operating conditions
1.7
(*
+85
⁰
VDD + 0.4 V V
+85
⁰
5.75 V
4.8 V
3.6 V
(*
3.6
C
V V V V
C
V
6.2 Input/Output Terminal Characteristics
6.2.1 USB Linear Regulator
Rating Min Typ Max Unit
Input voltage 4.25 5.0 Output voltage 3.2 3.3
Output current - -
Table 7: USB linear regulator
5.75 V
3.4 V
150 mA
Page 14 of 52
6.2.2 High-voltage Linear Regulator
)
)
Normal Operation Min Typ Max Unit
Input voltage 2.3 3.3
Output voltage 1.75 1.85
Temperature coefficient -200 ­Output noise (frequency range 100Hz to
100kHz Settling time (settling ti within 10% of final value
Output current - -
Quiescent current (excluding load, I
Low-power Mode
Quiescent current (excluding load, I <100µA)
Table 8: High-voltage Linear Regulator
load
load
<1mA)
--
--
30 40
14 18
4.8 V
1.95 V
200 ppm/⁰C
0.4 mV rms
5µs
100 mA
60 µA
23 µA
6.2.3 Digital
Normal Operation Min Typ Max Unit
Input Voltage
input logic level low
V
IL
VIH input logic level high
Output Voltage
VOL output logic level low, IOL = 4.0mA
VOH output logic level high, IOL = 4.0mA
Input and Tristate Currents
Strong pull-up -150 -40 -10 Striong pull-down 10 40 Weak pull-up -5 -1.0 Weak pull-down 0.33 1.0 C
input capacitance
I
Table 9: Digital I/O characteristics
-0.4 -
0.7 x VDD -
--
0.75 x VDD -
1.0 -
0.4 V
VDD + 0.4 V
0.4 V
-V
150
-0.33
5.0
5.0 pF
µ
A
µ
A
µ
A
µ
A
Page 15 of 52
6.3 Current Consumption
Normal Operation
Idle 5
USB Suspend 200 Inguiry 73 51
File Transfer 73 58
LE Connected (Master) 74 (*
LE Scan (Master) 48 (*
*) LE AVG current consumption depends on the chosen TX interval and scanning window
Table 10: Current consumption of BT111 with 8 dBm TX power
Peak
(8 dBm)
AVG Unit
mA
µ
A
mA mA mA mA
TX Peak = 73 mA
Peak = 14 mA
6.5 ms
Figure 9: Current consumption profile while creating a SPP connection
Peak = 48 mA
BGND Current = 6.4 mA
Window = 50 ms
Figure 10: LE scanning with 50 ms window
Page 16 of 52
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