Silicon Laboratories Si8430, Si8431, Si8435 User Manual

TRIPLE-CHANNEL DIGITAL ISOLATOR

Si8430/31/35

Features

 High-speed operation:

DC – 150 Mbps

 Low propagation delay:

<10 ns

 Wide Operating Supply Voltage:

2.375-5.5V

 Low power: I1 + I2 <

12 mA/channel at 100 Mbps

 Precise timing:

2 ns pulse width distortion 1 ns channel-channel matching 2 ns pulse width skew

Applications

 Isolated switch mode supplies  Isolated ADC, DAC

Safety Regulatory Approvals

 UL recognition:2500 V

Minute per UL1577

 CSA component acceptance

notice

RMS

for 1

 2500 V

 Transient Immunity: >25 kV/µs  Tri-state outputs with ENABLE

RMS

isolation

control

 DC correct  No start-up initialization required  <10 µs Startup Time  High temperature operation:

125 °C at 100 Mbps 100 °C at 150 Mbps

 Wide body SOIC-16 package

 Motor control  Power factor correction systems

 VDE certification conformity

 IEC 60747-5-2

(VDE0884 Part 2)

V

DD1

GND1

A1

A2

A3

NC

EN1/NC

GND1

Pin Assignments

Wide Body SOIC

1 2 3 4 5 6

7 8

Top View

16 15 14 13 12

11 10

9

V

DD2

GND2

B1

B2

B3

NC

EN2/NC

GND2

Description

Silicon Lab's family of digital isolators are CMOS devices that employ an RF coupler to transmit digital information across an isolation barrier. Very high speed operation at low power levels is achieved. These parts are available in a 16-pin wide body SOIC package. Three speed grade options (1, 10, 150 Mbps) are available and achieve typical propagation delay of less than 10 ns.

Block Diagram

Si8430/35

A1

A2

A3

NC

B1

B2

B3

Si8431

A1

A2

A3

EN1EN2/NC EN2

B1

B2

B3

Si8430/31/35

2 Rev. 0.31

Si8430/31/35

TABLE OF CONTENTS

Section Page

1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2. Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

3. Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

3.1. Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

3.2. Eye Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

4. Layout Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

4.1. Supply Bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

4.2. Input and Output Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4.3. Enable (EN1, EN2) Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

4.4. RF Radiated Emissions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4.5. RF Immunity and Common Mode Transient Immunity . . . . . . . . . . . . . . . . . . . . . . . 24

5. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

7. Package Outline: Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28

Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30

Rev. 0.31 3

Si8430/31/35

1. Electrical Specifications

Table 1. Electrical Characteristics

(V

= 5 V, V

DD1

Parameter Symbol Test Condition Min Typ Max Unit

= 5 V, TA = –40 to 125 ºC)

DD2

High Level Input Voltage V

Low Level Input Voltage V

High Level Output Voltage V

Low Level Output Voltage V

Input Leakage Current I

Enable Input High Current I

Enable Input Low Current I

DC Supply Current (All inputs 0 V or at Supply)

Si8430/35-A,-B,-C, V

Si8431-A,-B,-C, V

DD1

DD2

DD1

DD2

DD1

DD2

DD1

DD2

10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs)

Si8430/35-B,-C, V

Si8431-B,-C, V

DD1

DD2

DD1

DD2

100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)

Si8430-C, V

Si8431-C, V

DD1

DD2

DD1

DD2

IH

IL

OH

OL

L

ENH

ENL

2.0 — — V

——0.8V

loh = –4 mA V

DD1,VDD2

–0.4 4.8 — V

lol = 4 mA — 0.2 0.4 V

——±10µA

V

ENx

= V

IH

IL

—4—µA

—20—µA

All inputs 0 DC — 7 10 mA

All inputs 0 DC — 6 9 mA

All inputs 1 DC — 14 18 mA

All inputs 1 DC — 6 9 mA

All inputs 0 DC — 8 12 mA

All inputs 0 DC — 10 15 mA

All inputs 1 DC — 13 19 mA

All inputs 1 DC — 12 17 mA

—1115mA

—1317mA

—1216mA

—1317mA

—1115mA

—2328mA

—1318mA

—2126mA

4 Rev. 0.31

Si8430/31/35

Table 1. Electrical Characteristics (Continued)

(V

= 5 V, V

DD1

Parameter Symbol Test Condition Min Typ Max Unit

Si843x-A

Maximum Data Rate 0 — 1 Mbps

Minimum Pulse Width — — 1000 ns

Propagation Delay t

Pulse Width Distortion |t

PLH - tPHL

Propagation Delay Skew

Channel-Channel Skew t

Si843x-B

Maximum Data Rate 0 — 10 Mbps

Minimum Pulse Width — — 100 ns

= 5 V, TA = –40 to 125 ºC)

DD2

|

1

Timing Characteristics

PHL

, t

PLH

See Figure 2 — — 75 ns

PWD See Figure 2 — — 30 ns

t

PSK(P-P)

PSK

— — 50 ns

— — 40 ns

Propagation Delay t

Pulse Width Distortion |t

PLH - tPHL

Propagation Delay Skew

|

1

Channel-Channel Skew t

PHL

, t

PLH

See Figure 2 — — 35 ns

PWD See Figure 2 — — 7.5 ns

t

PSK(P-P)

PSK

— — 25 ns

——5ns

Si843x-C

Maximum Data Rate 0 — 150 Mbps

Minimum Pulse Width — — 6.6 ns

Propagation Delay t

Pulse Width Distortion |t

PLH - tPHL

Propagation Delay Skew

|

1

Channel-Channel Skew t

PHL

, t

PLH

See Figure 2 4 6.5 9.5 ns

PWD See Figure 2 — — 3 ns

t

PSK(P-P)

PSK

——5.5ns

——3ns

Rev. 0.31 5

Si8430/31/35

Table 1. Electrical Characteristics (Continued)

(V

= 5 V, V

DD1

Parameter Symbol Test Condition Min Typ Max Unit

For All Models

Output Rise Time t

Output Fall Time t

Common Mode Transient Immunity

Enable to Data Valid t

Enable to Data Tri-State t

Start-up Time

Notes:

1. t

PSK(P-P)

same supply voltages, load, and ambient temperature.

2. Start-up time is the time period from the application of power to valid data at the output.

= 5 V, TA = –40 to 125 ºC)

DD2

r

CL = 15 pF

—2—ns

See Figure 2

f

CL = 15 pF

—2—ns

See Figure 2

CMTI V

en1

en2

2

is the magnitude of the difference in propagation delay times measured between different units operating at the

t

SU

I=VDD

See Figure 1 — 5 — ns

or 0 V 25 30 — kV/µs

—3—µs

ENABLE

OUTPUTS

Typical Input

Typical Output

50%

t

en1

Figure 1. ENABLE Timing Diagram

t

PLH

90%

10%

t

r

90%

10%

t

PHL

t

f

t

en2

Figure 2. Propagation Delay Timing

6 Rev. 0.31

Si8430/31/35

Table 2. Electrical Characteristics

(V

= 3.3 V, V

DD1

Parameter Symbol Test Condition Min Typ Max Unit

= 3.3 V, TA = –40 to 125 ºC)

DD2

High Level Input Voltage V

Low Level Input Voltage V

High Level Output Voltage V

Low Level Output Voltage V

Input Leakage Current I

Enable Input High Current I

Enable Input Low Current I

DC Supply Current (All inputs 0 V or at supply)

Si8430/35-A,-B,-C, V

Si8431-A,-B,-C, V

DD1

DD2

DD1

DD2

DD1

DD2

DD1

DD2

10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs)

IH

IL

OH

OL

L

ENH

ENL

2.0 — — V

——0.8V

loh = –4 mA V

DD1,VDD2

–0.4 3.1 — V

lol = 4 mA — 0.2 0.4 V

——±10µA

V

ENx

= V

IH

IL

—4—µA

—20—µA

All inputs 0 DC — 7 10 mA

All inputs 0 DC — 6 9 mA

All inputs 1 DC — 13 17 mA

All inputs 1 DC — 5 8 mA

All inputs 0 DC — 7 11 mA

All inputs 0 DC — 10 15 mA

All inputs 1 DC — 12 18 mA

All inputs 1 DC — 11 16 mA

Si8430/35-B,-C, V

Si8431-B,-C, V

DD1

DD2

100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)

Si8430-C, V

Si8431-C, V

DD1

DD2

DD1

DD2

DD1

DD2

—1014mA

—1116mA

—1015mA

—1318mA

—1115mA

—1620mA

—1218mA

—1925mA

Rev. 0.31 7

Si8430/31/35

Table 2. Electrical Characteristics (Continued)

(V

= 3.3 V, V

DD1

Parameter Symbol Test Condition Min Typ Max Unit

Si843x-A

Maximum Data Rate 0 — 1 Mbps

Minimum Pulse Width — — 1000 ns

= 3.3 V, TA = –40 to 125 ºC)

DD2

Timing Characteristics

Propagation Delay t

Pulse Width Distortion |t

PLH - tPHL

Propagation Delay Skew

|

1

Channel-Channel Skew t

PHL

, t

PLH

See Figure 2 — — 75 ns

PWD See Figure 2 — — 30 ns

t

PSK(P-P)

PSK

— — 50 ns

— — 40 ns

Si843x-B

Maximum Data Rate 0 — 10 Mbps

Minimum Pulse Width — — 100 ns

Propagation Delay t

Pulse Width Distortion |t

PLH - tPHL

Propagation Delay Skew

|

1

Channel-Channel Skew t

PHL

, t

PLH

See Figure 2 — — 35 ns

PWD See Figure 2 — — 7.5 ns

t

PSK(P-P)

PSK

— — 25 ns

——5ns

Si843x-C

Maximum Data Rate 0 — 150 Mbps

Minimum Pulse Width — — 6.6 ns

Propagation Delay t

Pulse Width Distortion |t

PLH - tPHL

Propagation Delay Skew

|

1

Channel-Channel Skew t

PHL

, t

PLH

See Figure 2 4 6.5 9.5 ns

PWD See Figure 2 — — 3 ns

t

PSK(P-P)

PSK

——5.5ns

——3ns

8 Rev. 0.31

Si8430/31/35

Table 2. Electrical Characteristics (Continued)

(V

= 3.3 V, V

DD1

Parameter Symbol Test Condition Min Typ Max Unit

For All Models

= 3.3 V, TA = –40 to 125 ºC)

DD2

Output Rise Time t

r

CL = 15 pF

—2—ns

See Figure 2

Output Fall Time t

f

CL = 15 pF

—2—ns

See Figure 2

Common Mode Transient

CMTI V

I=VDD

or 0 V 25 30 — kV/µs

Immunity

Enable to Data Valid t

Enable to Data Tri-State t

PSK(P-P)

2

is the magnitude of the difference in propagation delay times measured between different units operating at

Start-up Time

Notes:

1. t

the same supply voltages, load, and ambient temperature.

2. Start-up time is the time period from the application of power to valid data at the output.

en1

en2

t

SU

See Figure 1 — 5 — ns

—3—µs

Rev. 0.31 9

Silicon Laboratories Si8430, Si8431, Si8435 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

1. Electrical Specifications

Table 1. Electrical Characteristics

Figure 1. ENABLE Timing Diagram

Figure 2. Propagation Delay Timing

Table 2. Electrical Characteristics